tree cd64be7c876f3bdc9bcf8d06d7c02304bbffc93e
parent 9598566721fe7524cca575975ea7e8ea2e27a71b
author Prashant Gaikwad <pgaikwad@nvidia.com> 1357890380 +0530
committer Stephen Warren <swarren@nvidia.com> 1359397147 -0700

clk: tegra: add Tegra specific clocks

Add Tegra specific clocks, pll, pll_out, peripheral, frac_divider, super.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: alloc sizeof(*foo) not sizeof(struct foo), add comments re:
storing pointers to stack variables, make a timeout loop more idiomatic,
use _clk_pll_disable() not clk_disable_pll() from _program_pll() to
avoid redundant lock operations, unified tegra_clk_periph() and
tegra_clk_periph_nodiv(), unified tegra_clk_pll{,e}, rename all clock
registration functions so they don't have the same name as the clock
structs, return -EINVAL from clk_plle_enable when matching table rate
not found, pass ops to _tegra_clk_register_pll rather than a bool.]
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>