msm: kgsl: Add support for GPUHTW System Cache usage
Activate and deactivate the slice for GPU pagetable walks
in the system cache upon GPU power collapse/restore.
Configure the SCID for the slice.
Also enable the SMMU domain attribute to allocate pagetable
memory with the right memory attributes for them to be
allocated into the system cache.
CRs-Fixed: 1081617
Change-Id: I16c174b413eaa4aa5c6a3514c9a18f8c990812da
Signed-off-by: Sushmita Susheelendra <ssusheel@codeaurora.org>
diff --git a/drivers/gpu/msm/kgsl_iommu.c b/drivers/gpu/msm/kgsl_iommu.c
index fdb6e0e..cfd5cd1 100644
--- a/drivers/gpu/msm/kgsl_iommu.c
+++ b/drivers/gpu/msm/kgsl_iommu.c
@@ -1142,6 +1142,28 @@
kfree(iommu_pt);
}
+void _enable_gpuhtw_llc(struct kgsl_mmu *mmu, struct kgsl_iommu_pt *iommu_pt)
+{
+ struct kgsl_device *device = KGSL_MMU_DEVICE(mmu);
+ struct adreno_device *adreno_dev = ADRENO_DEVICE(device);
+ int gpuhtw_llc_enable = 1;
+ int ret;
+
+ /* GPU pagetable walk LLC slice not enabled */
+ if (!adreno_dev->gpuhtw_llc_slice)
+ return;
+
+ /* Domain attribute to enable system cache for GPU pagetable walks */
+ ret = iommu_domain_set_attr(iommu_pt->domain,
+ DOMAIN_ATTR_USE_UPSTREAM_HINT, &gpuhtw_llc_enable);
+ /*
+ * Warn that the system cache will not be used for GPU
+ * pagetable walks. This is not a fatal error.
+ */
+ WARN_ONCE(ret,
+ "System cache not enabled for GPU pagetable walks: %d\n", ret);
+}
+
static int _init_global_pt(struct kgsl_mmu *mmu, struct kgsl_pagetable *pt)
{
int ret = 0;
@@ -1165,6 +1187,8 @@
}
}
+ _enable_gpuhtw_llc(mmu, iommu_pt);
+
ret = _attach_pt(iommu_pt, ctx);
if (ret)
goto done;
@@ -1237,6 +1261,8 @@
goto done;
}
+ _enable_gpuhtw_llc(mmu, iommu_pt);
+
ret = _attach_pt(iommu_pt, ctx);
if (MMU_FEATURE(mmu, KGSL_MMU_HYP_SECURE_ALLOC))
@@ -1297,6 +1323,8 @@
goto done;
}
+ _enable_gpuhtw_llc(mmu, iommu_pt);
+
ret = _attach_pt(iommu_pt, ctx);
if (ret)
goto done;