| commit | 934c79231c1b3a88ed1ef8f1473fb26849ae501c | [log] [tgz] |
|---|---|---|
| author | Markos Chandras <markos.chandras@imgtec.com> | Thu Nov 13 13:25:51 2014 +0000 |
| committer | Markos Chandras <markos.chandras@imgtec.com> | Tue Feb 17 15:37:20 2015 +0000 |
| tree | 236efbdff02a3033cc90e8308e7cbb87821e8f23 | |
| parent | 8716a7635665008291d3f19dd5d36a858ed1561b [diff] |
MIPS: asm: r4kcache: Add MIPS R6 cache unroll functions MIPS R6 changed the 'cache' instruction opcode and reduced the offset field to 8 bits. This means we now have to adjust the base register every 256 bytes and as a result of which we can no longer use the previous cache functions. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>