| commit | 976ee49d01d587adf6c3697202cb1c2cd62ce015 | [log] [tgz] |
|---|---|---|
| author | Saranya Chidura <schidura@codeaurora.org> | Mon Mar 05 10:36:48 2018 +0530 |
| committer | Saranya Chidura <schidura@codeaurora.org> | Wed Mar 07 14:51:39 2018 +0530 |
| tree | 41542ebc77de27f323eeea44dfd9f254dfaaa16b | |
| parent | be5c1d1881e2dcd63ceceddd35aa5b2f4ab61656 [diff] |
coresight:byte-cntr: fix the byte-counter of ETR When ETR byte-cntr is enabled, ETR triggers an interrupt at ETRBYTECNT. It indicates atleast 'block_size' bytes of data is captured in DDR. The Byte-cntr is a 8-byte counter, so the CSR register ETRBYTECNT is set to 'block_size/8'. Change-Id: I62871b4a62216f35365ee490f6b0946a039e182e Signed-off-by: Saranya Chidura <schidura@codeaurora.org>