tree 0e8ba52fb2034de4f3fcd977589e3a9bdad79b26
parent 1d7c71a3e2f77336df536855b0efd2dc5bdeb41b
author Ben Skeggs <bskeggs@redhat.com> 1359604280 +1000
committer Ben Skeggs <bskeggs@redhat.com> 1361340046 +1000

drm/nouveau/fifo/nvc0-: use interrupt 31 as an event trigger

Generated if you try and use fifo method 0x20 on any subchannel, appears
that it can be safely masked off without stalling the whole GPU.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>