| commit | 9c5c92e35cf5c4f7ee523d62a6bf9d5dc290350b | [log] [tgz] |
|---|---|---|
| author | Will Deacon <will.deacon@arm.com> | Wed Jun 25 12:12:41 2014 +0100 |
| committer | Will Deacon <will.deacon@arm.com> | Thu Jul 03 15:50:22 2014 +0100 |
| tree | 977fab969cfe52fb9153c05de21bc6d46d4b8a19 | |
| parent | 44680eedf9409daf0fed618ae101f35d1f83d1a4 [diff] |
iommu/arm-smmu: prefer stage-1 mappings where we have a choice For an SMMU that supports both Stage-1 and Stage-2 mappings (but not nested translation), then we should prefer stage-1 mappings as we otherwise rely on the memory attributes of the incoming transactions for IOMMU_CACHE mappings. Signed-off-by: Will Deacon <will.deacon@arm.com>