tree 52f5ca52ae0ac6c8430b79ba77f37f7e40a4ec96
parent 11d1578f9454159c43499d1d8fe8a7d728c176a3
author Peter Zijlstra <a.p.zijlstra@chello.nl> 1247041301 +0200
committer Ingo Molnar <mingo@elte.hu> 1247214507 +0200

perf_counter: Fix up P6 PMU details

The P6 doesn't seem to support cache ref/hit/miss counts, so
we extend the generic hardware event codes to have 0 and -1
mean the same thing as for the generic cache events.

Furthermore, it turns out the 0 event does not count
(that is, its reported that on PPro it actually does count
something), therefore use a event configuration that's
specified not to count to disable the counters.

Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>