| commit | 9cc2a0c95ff3f815deeba1ccd0d11b1d3bc46551 | [log] [tgz] |
|---|---|---|
| author | Padmavathi Venna <padma.v@samsung.com> | Tue Jan 13 16:57:40 2015 +0530 |
| committer | Sylwester Nawrocki <s.nawrocki@samsung.com> | Thu Jan 15 15:11:40 2015 +0100 |
| tree | 554a4e642438b0ccdeff9f7b4e0b9708083afb78 | |
| parent | 83f191a7cdf5286a8f3745e847f50c29fa349da9 [diff] |
clk: samsung: exynos7: add gate clock for DMA block Add support for PDMA0 and PDMA1 gate clks. Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>