drm/msm/dsi-staging: vote for LDO1A coming out of idle timeout
LDO1A is powering DSI pll block, vote for this regulator while
coming out of idle timeout. Without this DSI PLL cannot be
locked.
Change-Id: Idbeaef1311ee77b1554a2435975ccf86400d2a1d
Signed-off-by: Vara Reddy <varar@codeaurora.org>
diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_phy.c b/drivers/gpu/drm/msm/dsi-staging/dsi_phy.c
index 197d448..2567f04 100644
--- a/drivers/gpu/drm/msm/dsi-staging/dsi_phy.c
+++ b/drivers/gpu/drm/msm/dsi-staging/dsi_phy.c
@@ -663,7 +663,7 @@
}
}
} else {
- if (dsi_phy->dsi_phy_state == DSI_PHY_ENGINE_OFF &&
+ if (dsi_phy->dsi_phy_state == DSI_PHY_ENGINE_ON &&
dsi_phy->regulator_required) {
rc = dsi_pwr_enable_regulator(
&dsi_phy->pwr_info.phy_pwr, false);
@@ -955,6 +955,14 @@
phy->regulator_required = clk_freq->byte_clk_rate >
(phy->regulator_min_datarate_bps / BITS_PER_BYTE);
+ /*
+ * DSI PLL needs 0p9 LDO1A for Powering DSI PLL block.
+ * PLL driver can vote for this regulator in PLL driver file, but for
+ * the usecase where we come out of idle(static screen), if PLL and
+ * PHY vote for regulator ,there will be performance delays as both
+ * votes go through RPM to enable regulators.
+ */
+ phy->regulator_required = true;
pr_debug("[%s] lane_datarate=%u min_datarate=%u required=%d\n",
phy->name,
clk_freq->byte_clk_rate * BITS_PER_BYTE,