Merge changes into msm-4.9
diff --git a/Documentation/devicetree/bindings/arm/msm/clock-controller.txt b/Documentation/devicetree/bindings/arm/msm/clock-controller.txt
index 4afbb24b..dd25b7c 100644
--- a/Documentation/devicetree/bindings/arm/msm/clock-controller.txt
+++ b/Documentation/devicetree/bindings/arm/msm/clock-controller.txt
@@ -1,6 +1,6 @@
-Qualcomm Technologies MSM Clock controller
+Qualcomm Technologies, Inc. MSM Clock controller
-Qualcomm Technologies MSM Clock controller devices contain PLLs, root clock
+Qualcomm Technologies, Inc. MSM Clock controller devices contain PLLs, root clock
generators and other clocking hardware blocks that provide stable, low power
clocking to hardware blocks on Qualcomm Technologies SOCs. The clock controller
device node lists the power supplies needed to be scaled using the vdd_*-supply
diff --git a/Documentation/devicetree/bindings/arm/msm/clock-cpu-8939.txt b/Documentation/devicetree/bindings/arm/msm/clock-cpu-8939.txt
index d9e1510..5d570d0 100644
--- a/Documentation/devicetree/bindings/arm/msm/clock-cpu-8939.txt
+++ b/Documentation/devicetree/bindings/arm/msm/clock-cpu-8939.txt
@@ -1,4 +1,4 @@
-Qualcomm Technology MSM8939 CPU clock tree
+Qualcomm Technologies, Inc. MSM8939 CPU clock tree
clock-cpu-8939 is a device that represents the MSM8939 or MSM8952 CPU
subsystem clock tree. It lists the various power supplies that need to be
diff --git a/Documentation/devicetree/bindings/arm/msm/proxy-client.txt b/Documentation/devicetree/bindings/arm/msm/proxy-client.txt
new file mode 100644
index 0000000..29cfaf9
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/msm/proxy-client.txt
@@ -0,0 +1,34 @@
+Bus Proxy Client Bindings
+
+Bus proxy client provides means to cast proxy bandwidth votes during bootup
+which is removed at the end of boot. This feature can be used in situations
+where a shared resource can be scaled between several possible perfomance
+levels and hardware requires that it be at a high level at the beginning of
+boot before the client has probed and voted for required bandwidth.
+
+Required properties:
+- compatible: Must be "qcom,bus-proxy-client".
+
+Optional properties:
+- qcom,msm-bus,name: String representing the client-name.
+- qcom,msm-bus,num-cases: Total number of usecases.
+- qcom,msm-bus,active-only: Boolean context flag for requests in active or
+ dual (active & sleep) contex.
+- qcom,msm-bus,num-paths: Total number of master-slave pairs.
+- qcom,msm-bus,vectors-KBps: Arrays of unsigned integers representing:
+ master-id, slave-id, arbitrated bandwidth
+ in KBps, instantaneous bandwidth in KBps.
+
+Example:
+
+ qcom,proxy-client {
+ compatible = "qcom,bus-proxy-client";
+ qcom,msm-bus,name = "proxy_client";
+ qcom,msm-bus,num-cases = <3>;
+ qcom,msm-bus,num-paths = <2>;
+ qcom,msm-bus,active-only;
+ qcom,msm-bus,vectors-KBps =
+ <22 512 0 0>, <23 512 0 0>,
+ <22 512 0 6400000>, <23 512 0 6400000>,
+ <22 512 0 6400000>, <23 512 0 6400000>;
+ };
diff --git a/Documentation/devicetree/bindings/interrupt-controller/qti,mpm.txt b/Documentation/devicetree/bindings/interrupt-controller/qti,mpm.txt
index 12ced5f..010316d 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/qti,mpm.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/qti,mpm.txt
@@ -8,13 +8,16 @@
Platform interrupt controller MPM is next in hierarchy, followed by others.
+This defines 2 interrupt controllers to monitor the interrupts when the system is asleep:
+
+One for to monitor the wakeup capable gic interrupts called wakegic.
+
Properties:
- compatible:
Usage: required
Value type: <string>
- Definition: Should contain "qcom,mpm" for mpm pin data
- and the respective target compatible flag.
+ Definition: Should contain "qcom,mpm-gic" and the respective target compatible flag.
- interrupts:
Usage: required
@@ -48,18 +51,42 @@
Example:
-mpm: mpm@7781b8 {
- compatible = "qcom,mpm";
+wakegic: wake-gic@7781b8 {
+ compatible = "qcom,mpm-gic", "qcom,mpm-gic-msm8953";
interrupts = <GIC_SPI 171 IRQ_TYPE_EDGE_RISING>;
- reg = <0x7781b8 0x1000>,
- <0x17911008 0x4>; /* MSM_APCS_GCC_BASE 4K */
+ reg = <0x601d4 0x1000>,
+ <0xb011008 0x4>; /* MSM_APCS_GCC_BASE 4K */
reg-names = "vmpm", "ipc";
- qcom,num-mpm-irqs = <96>;
+ interrupt-controller;
+ interrupt-parent = <&intc>;
+ #interrupt-cells = <3>;
+};
- wakegic: wake-gic {
- compatible = "qcom,mpm-gic", "qcom,mpm-gic-msm8953";
- interrupt-controller;
- #interrupt-cells = <3>;
- interrupt-parent = <&intc>;
- };
+
+One for to monitor the wakeup capable gpio interrupts called wakegpio.
+
+properties:
+
+- compatible:
+ Usage: required
+ Value type: <string>
+ Definition: Should contain "qcom,mpm-gpio" and the respective target compatible flag.
+
+- interrupt-parent:
+ Usage: required
+ Value type: <phandle>
+ Definition: Specifies the interrupt parent necessary for hierarchical domain to operate.
+
+- interrupt-controller:
+ Usage: required
+ Value type: <bool>
+ Definition: Identifies the node as an interrupt controller.
+
+Example:
+
+wakegpio: wake-gpio {
+ compatible = "qcom,mpm-gpio", "qcom,mpm-gpio-msm8953";
+ interrupt-controller;
+ interrupt-parent = <&tlmm>;
+ #interrupt-cells = <2>;
};
diff --git a/Documentation/devicetree/bindings/media/video/msm-cam-cpas.txt b/Documentation/devicetree/bindings/media/video/msm-cam-cpas.txt
index 4b16103..f9bda3b 100644
--- a/Documentation/devicetree/bindings/media/video/msm-cam-cpas.txt
+++ b/Documentation/devicetree/bindings/media/video/msm-cam-cpas.txt
@@ -147,6 +147,13 @@
Definition: Bool property specifying whether Clients are connected
through CAMNOC for AXI access.
+- nvmem-cells
+ Usage: optional
+ Definition: nvmem cell node
+
+- nvmem-cell-names
+ Usage: required
+ Definition: If nvmem node is present, cell name is required
===================================================================
Third Level Node - CAM AXI Port properties
===================================================================
diff --git a/Documentation/devicetree/bindings/media/video/msm-cam-fd.txt b/Documentation/devicetree/bindings/media/video/msm-cam-fd.txt
index cf551f6..c47cb34 100644
--- a/Documentation/devicetree/bindings/media/video/msm-cam-fd.txt
+++ b/Documentation/devicetree/bindings/media/video/msm-cam-fd.txt
@@ -49,7 +49,7 @@
- compatible
Usage: required
Value type: <string>
- Definition: Should be "qcom,fd41".
+ Definition: Should be one of "qcom,fd41", "qcom,fd501".
- reg-names
Usage: optional
diff --git a/Documentation/devicetree/bindings/mhi/msm_mhi_dev.txt b/Documentation/devicetree/bindings/mhi/msm_mhi_dev.txt
index 49d33a3..3017468 100644
--- a/Documentation/devicetree/bindings/mhi/msm_mhi_dev.txt
+++ b/Documentation/devicetree/bindings/mhi/msm_mhi_dev.txt
@@ -19,6 +19,18 @@
- qcom,mhi-ep-msi: End point MSI number.
- qcom,mhi-version: MHI specification version supported by the device.
+Optional property:
+ - qcom,use-ipa-software-channel: If property is present use IPA hardware
+ accelerated path for MHI software channel data transfers
+ between host and device.
+ - qcom,mhi-config-iatu: If property is present map the control and data region
+ between host and device using iatu.
+ - qcom,mhi-interrupt: If property is present register for mhi interrupt.
+ - qcom,mhi-local-pa-base: The physical base address on the device used by the
+ MHI device driver to map the control and data region with the
+ MHI driver on the host. This property is required if iatu
+ property qcom,mhi-config-iatu is present.
+
Example:
mhi: qcom,msm-mhi-dev {
diff --git a/Documentation/devicetree/bindings/power/supply/qcom/qpnp-smb5.txt b/Documentation/devicetree/bindings/power/supply/qcom/qpnp-smb5.txt
index 8f8c87e..b7e6a31b 100644
--- a/Documentation/devicetree/bindings/power/supply/qcom/qpnp-smb5.txt
+++ b/Documentation/devicetree/bindings/power/supply/qcom/qpnp-smb5.txt
@@ -109,10 +109,18 @@
- qcom,auto-recharge-soc
Usage: optional
- Value type: <empty>
- Definition: Specifies if automatic recharge needs to be based off battery
- SOC. If this property is not specified, then auto recharge will
- be based off battery voltage.
+ Value type: <u32>
+ Definition: Specifies the SOC threshold at which the charger will
+ restart charging after termination. The value specified
+ ranges from 0 - 100. The feature is enabled if this
+ property is specified with a valid SOC value.
+
+- qcom,auto-recharge-vbat-mv
+ Usage: optional
+ Value type: <u32>
+ Definition: Specifies the battery voltage threshold at which the charger
+ will restart charging after termination. The value specified
+ is in milli-volts.
- qcom,suspend-input-on-debug-batt
Usage: optional
diff --git a/Documentation/devicetree/bindings/soundwire/swr-wcd-ctrl.txt b/Documentation/devicetree/bindings/soundwire/swr-wcd-ctrl.txt
index 757ca9a..8a67d6d 100644
--- a/Documentation/devicetree/bindings/soundwire/swr-wcd-ctrl.txt
+++ b/Documentation/devicetree/bindings/soundwire/swr-wcd-ctrl.txt
@@ -8,6 +8,7 @@
which the swr-devid is <0x0 0x032000> where 0x03 represents
device Unique_ID, 0x20 represents Part_Id1 and 0x00
represents part_Id2.
+- qcom,swr-num-dev : Maximum number of possible slave devices.
- #address-cells = <2>;
- #size-cells = <0>;
@@ -16,6 +17,7 @@
Example:
swr_master {
compatible = "qcom,swr-wcd";
+ qcom,swr-num-dev = <2>;
#address-cells = <2>;
#size-cells = <0>;
diff --git a/Documentation/devicetree/bindings/usb/msm-phy.txt b/Documentation/devicetree/bindings/usb/msm-phy.txt
index c0a260f..b880890 100644
--- a/Documentation/devicetree/bindings/usb/msm-phy.txt
+++ b/Documentation/devicetree/bindings/usb/msm-phy.txt
@@ -24,6 +24,9 @@
- reset-names: reset signal name strings sorted in the same order as the resets
property.
+Optional properties:
+ - qcom,param-override-seq: parameter override sequence with value, reg offset pair.
+
Example:
hsphy@f9200000 {
compatible = "qcom,usb-hsphy-snps-femto";
@@ -32,6 +35,7 @@
vdda18-supply = <&pm8941_l6>;
vdda33-supply = <&pm8941_l24>;
qcom,vdd-voltage-level = <0 872000 872000>;
+ qcom,param-override-seq = <0x43 0x70>;
};
SSUSB-QMP PHY
diff --git a/arch/arm/boot/dts/qcom/pm8950.dtsi b/arch/arm/boot/dts/qcom/pm8950.dtsi
deleted file mode 100644
index f47872a..0000000
--- a/arch/arm/boot/dts/qcom/pm8950.dtsi
+++ /dev/null
@@ -1,388 +0,0 @@
-/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-&spmi_bus {
- qcom,pm8950@0 {
- compatible ="qcom,spmi-pmic";
- reg = <0x0 SPMI_USID>;
- #address-cells = <2>;
- #size-cells = <0>;
-
- pm8950_revid: qcom,revid@100 {
- compatible = "qcom,qpnp-revid";
- reg = <0x100 0x100>;
- };
-
- pm8950_temp_alarm: qcom,temp-alarm@2400 {
- compatible = "qcom,qpnp-temp-alarm";
- reg = <0x2400 0x100>;
- interrupts = <0x0 0x24 0x0>;
- label = "pm8950_tz";
- qcom,channel-num = <8>;
- qcom,threshold-set = <0>;
- qcom,temp_alarm-vadc = <&pm8950_vadc>;
- };
-
- qcom,power-on@800 {
- compatible = "qcom,qpnp-power-on";
- reg = <0x800 0x100>;
- interrupts = <0x0 0x8 0x0>,
- <0x0 0x8 0x1>,
- <0x0 0x8 0x4>,
- <0x0 0x8 0x5>;
- interrupt-names = "kpdpwr", "resin",
- "resin-bark", "kpdpwr-resin-bark";
- qcom,pon-dbc-delay = <15625>;
- qcom,system-reset;
-
- qcom,pon_1 {
- qcom,pon-type = <0>;
- qcom,pull-up = <1>;
- linux,code = <116>;
- };
-
- qcom,pon_2 {
- qcom,pon-type = <1>;
- qcom,pull-up = <1>;
- linux,code = <114>;
- };
- };
-
- pm8950_coincell: qcom,coincell@2800 {
- compatible = "qcom,qpnp-coincell";
- reg = <0x2800 0x100>;
- };
-
- pm8950_mpps: mpps {
- compatible = "qcom,qpnp-pin";
- spmi-dev-container;
- gpio-controller;
- #gpio-cells = <2>;
- #address-cells = <1>;
- #size-cells = <1>;
- label = "pm8950-mpp";
-
- mpp@a000 {
- reg = <0xa000 0x100>;
- qcom,pin-num = <1>;
- status = "disabled";
- };
-
- mpp@a100 {
- /* MPP2 - PA_THERM config */
- reg = <0xa100 0x100>;
- qcom,pin-num = <2>;
- qcom,mode = <4>; /* AIN input */
- qcom,invert = <1>; /* Enable MPP */
- qcom,ain-route = <1>; /* AMUX 6 */
- qcom,master-en = <1>;
- qcom,src-sel = <0>; /* Function constant */
- };
-
- mpp@a200 {
- reg = <0xa200 0x100>;
- qcom,pin-num = <3>;
- status = "disabled";
- };
-
- mpp@a300 {
- /* MPP4 - CASE_THERM config */
- reg = <0xa300 0x100>;
- qcom,pin-num = <4>;
- qcom,mode = <4>; /* AIN input */
- qcom,invert = <1>; /* Enable MPP */
- qcom,ain-route = <3>; /* AMUX 8 */
- qcom,master-en = <1>;
- qcom,src-sel = <0>; /* Function constant */
- };
- };
-
- pm8950_gpios: gpios {
- spmi-dev-container;
- compatible = "qcom,qpnp-pin";
- gpio-controller;
- #gpio-cells = <2>;
- #address-cells = <1>;
- #size-cells = <1>;
- label = "pm8950-gpio";
-
- gpio@c000 {
- reg = <0xc000 0x100>;
- qcom,pin-num = <1>;
- status = "disabled";
- };
-
- gpio@c100 {
- reg = <0xc100 0x100>;
- qcom,pin-num = <2>;
- status = "disabled";
- };
-
- gpio@c200 {
- reg = <0xc200 0x100>;
- qcom,pin-num = <3>;
- status = "disabled";
- };
-
- gpio@c300 {
- reg = <0xc300 0x100>;
- qcom,pin-num = <4>;
- status = "disabled";
- };
-
- gpio@c400 {
- reg = <0xc400 0x100>;
- qcom,pin-num = <5>;
- status = "disabled";
- };
-
- gpio@c500 {
- reg = <0xc500 0x100>;
- qcom,pin-num = <6>;
- status = "disabled";
- };
-
- gpio@c600 {
- reg = <0xc600 0x100>;
- qcom,pin-num = <7>;
- status = "disabled";
- };
-
- gpio@c700 {
- reg = <0xc700 0x100>;
- qcom,pin-num = <8>;
- status = "disabled";
- };
- };
-
- pm8950_vadc: vadc@3100 {
- compatible = "qcom,qpnp-vadc";
- reg = <0x3100 0x100>;
- #address-cells = <1>;
- #size-cells = <0>;
- interrupts = <0x0 0x31 0x0>;
- interrupt-names = "eoc-int-en-set";
- qcom,adc-bit-resolution = <15>;
- qcom,adc-vdd-reference = <1800>;
- qcom,vadc-poll-eoc;
- qcom,pmic-revid = <&pm8950_revid>;
-
- chan@5 {
- label = "vcoin";
- reg = <5>;
- qcom,decimation = <0>;
- qcom,pre-div-channel-scaling = <1>;
- qcom,calibration-type = "absolute";
- qcom,scale-function = <0>;
- qcom,hw-settle-time = <0>;
- qcom,fast-avg-setup = <0>;
- };
-
- chan@7 {
- label = "vph_pwr";
- reg = <7>;
- qcom,decimation = <0>;
- qcom,pre-div-channel-scaling = <1>;
- qcom,calibration-type = "absolute";
- qcom,scale-function = <0>;
- qcom,hw-settle-time = <0>;
- qcom,fast-avg-setup = <0>;
- };
-
- chan@8 {
- label = "die_temp";
- reg = <8>;
- qcom,decimation = <0>;
- qcom,pre-div-channel-scaling = <0>;
- qcom,calibration-type = "absolute";
- qcom,scale-function = <3>;
- qcom,hw-settle-time = <0>;
- qcom,fast-avg-setup = <0>;
- };
-
- chan@9 {
- label = "ref_625mv";
- reg = <9>;
- qcom,decimation = <0>;
- qcom,pre-div-channel-scaling = <0>;
- qcom,calibration-type = "absolute";
- qcom,scale-function = <0>;
- qcom,hw-settle-time = <0>;
- qcom,fast-avg-setup = <0>;
- };
-
- chan@a {
- label = "ref_1250v";
- reg = <0xa>;
- qcom,decimation = <0>;
- qcom,pre-div-channel-scaling = <0>;
- qcom,calibration-type = "absolute";
- qcom,scale-function = <0>;
- qcom,hw-settle-time = <0>;
- qcom,fast-avg-setup = <0>;
- };
-
- chan@c {
- label = "ref_buf_625mv";
- reg = <0xc>;
- qcom,decimation = <0>;
- qcom,pre-div-channel-scaling = <0>;
- qcom,calibration-type = "absolute";
- qcom,scale-function = <0>;
- qcom,hw-settle-time = <0>;
- qcom,fast-avg-setup = <0>;
- };
-
- chan@36 {
- label = "pa_therm0";
- reg = <0x36>;
- qcom,decimation = <0>;
- qcom,pre-div-channel-scaling = <0>;
- qcom,calibration-type = "ratiometric";
- qcom,scale-function = <2>;
- qcom,hw-settle-time = <2>;
- qcom,fast-avg-setup = <0>;
- };
-
- chan@11 {
- label = "pa_therm1";
- reg = <0x11>;
- qcom,decimation = <0>;
- qcom,pre-div-channel-scaling = <0>;
- qcom,calibration-type = "ratiometric";
- qcom,scale-function = <2>;
- qcom,hw-settle-time = <2>;
- qcom,fast-avg-setup = <0>;
- qcom,vadc-thermal-node;
- };
-
- chan@32 {
- label = "xo_therm";
- reg = <0x32>;
- qcom,decimation = <0>;
- qcom,pre-div-channel-scaling = <0>;
- qcom,calibration-type = "ratiometric";
- qcom,scale-function = <4>;
- qcom,hw-settle-time = <2>;
- qcom,fast-avg-setup = <0>;
- qcom,vadc-thermal-node;
- };
-
- chan@3c {
- label = "xo_therm_buf";
- reg = <0x3c>;
- qcom,decimation = <0>;
- qcom,pre-div-channel-scaling = <0>;
- qcom,calibration-type = "ratiometric";
- qcom,scale-function = <4>;
- qcom,hw-settle-time = <2>;
- qcom,fast-avg-setup = <0>;
- qcom,vadc-thermal-node;
- };
-
- chan@13 {
- label = "case_therm";
- reg = <0x13>;
- qcom,decimation = <0>;
- qcom,pre-div-channel-scaling = <0>;
- qcom,calibration-type = "ratiometric";
- qcom,scale-function = <2>;
- qcom,hw-settle-time = <2>;
- qcom,fast-avg-setup = <0>;
- qcom,vadc-thermal-node;
- };
- };
-
- pm8950_adc_tm: vadc@3400 {
- compatible = "qcom,qpnp-adc-tm";
- reg = <0x3400 0x100>;
- #address-cells = <1>;
- #size-cells = <0>;
- interrupts = <0x0 0x34 0x0>,
- <0x0 0x34 0x3>,
- <0x0 0x34 0x4>;
- interrupt-names = "eoc-int-en-set",
- "high-thr-en-set",
- "low-thr-en-set";
- qcom,adc-bit-resolution = <15>;
- qcom,adc-vdd-reference = <1800>;
- qcom,adc_tm-vadc = <&pm8950_vadc>;
- qcom,pmic-revid = <&pm8950_revid>;
-
- chan@36 {
- label = "pa_therm0";
- reg = <0x36>;
- qcom,decimation = <0>;
- qcom,pre-div-channel-scaling = <0>;
- qcom,calibration-type = "ratiometric";
- qcom,scale-function = <2>;
- qcom,hw-settle-time = <2>;
- qcom,fast-avg-setup = <0>;
- qcom,btm-channel-number = <0x48>;
- qcom,thermal-node;
- };
-
- chan@7 {
- label = "vph_pwr";
- reg = <0x7>;
- qcom,decimation = <0>;
- qcom,pre-div-channel-scaling = <1>;
- qcom,calibration-type = "absolute";
- qcom,scale-function = <0>;
- qcom,hw-settle-time = <0>;
- qcom,fast-avg-setup = <0>;
- qcom,btm-channel-number = <0x68>;
- };
- };
-
- pm8950_rtc: qcom,pm8950_rtc {
- spmi-dev-container;
- compatible = "qcom,qpnp-rtc";
- #address-cells = <1>;
- #size-cells = <1>;
- qcom,qpnp-rtc-write = <0>;
- qcom,qpnp-rtc-alarm-pwrup = <0>;
-
- qcom,pm8950_rtc_rw@6000 {
- reg = <0x6000 0x100>;
- };
-
- qcom,pm8950_rtc_alarm@6100 {
- reg = <0x6100 0x100>;
- interrupts = <0x0 0x61 0x1>;
- };
- };
-
- qcom,leds@a300 {
- compatible = "qcom,leds-qpnp";
- reg = <0xa300 0x100>;
- label = "mpp";
- };
- };
-
- pm8950_1: qcom,pm8950@1 {
- compatible ="qcom,spmi-pmic";
- reg = <0x1 SPMI_USID>;
- #address-cells = <2>;
- #size-cells = <0>;
-
- pm8950_pwm: pwm@bc00 {
- status = "disabled";
- compatible = "qcom,qpnp-pwm";
- reg = <0xbc00 0x100>;
- reg-names = "qpnp-lpg-channel-base";
- qcom,channel-id = <0>;
- qcom,supported-sizes = <6>, <9>;
- #pwm-cells = <2>;
- };
- };
-};
diff --git a/arch/arm/boot/dts/qcom/pmi8950.dtsi b/arch/arm/boot/dts/qcom/pmi8950.dtsi
deleted file mode 100644
index 0ec1f0b..0000000
--- a/arch/arm/boot/dts/qcom/pmi8950.dtsi
+++ /dev/null
@@ -1,641 +0,0 @@
-/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <dt-bindings/msm/power-on.h>
-
-&spmi_bus {
- qcom,pmi8950@2 {
- compatible ="qcom,spmi-pmic";
- reg = <0x2 SPMI_USID>;
- #address-cells = <2>;
- #size-cells = <0>;
-
- pmi8950_revid: qcom,revid@100 {
- compatible = "qcom,qpnp-revid";
- reg = <0x100 0x100>;
- };
-
- qcom,power-on@800 {
- compatible = "qcom,qpnp-power-on";
- reg = <0x800 0x100>;
- qcom,secondary-pon-reset;
- qcom,hard-reset-poweroff-type =
- <PON_POWER_OFF_SHUTDOWN>;
-
- pon_perph_reg: qcom,pon_perph_reg {
- regulator-name = "pon_spare_reg";
- qcom,pon-spare-reg-addr = <0x8c>;
- qcom,pon-spare-reg-bit = <1>;
- };
- };
-
- pmi8950_vadc: vadc@3100 {
- compatible = "qcom,qpnp-vadc";
- reg = <0x3100 0x100>;
- #address-cells = <1>;
- #size-cells = <0>;
- interrupts = <0x2 0x31 0x0>;
- interrupt-names = "eoc-int-en-set";
- qcom,adc-bit-resolution = <15>;
- qcom,adc-vdd-reference = <1800>;
- qcom,vadc-poll-eoc;
-
- chan@0 {
- label = "usbin";
- reg = <0>;
- qcom,decimation = <0>;
- qcom,pre-div-channel-scaling = <4>;
- qcom,calibration-type = "absolute";
- qcom,scale-function = <0>;
- qcom,hw-settle-time = <0>;
- qcom,fast-avg-setup = <0>;
- };
-
- chan@1 {
- label = "dcin";
- reg = <1>;
- qcom,decimation = <0>;
- qcom,pre-div-channel-scaling = <4>;
- qcom,calibration-type = "absolute";
- qcom,scale-function = <0>;
- qcom,hw-settle-time = <0>;
- qcom,fast-avg-setup = <0>;
- };
-
- chan@3 {
- label = "vchg_sns";
- reg = <3>;
- qcom,decimation = <0>;
- qcom,pre-div-channel-scaling = <1>;
- qcom,calibration-type = "absolute";
- qcom,scale-function = <0>;
- qcom,hw-settle-time = <0>;
- qcom,fast-avg-setup = <0>;
- };
-
- chan@9 {
- label = "ref_625mv";
- reg = <9>;
- qcom,decimation = <0>;
- qcom,pre-div-channel-scaling = <0>;
- qcom,calibration-type = "absolute";
- qcom,scale-function = <0>;
- qcom,hw-settle-time = <0>;
- qcom,fast-avg-setup = <0>;
- };
-
- chan@a {
- label = "ref_1250v";
- reg = <0xa>;
- qcom,decimation = <0>;
- qcom,pre-div-channel-scaling = <0>;
- qcom,calibration-type = "absolute";
- qcom,scale-function = <0>;
- qcom,hw-settle-time = <0>;
- qcom,fast-avg-setup = <0>;
- };
-
- chan@d {
- label = "chg_temp";
- reg = <0xd>;
- qcom,decimation = <0>;
- qcom,pre-div-channel-scaling = <0>;
- qcom,calibration-type = "absolute";
- qcom,scale-function = <16>;
- qcom,hw-settle-time = <0>;
- qcom,fast-avg-setup = <0>;
- qcom,vadc-thermal-node;
- };
-
- chan@43 {
- label = "usb_dp";
- reg = <0x43>;
- qcom,decimation = <0>;
- qcom,pre-div-channel-scaling = <1>;
- qcom,calibration-type = "absolute";
- qcom,scale-function = <0>;
- qcom,hw-settle-time = <0>;
- qcom,fast-avg-setup = <0>;
- };
-
- chan@44 {
- label = "usb_dm";
- reg = <0x44>;
- qcom,decimation = <0>;
- qcom,pre-div-channel-scaling = <1>;
- qcom,calibration-type = "absolute";
- qcom,scale-function = <0>;
- qcom,hw-settle-time = <0>;
- qcom,fast-avg-setup = <0>;
- };
- };
-
- pmi8950_gpios: gpios {
- spmi-dev-container;
- compatible = "qcom,qpnp-pin";
- gpio-controller;
- #gpio-cells = <2>;
- #address-cells = <1>;
- #size-cells = <1>;
- label = "pmi8950-gpio";
-
- gpio@c000 {
- reg = <0xc000 0x100>;
- qcom,pin-num = <1>;
- status = "disabled";
- };
-
- gpio@c100 {
- reg = <0xc100 0x100>;
- qcom,pin-num = <2>;
- status = "disabled";
- };
- };
-
- pmi8950_mpps: mpps {
- spmi-dev-container;
- compatible = "qcom,qpnp-pin";
- gpio-controller;
- #gpio-cells = <2>;
- #address-cells = <1>;
- #size-cells = <1>;
- label = "pmi8950-mpp";
-
- mpp@a000 {
- reg = <0xa000 0x100>;
- qcom,pin-num = <1>;
- status = "disabled";
- };
-
- mpp@a100 {
- reg = <0xa100 0x100>;
- qcom,pin-num = <2>;
- status = "disabled";
- };
-
- mpp@a200 {
- reg = <0xa200 0x100>;
- qcom,pin-num = <3>;
- status = "disabled";
- };
-
- mpp@a300 {
- reg = <0xa300 0x100>;
- qcom,pin-num = <4>;
- status = "disabled";
- };
- };
-
- pmi8950_charger: qcom,qpnp-smbcharger {
- spmi-dev-container;
- compatible = "qcom,qpnp-smbcharger";
- #address-cells = <1>;
- #size-cells = <1>;
-
- qcom,iterm-ma = <100>;
- qcom,float-voltage-mv = <4200>;
- qcom,resume-delta-mv = <200>;
- qcom,chg-inhibit-fg;
- qcom,rparasitic-uohm = <100000>;
- qcom,bms-psy-name = "bms";
- qcom,thermal-mitigation = <1500 700 600 0>;
- qcom,parallel-usb-min-current-ma = <1400>;
- qcom,parallel-usb-9v-min-current-ma = <900>;
- qcom,parallel-allowed-lowering-ma = <500>;
- qcom,pmic-revid = <&pmi8950_revid>;
- qcom,force-aicl-rerun;
- qcom,aicl-rerun-period-s = <180>;
- qcom,autoadjust-vfloat;
-
- qcom,chgr@1000 {
- reg = <0x1000 0x100>;
- interrupts = <0x2 0x10 0x0>,
- <0x2 0x10 0x1>,
- <0x2 0x10 0x2>,
- <0x2 0x10 0x3>,
- <0x2 0x10 0x4>,
- <0x2 0x10 0x5>,
- <0x2 0x10 0x6>,
- <0x2 0x10 0x7>;
-
- interrupt-names = "chg-error",
- "chg-inhibit",
- "chg-prechg-sft",
- "chg-complete-chg-sft",
- "chg-p2f-thr",
- "chg-rechg-thr",
- "chg-taper-thr",
- "chg-tcc-thr";
- };
-
- qcom,otg@1100 {
- reg = <0x1100 0x100>;
- interrupts = <0x2 0x11 0x0>,
- <0x2 0x11 0x1>,
- <0x2 0x11 0x3>;
- interrupt-names = "otg-fail",
- "otg-oc",
- "usbid-change";
- };
-
- qcom,bat-if@1200 {
- reg = <0x1200 0x100>;
- interrupts = <0x2 0x12 0x0>,
- <0x2 0x12 0x1>,
- <0x2 0x12 0x2>,
- <0x2 0x12 0x3>,
- <0x2 0x12 0x4>,
- <0x2 0x12 0x5>,
- <0x2 0x12 0x6>,
- <0x2 0x12 0x7>;
-
- interrupt-names = "batt-hot",
- "batt-warm",
- "batt-cold",
- "batt-cool",
- "batt-ov",
- "batt-low",
- "batt-missing",
- "batt-term-missing";
- };
-
- qcom,usb-chgpth@1300 {
- reg = <0x1300 0x100>;
- interrupts = <0x2 0x13 0x0>,
- <0x2 0x13 0x1>,
- <0x2 0x13 0x2>,
- <0x2 0x13 0x5>;
-
- interrupt-names = "usbin-uv",
- "usbin-ov",
- "usbin-src-det",
- "aicl-done";
- };
-
- qcom,dc-chgpth@1400 {
- reg = <0x1400 0x100>;
- interrupts = <0x2 0x14 0x0>,
- <0x2 0x14 0x1>;
- interrupt-names = "dcin-uv",
- "dcin-ov";
- };
-
- qcom,chgr-misc@1600 {
- reg = <0x1600 0x100>;
- interrupts = <0x2 0x16 0x0>,
- <0x2 0x16 0x1>,
- <0x2 0x16 0x2>,
- <0x2 0x16 0x3>,
- <0x2 0x16 0x4>,
- <0x2 0x16 0x5>;
-
- interrupt-names = "power-ok",
- "temp-shutdown",
- "wdog-timeout",
- "flash-fail",
- "otst2",
- "otst3";
- };
-
- smbcharger_charger_otg: qcom,smbcharger-boost-otg {
- regulator-name = "smbcharger_charger_otg";
- };
- };
-
- pmi8950_fg: qcom,fg {
- spmi-dev-container;
- compatible = "qcom,qpnp-fg";
- #address-cells = <1>;
- #size-cells = <1>;
- qcom,resume-soc = <95>;
- status = "okay";
- qcom,bcl-lm-threshold-ma = <127>;
- qcom,bcl-mh-threshold-ma = <405>;
- qcom,fg-iterm-ma = <150>;
- qcom,fg-chg-iterm-ma = <100>;
- qcom,pmic-revid = <&pmi8950_revid>;
- qcom,fg-cutoff-voltage-mv = <3500>;
- qcom,cycle-counter-en;
- qcom,capacity-learning-on;
-
- qcom,fg-soc@4000 {
- status = "okay";
- reg = <0x4000 0x100>;
- interrupts = <0x2 0x40 0x0>,
- <0x2 0x40 0x1>,
- <0x2 0x40 0x2>,
- <0x2 0x40 0x3>,
- <0x2 0x40 0x4>,
- <0x2 0x40 0x5>,
- <0x2 0x40 0x6>;
-
- interrupt-names = "high-soc",
- "low-soc",
- "full-soc",
- "empty-soc",
- "delta-soc",
- "first-est-done",
- "update-soc";
- };
-
- qcom,fg-batt@4100 {
- reg = <0x4100 0x100>;
- interrupts = <0x2 0x41 0x0>,
- <0x2 0x41 0x1>,
- <0x2 0x41 0x2>,
- <0x2 0x41 0x3>,
- <0x2 0x41 0x4>,
- <0x2 0x41 0x5>,
- <0x2 0x41 0x6>,
- <0x2 0x41 0x7>;
-
- interrupt-names = "soft-cold",
- "soft-hot",
- "vbatt-low",
- "batt-ided",
- "batt-id-req",
- "batt-unknown",
- "batt-missing",
- "batt-match";
- };
-
- qcom,revid-tp-rev@1f1 {
- reg = <0x1f1 0x1>;
- };
-
- qcom,fg-memif@4400 {
- status = "okay";
- reg = <0x4400 0x100>;
- interrupts = <0x2 0x44 0x0>,
- <0x2 0x44 0x2>;
-
- interrupt-names = "mem-avail",
- "data-rcvry-sug";
- };
- };
-
- bcl@4200 {
- compatible = "qcom,msm-bcl";
- reg = <0x4200 0xFF 0x88E 0x2>;
- reg-names = "fg_user_adc", "pon_spare";
- interrupts = <0x2 0x42 0x0>,
- <0x2 0x42 0x1>;
- interrupt-names = "bcl-high-ibat-int",
- "bcl-low-vbat-int";
- qcom,vbat-scaling-factor = <39000>;
- qcom,vbat-gain-numerator = <1>;
- qcom,vbat-gain-denominator = <128>;
- qcom,vbat-polling-delay-ms = <100>;
- qcom,ibat-scaling-factor = <39000>;
- qcom,ibat-gain-numerator = <1>;
- qcom,ibat-gain-denominator = <128>;
- qcom,ibat-offset-numerator = <1200>;
- qcom,ibat-offset-denominator = <1>;
- qcom,ibat-polling-delay-ms = <100>;
- qcom,inhibit-derating-ua = <550000>;
- };
-
- qcom,leds@a100 {
- compatible = "qcom,leds-qpnp";
- reg = <0xa100 0x100>;
- label = "mpp";
- };
- };
-
- qcom,pmi8950@3 {
- compatible ="qcom,spmi-pmic";
- reg = <0x3 SPMI_USID>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- pmi8950_pwm: pwm@b000 {
- status = "disabled";
- compatible = "qcom,qpnp-pwm";
- reg = <0xb000 0x100>;
- reg-names = "qpnp-lpg-channel-base";
- qcom,channel-id = <0>;
- qcom,supported-sizes = <6>, <9>;
- #pwm-cells = <2>;
- };
-
- labibb: qpnp-labibb-regulator {
- status = "disabled";
- spmi-dev-container;
- compatible = "qcom,qpnp-labibb-regulator";
- #address-cells = <1>;
- #size-cells = <1>;
- qcom,pmic-revid = <&pmi8950_revid>;
-
- ibb_regulator: qcom,ibb@dc00 {
- reg = <0xdc00 0x100>;
- reg-names = "ibb_reg";
- regulator-name = "ibb_reg";
-
- regulator-min-microvolt = <4600000>;
- regulator-max-microvolt = <6000000>;
-
- qcom,qpnp-ibb-min-voltage = <1400000>;
- qcom,qpnp-ibb-step-size = <100000>;
- qcom,qpnp-ibb-slew-rate = <2000000>;
- qcom,qpnp-ibb-use-default-voltage;
- qcom,qpnp-ibb-init-voltage = <5500000>;
- qcom,qpnp-ibb-init-amoled-voltage = <4000000>;
- qcom,qpnp-ibb-init-lcd-voltage = <5500000>;
-
- qcom,qpnp-ibb-soft-start = <1000>;
-
- qcom,qpnp-ibb-discharge-resistor = <32>;
- qcom,qpnp-ibb-lab-pwrup-delay = <8000>;
- qcom,qpnp-ibb-lab-pwrdn-delay = <8000>;
- qcom,qpnp-ibb-en-discharge;
-
- qcom,qpnp-ibb-full-pull-down;
- qcom,qpnp-ibb-pull-down-enable;
- qcom,qpnp-ibb-switching-clock-frequency =
- <1480>;
- qcom,qpnp-ibb-limit-maximum-current = <1550>;
- qcom,qpnp-ibb-debounce-cycle = <16>;
- qcom,qpnp-ibb-limit-max-current-enable;
- qcom,qpnp-ibb-ps-enable;
- };
-
- lab_regulator: qcom,lab@de00 {
- reg = <0xde00 0x100>;
- reg-names = "lab";
- regulator-name = "lab_reg";
-
- regulator-min-microvolt = <4600000>;
- regulator-max-microvolt = <6000000>;
-
- qcom,qpnp-lab-min-voltage = <4600000>;
- qcom,qpnp-lab-step-size = <100000>;
- qcom,qpnp-lab-slew-rate = <5000>;
- qcom,qpnp-lab-use-default-voltage;
- qcom,qpnp-lab-init-voltage = <5500000>;
- qcom,qpnp-lab-init-amoled-voltage = <4600000>;
- qcom,qpnp-lab-init-lcd-voltage = <5500000>;
-
- qcom,qpnp-lab-soft-start = <800>;
-
- qcom,qpnp-lab-full-pull-down;
- qcom,qpnp-lab-pull-down-enable;
- qcom,qpnp-lab-switching-clock-frequency =
- <1600>;
- qcom,qpnp-lab-limit-maximum-current = <800>;
- qcom,qpnp-lab-limit-max-current-enable;
- qcom,qpnp-lab-ps-threshold = <40>;
- qcom,qpnp-lab-ps-enable;
- qcom,qpnp-lab-nfet-size = <100>;
- qcom,qpnp-lab-pfet-size = <100>;
- qcom,qpnp-lab-max-precharge-time = <500>;
- };
-
- };
-
- wled: qcom,leds@d800 {
- compatible = "qcom,qpnp-wled";
- reg = <0xd800 0x100>,
- <0xd900 0x100>,
- <0xdc00 0x100>,
- <0xde00 0x100>;
- reg-names = "qpnp-wled-ctrl-base",
- "qpnp-wled-sink-base",
- "qpnp-wled-ibb-base",
- "qpnp-wled-lab-base";
- interrupts = <0x3 0xd8 0x2>;
- interrupt-names = "sc-irq";
- status = "okay";
- linux,name = "wled";
- linux,default-trigger = "bkl-trigger";
- qcom,fdbk-output = "auto";
- qcom,vref-mv = <350>;
- qcom,switch-freq-khz = <800>;
- qcom,ovp-mv = <29500>;
- qcom,ilim-ma = <980>;
- qcom,boost-duty-ns = <26>;
- qcom,mod-freq-khz = <9600>;
- qcom,dim-mode = "hybrid";
- qcom,dim-method = "linear";
- qcom,hyb-thres = <625>;
- qcom,sync-dly-us = <800>;
- qcom,fs-curr-ua = <20000>;
- qcom,led-strings-list = [00 01];
- qcom,en-ext-pfet-sc-pro;
- qcom,cons-sync-write-delay-us = <1000>;
- };
-
- flash_led: qcom,leds@d300 {
- compatible = "qcom,qpnp-flash-led";
- status = "okay";
- reg = <0xd300 0x100>;
- label = "flash";
- qcom,headroom = <500>;
- qcom,startup-dly = <128>;
- qcom,clamp-curr = <200>;
- qcom,pmic-charger-support;
- qcom,self-check-enabled;
- qcom,thermal-derate-enabled;
- qcom,thermal-derate-threshold = <100>;
- qcom,thermal-derate-rate = "5_PERCENT";
- qcom,current-ramp-enabled;
- qcom,ramp_up_step = "6P7_US";
- qcom,ramp_dn_step = "6P7_US";
- qcom,vph-pwr-droop-enabled;
- qcom,vph-pwr-droop-threshold = <3000>;
- qcom,vph-pwr-droop-debounce-time = <10>;
- qcom,headroom-sense-ch0-enabled;
- qcom,headroom-sense-ch1-enabled;
- qcom,pmic-revid = <&pmi8950_revid>;
-
- pmi8950_flash0: qcom,flash_0 {
- label = "flash";
- qcom,led-name = "led:flash_0";
- qcom,default-led-trigger =
- "flash0_trigger";
- qcom,max-current = <1000>;
- qcom,duration = <1280>;
- qcom,id = <0>;
- qcom,current = <625>;
- };
-
- pmi8950_flash1: qcom,flash_1 {
- label = "flash";
- qcom,led-name = "led:flash_1";
- qcom,default-led-trigger =
- "flash1_trigger";
- qcom,max-current = <1000>;
- qcom,duration = <1280>;
- qcom,id = <1>;
- qcom,current = <625>;
- };
-
- pmi8950_torch0: qcom,torch_0 {
- label = "torch";
- qcom,led-name = "led:torch_0";
- qcom,default-led-trigger =
- "torch0_trigger";
- qcom,max-current = <200>;
- qcom,id = <0>;
- qcom,current = <120>;
- };
-
- pmi8950_torch1: qcom,torch_1 {
- label = "torch";
- qcom,led-name = "led:torch_1";
- qcom,default-led-trigger =
- "torch1_trigger";
- qcom,max-current = <200>;
- qcom,id = <1>;
- qcom,current = <120>;
- };
-
- pmi8950_switch: qcom,switch {
- label = "switch";
- qcom,led-name = "led:switch";
- qcom,default-led-trigger =
- "switch_trigger";
- qcom,max-current = <1000>;
- qcom,duration = <1280>;
- qcom,id = <2>;
- qcom,current = <625>;
- reg0 {
- regulator-name = "pon_spare_reg";
- };
- };
- };
-
- pmi_haptic: qcom,haptic@c000 {
- compatible = "qcom,qpnp-haptic";
- reg = <0xc000 0x100>;
- interrupts = <0x3 0xc0 0x0>,
- <0x3 0xc0 0x1>;
- interrupt-names = "sc-irq", "play-irq";
- qcom,pmic-revid = <&pmi8950_revid>;
- vcc_pon-supply = <&pon_perph_reg>;
- qcom,play-mode = "direct";
- qcom,wave-play-rate-us = <5263>;
- qcom,actuator-type = "erm";
- qcom,wave-shape = "square";
- qcom,vmax-mv = <2000>;
- qcom,ilim-ma = <800>;
- qcom,sc-deb-cycles = <8>;
- qcom,int-pwm-freq-khz = <505>;
- qcom,en-brake;
- qcom,brake-pattern = [03 03 00 00];
- qcom,use-play-irq;
- qcom,use-sc-irq;
- qcom,wave-samples = [3e 3e 3e 3e 3e 3e 3e 3e];
- qcom,wave-rep-cnt = <1>;
- qcom,wave-samp-rep-cnt = <1>;
- };
- };
-};
diff --git a/arch/arm/boot/dts/qcom/sdxpoorwills-coresight.dtsi b/arch/arm/boot/dts/qcom/sdxpoorwills-coresight.dtsi
index eb5c210..c652a44 100644
--- a/arch/arm/boot/dts/qcom/sdxpoorwills-coresight.dtsi
+++ b/arch/arm/boot/dts/qcom/sdxpoorwills-coresight.dtsi
@@ -504,7 +504,7 @@
};
port@2 {
- reg = <3>;
+ reg = <1>;
funnel_in1_in_modem_etm0: endpoint {
slave-mode;
remote-endpoint =
diff --git a/arch/arm/boot/dts/qcom/sdxpoorwills-pcie-ep-cdp.dts b/arch/arm/boot/dts/qcom/sdxpoorwills-pcie-ep-cdp.dts
index e90d97d..546c20c 100644
--- a/arch/arm/boot/dts/qcom/sdxpoorwills-pcie-ep-cdp.dts
+++ b/arch/arm/boot/dts/qcom/sdxpoorwills-pcie-ep-cdp.dts
@@ -21,6 +21,10 @@
qcom,board-id = <1 0x1>, <1 0x101>;
};
+&vbus_detect {
+ status = "okay";
+};
+
&pcie_ep {
status = "okay";
};
@@ -28,3 +32,7 @@
&pcie0 {
status = "disabled";
};
+
+&mhi_device {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/qcom/sdxpoorwills-pcie-ep-mtp.dts b/arch/arm/boot/dts/qcom/sdxpoorwills-pcie-ep-mtp.dts
index 86d8636..8ca6383 100644
--- a/arch/arm/boot/dts/qcom/sdxpoorwills-pcie-ep-mtp.dts
+++ b/arch/arm/boot/dts/qcom/sdxpoorwills-pcie-ep-mtp.dts
@@ -21,6 +21,10 @@
qcom,board-id = <8 0x1>, <8 0x101>;
};
+&vbus_detect {
+ status = "okay";
+};
+
&pcie_ep {
status = "okay";
};
@@ -28,3 +32,7 @@
&pcie0 {
status = "disabled";
};
+
+&mhi_device {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/qcom/sdxpoorwills-pinctrl.dtsi b/arch/arm/boot/dts/qcom/sdxpoorwills-pinctrl.dtsi
index 6c172c1..e3f49d0 100644
--- a/arch/arm/boot/dts/qcom/sdxpoorwills-pinctrl.dtsi
+++ b/arch/arm/boot/dts/qcom/sdxpoorwills-pinctrl.dtsi
@@ -1465,6 +1465,64 @@
input-enable;
};
};
+
+ cnss_pins {
+ cnss_wlan_en_active: cnss_wlan_en_active {
+ mux {
+ pins = "gpio52";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio52";
+ drive-strength = <16>;
+ output-high;
+ bias-pull-up;
+ };
+ };
+
+ cnss_wlan_en_sleep: cnss_wlan_en_sleep {
+ mux {
+ pins = "gpio52";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio52";
+ drive-strength = <2>;
+ output-low;
+ bias-pull-down;
+ };
+ };
+
+ cnss_sdio_active: cnss_sdio_active {
+ mux {
+ pins = "gpio31";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio31";
+ drive-strength = <16>;
+ output-high;
+ bias-pull-up;
+ };
+ };
+
+ cnss_sdio_sleep: cnss_sdio_sleep {
+ mux {
+ pins = "gpio31";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio31";
+ drive-strength = <2>;
+ output-low;
+ bias-pull-down;
+ };
+ };
+ };
};
};
@@ -1475,4 +1533,11 @@
bias-high-impedance;
};
};
+
+ vdd_wlan {
+ vdd_wlan_default: vdd_wlan_default {
+ pins = "gpio6";
+ bias-high-impedance;
+ };
+ };
};
diff --git a/arch/arm/boot/dts/qcom/sdxpoorwills-regulator.dtsi b/arch/arm/boot/dts/qcom/sdxpoorwills-regulator.dtsi
index 162f0d9..7543f7c 100644
--- a/arch/arm/boot/dts/qcom/sdxpoorwills-regulator.dtsi
+++ b/arch/arm/boot/dts/qcom/sdxpoorwills-regulator.dtsi
@@ -404,4 +404,12 @@
gpio = <&tlmm 83 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
+
+ vreg_wlan: vreg_wlan {
+ compatible = "regulator-fixed";
+ regulator-name = "vreg_wlan";
+ startup-delay-us = <4000>;
+ enable-active-high;
+ gpio = <&pmxpoorwills_gpios 6 GPIO_ACTIVE_HIGH>;
+ };
};
diff --git a/arch/arm/boot/dts/qcom/sdxpoorwills-usb.dtsi b/arch/arm/boot/dts/qcom/sdxpoorwills-usb.dtsi
index ec65472..3bccd8a 100644
--- a/arch/arm/boot/dts/qcom/sdxpoorwills-usb.dtsi
+++ b/arch/arm/boot/dts/qcom/sdxpoorwills-usb.dtsi
@@ -126,6 +126,9 @@
resets = <&clock_gcc GCC_QUSB2PHY_BCR>;
reset-names = "phy_reset";
+
+ /* override parameters */
+ qcom,param-override-seq = <0x43 0x70>; /* override_x1 */
};
dbm_1p5: dbm@a6f8000 {
diff --git a/arch/arm/boot/dts/qcom/sdxpoorwills.dtsi b/arch/arm/boot/dts/qcom/sdxpoorwills.dtsi
index 8f59515..d9a84d9 100644
--- a/arch/arm/boot/dts/qcom/sdxpoorwills.dtsi
+++ b/arch/arm/boot/dts/qcom/sdxpoorwills.dtsi
@@ -61,6 +61,12 @@
reusable;
size = <0x400000>;
};
+
+ dump_mem: mem_dump_region {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0 0x2400000>;
+ };
};
cpus {
@@ -419,6 +425,23 @@
status = "disabled";
};
+ mhi_device: mhi_dev@1c04000 {
+ compatible = "qcom,msm-mhi-dev";
+ reg = <0x1c04000 0x1000>,
+ <0x1e22000 0x4>,
+ <0x1e22148 0x4>;
+ reg-names = "mhi_mmio_base", "ipa_uc_mbox_crdb",
+ "ipa_uc_mbox_erdb";
+ qcom,mhi-ep-msi = <0>;
+ qcom,mhi-version = <0x1000000>;
+ qcom,use-ipa-software-channel;
+ interrupts = <0 145 0>;
+ interrupt-names = "mhi-device-inta";
+ qcom,mhi-ifc-id = <0x030417cb>;
+ qcom,mhi-interrupt;
+ status = "disabled";
+ };
+
gdsc_emac: qcom,gdsc@147004 {
compatible = "qcom,gdsc";
regulator-name = "gdsc_emac";
@@ -710,6 +733,56 @@
reg = <0xc37000c 8>;
};
+ mem_dump {
+ compatible = "qcom,mem-dump";
+ memory-region = <&dump_mem>;
+
+ rpmh_dump {
+ qcom,dump-size = <0x2000000>;
+ qcom,dump-id = <0xec>;
+ };
+
+ fcm_dump {
+ qcom,dump-size = <0x8400>;
+ qcom,dump-id = <0xee>;
+ };
+
+ rpm_sw_dump {
+ qcom,dump-size = <0x28000>;
+ qcom,dump-id = <0xea>;
+ };
+
+ pmic_dump {
+ qcom,dump-size = <0x10000>;
+ qcom,dump-id = <0xe4>;
+ };
+
+ tmc_etf_dump {
+ qcom,dump-size = <0x10000>;
+ qcom,dump-id = <0xf0>;
+ };
+
+ tmc_etr_reg_dump {
+ qcom,dump-size = <0x1000>;
+ qcom,dump-id = <0x100>;
+ };
+
+ tmc_etf_reg_dump {
+ qcom,dump-size = <0x1000>;
+ qcom,dump-id = <0x101>;
+ };
+
+ misc_data_dump {
+ qcom,dump-size = <0x1000>;
+ qcom,dump-id = <0xe8>;
+ };
+
+ tpdm_swao_dump {
+ qcom,dump-size = <0x512>;
+ qcom,dump-id = <0xf2>;
+ };
+ };
+
qcom,msm_gsi {
compatible = "qcom,msm_gsi";
};
@@ -895,11 +968,11 @@
#mbox-cells = <1>;
};
- usb_detect: qcom,gpio-usbdetect {
- compatible = "qcom,gpio-usbdetect";
+ vbus_detect: qcom,pmd-vbus-det {
+ compatible = "qcom,pmd-vbus-det";
interrupt-parent = <&spmi_bus>;
interrupts = <0x0 0x0d 0x0 IRQ_TYPE_NONE>;
- interrupt-names = "vbus_det_irq";
+ interrupt-names = "usb_vbus";
status = "disabled";
};
@@ -997,6 +1070,46 @@
compatible = "qcom,msm-rtb";
qcom,rtb-size = <0x100000>;
};
+
+ cnss_pcie: qcom,cnss {
+ compatible = "qcom,cnss";
+ wlan-en-gpio = <&tlmm 52 0>;
+ vdd-wlan-supply = <&vreg_wlan>;
+ vdd-wlan-xtal-supply = <&pmxpoorwills_l6>;
+ vdd-wlan-io-supply = <&pmxpoorwills_l6>;
+ qcom,notify-modem-status;
+ pinctrl-names = "wlan_en_active", "wlan_en_sleep";
+ pinctrl-0 = <&cnss_wlan_en_active>;
+ pinctrl-1 = <&cnss_wlan_en_sleep>;
+ qcom,wlan-rc-num = <0>;
+ qcom,wlan-ramdump-dynamic = <0x200000>;
+
+ qcom,msm-bus,name = "msm-cnss";
+ qcom,msm-bus,num-cases = <4>;
+ qcom,msm-bus,num-paths = <2>;
+ qcom,msm-bus,vectors-KBps =
+ <45 512 0 0>, <1 512 0 0>,
+ /* Upto 200 Mbps */
+ <45 512 41421 655360>, <1 512 41421 655360>,
+ /* Upto 400 Mbps */
+ <45 512 98572 655360>, <1 512 98572 1600000>,
+ /* Upto 800 Mbps */
+ <45 512 207108 1146880>, <1 512 207108 3124992>;
+ };
+
+ cnss_sdio: qcom,cnss_sdio {
+ compatible = "qcom,cnss_sdio";
+ subsys-name = "AR6320_SDIO";
+ vdd-wlan-supply = <&vreg_wlan>;
+ vdd-wlan-xtal-supply = <&pmxpoorwills_l5>;
+ vdd-wlan-io-supply = <&pmxpoorwills_l6>;
+ qcom,wlan-ramdump-dynamic = <0x200000>;
+ pinctrl-names = "active", "sleep";
+ pinctrl-0 = <&cnss_sdio_active>;
+ pinctrl-1 = <&cnss_sdio_sleep>;
+ qcom,is-antenna-shared;
+ status = "disabled";
+ };
};
#include "pmxpoorwills.dtsi"
diff --git a/arch/arm/configs/msm8953-perf_defconfig b/arch/arm/configs/msm8953-perf_defconfig
index 7f4120f..b1d4015 100644
--- a/arch/arm/configs/msm8953-perf_defconfig
+++ b/arch/arm/configs/msm8953-perf_defconfig
@@ -288,8 +288,10 @@
# CONFIG_SERIO_SERPORT is not set
# CONFIG_VT is not set
# CONFIG_LEGACY_PTYS is not set
+CONFIG_SERIAL_MSM_SMD=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_MSM_LEGACY=y
+CONFIG_MSM_SMD_PKT=y
CONFIG_MSM_ADSPRPC=y
CONFIG_MSM_RDBG=m
CONFIG_I2C_CHARDEV=y
@@ -456,6 +458,7 @@
CONFIG_USB_BAM=y
CONFIG_REMOTE_SPINLOCK_MSM=y
CONFIG_MAILBOX=y
+CONFIG_QCOM_RUN_QUEUE_STATS=y
CONFIG_MSM_SPM=y
CONFIG_MSM_L2_SPM=y
CONFIG_MSM_BOOT_STATS=y
@@ -468,14 +471,9 @@
CONFIG_MSM_SMEM=y
CONFIG_MSM_SMD=y
CONFIG_MSM_SMD_DEBUG=y
-CONFIG_MSM_GLINK=y
-CONFIG_MSM_GLINK_LOOPBACK_SERVER=y
-CONFIG_MSM_GLINK_SMEM_NATIVE_XPRT=y
-CONFIG_MSM_GLINK_SPI_XPRT=y
CONFIG_MSM_SMP2P=y
-CONFIG_MSM_IPC_ROUTER_GLINK_XPRT=y
+CONFIG_MSM_IPC_ROUTER_SMD_XPRT=y
CONFIG_MSM_QMI_INTERFACE=y
-CONFIG_MSM_GLINK_PKT=y
CONFIG_MSM_SUBSYSTEM_RESTART=y
CONFIG_MSM_PIL=y
CONFIG_MSM_PIL_SSR_GENERIC=y
@@ -486,6 +484,9 @@
CONFIG_MSM_PM=y
CONFIG_QTI_RPM_STATS_LOG=y
CONFIG_QCOM_FORCE_WDOG_BITE_ON_PANIC=y
+CONFIG_MSM_BAM_DMUX=y
+CONFIG_QCOM_BIMC_BWMON=y
+CONFIG_DEVFREQ_GOV_QCOM_BW_HWMON=y
CONFIG_QCOM_DEVFREQ_DEVBW=y
CONFIG_PWM=y
CONFIG_PWM_QPNP=y
diff --git a/arch/arm/configs/msm8953_defconfig b/arch/arm/configs/msm8953_defconfig
index 2f76154..714ec77 100644
--- a/arch/arm/configs/msm8953_defconfig
+++ b/arch/arm/configs/msm8953_defconfig
@@ -300,8 +300,10 @@
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_MSM=y
CONFIG_SERIAL_MSM_CONSOLE=y
+CONFIG_SERIAL_MSM_SMD=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_MSM_LEGACY=y
+CONFIG_MSM_SMD_PKT=y
CONFIG_MSM_ADSPRPC=y
CONFIG_MSM_RDBG=m
CONFIG_I2C_CHARDEV=y
@@ -472,6 +474,7 @@
CONFIG_REMOTE_SPINLOCK_MSM=y
CONFIG_MAILBOX=y
# CONFIG_IOMMU_SUPPORT is not set
+CONFIG_QCOM_RUN_QUEUE_STATS=y
CONFIG_MSM_SPM=y
CONFIG_MSM_L2_SPM=y
CONFIG_MSM_BOOT_STATS=y
@@ -486,15 +489,10 @@
CONFIG_MSM_SMEM=y
CONFIG_MSM_SMD=y
CONFIG_MSM_SMD_DEBUG=y
-CONFIG_MSM_GLINK=y
-CONFIG_MSM_GLINK_LOOPBACK_SERVER=y
-CONFIG_MSM_GLINK_SMEM_NATIVE_XPRT=y
-CONFIG_MSM_GLINK_SPI_XPRT=y
CONFIG_TRACER_PKT=y
CONFIG_MSM_SMP2P=y
-CONFIG_MSM_IPC_ROUTER_GLINK_XPRT=y
+CONFIG_MSM_IPC_ROUTER_SMD_XPRT=y
CONFIG_MSM_QMI_INTERFACE=y
-CONFIG_MSM_GLINK_PKT=y
CONFIG_MSM_SUBSYSTEM_RESTART=y
CONFIG_MSM_PIL=y
CONFIG_MSM_PIL_SSR_GENERIC=y
@@ -505,6 +503,9 @@
CONFIG_MSM_PM=y
CONFIG_QTI_RPM_STATS_LOG=y
CONFIG_QCOM_FORCE_WDOG_BITE_ON_PANIC=y
+CONFIG_MSM_BAM_DMUX=y
+CONFIG_QCOM_BIMC_BWMON=y
+CONFIG_DEVFREQ_GOV_QCOM_BW_HWMON=y
CONFIG_QCOM_DEVFREQ_DEVBW=y
CONFIG_PWM=y
CONFIG_PWM_QPNP=y
diff --git a/arch/arm/configs/sdxpoorwills-perf_defconfig b/arch/arm/configs/sdxpoorwills-perf_defconfig
index c39097c..54fc9eb 100644
--- a/arch/arm/configs/sdxpoorwills-perf_defconfig
+++ b/arch/arm/configs/sdxpoorwills-perf_defconfig
@@ -142,6 +142,7 @@
CONFIG_BRIDGE_EBT_DNAT=y
CONFIG_BRIDGE_EBT_SNAT=y
CONFIG_BRIDGE=y
+CONFIG_VLAN_8021Q=y
CONFIG_NET_SCHED=y
CONFIG_NET_SCH_PRIO=y
CONFIG_RMNET_DATA=y
@@ -199,7 +200,12 @@
CONFIG_USB_NET_SMSC75XX=y
CONFIG_USB_NET_SMSC95XX=y
CONFIG_WCNSS_MEM_PRE_ALLOC=y
+CONFIG_CNSS=y
+CONFIG_CNSS_SDIO=y
+CONFIG_CNSS_PCI=y
+CONFIG_CLD_HL_SDIO_CORE=y
CONFIG_CLD_LL_CORE=y
+CONFIG_CNSS_LOGGER=y
# CONFIG_INPUT_MOUSEDEV is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_KEYBOARD is not set
@@ -324,7 +330,6 @@
CONFIG_EP_PCIE=y
CONFIG_EP_PCIE_HW=y
CONFIG_QPNP_REVID=y
-CONFIG_GPIO_USB_DETECT=y
CONFIG_USB_BAM=y
CONFIG_MSM_CLK_RPMH=y
CONFIG_MSM_CLK_AOP_QMP=y
@@ -341,6 +346,7 @@
CONFIG_QCOM_SCM=y
CONFIG_MSM_BOOT_STATS=y
CONFIG_QCOM_WATCHDOG_V2=y
+CONFIG_QCOM_MEMORY_DUMP_V2=y
CONFIG_QCOM_BUS_SCALING=y
CONFIG_QCOM_BUS_CONFIG_RPMH=y
CONFIG_MSM_SMEM=y
@@ -360,6 +366,7 @@
CONFIG_MSM_PM=y
CONFIG_QTI_RPM_STATS_LOG=y
CONFIG_QCOM_FORCE_WDOG_BITE_ON_PANIC=y
+CONFIG_EXTCON_QCOM_SPMI_MISC=y
CONFIG_IIO=y
CONFIG_PWM=y
CONFIG_PWM_QPNP=y
diff --git a/arch/arm/configs/sdxpoorwills_defconfig b/arch/arm/configs/sdxpoorwills_defconfig
index b19a8ca..ac19abd 100644
--- a/arch/arm/configs/sdxpoorwills_defconfig
+++ b/arch/arm/configs/sdxpoorwills_defconfig
@@ -144,6 +144,7 @@
CONFIG_BRIDGE_EBT_DNAT=y
CONFIG_BRIDGE_EBT_SNAT=y
CONFIG_BRIDGE=y
+CONFIG_VLAN_8021Q=y
CONFIG_NET_SCHED=y
CONFIG_NET_SCH_PRIO=y
CONFIG_RMNET_DATA=y
@@ -191,7 +192,12 @@
CONFIG_USB_NET_SMSC75XX=y
CONFIG_USB_NET_SMSC95XX=y
CONFIG_WCNSS_MEM_PRE_ALLOC=y
+CONFIG_CNSS=y
+CONFIG_CNSS_SDIO=y
+CONFIG_CNSS_PCI=y
+CONFIG_CLD_HL_SDIO_CORE=y
CONFIG_CLD_LL_CORE=y
+CONFIG_CNSS_LOGGER=y
# CONFIG_INPUT_MOUSEDEV is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_KEYBOARD is not set
@@ -323,7 +329,6 @@
CONFIG_EP_PCIE=y
CONFIG_EP_PCIE_HW=y
CONFIG_QPNP_REVID=y
-CONFIG_GPIO_USB_DETECT=y
CONFIG_USB_BAM=y
CONFIG_MSM_CLK_RPMH=y
CONFIG_MSM_CLK_AOP_QMP=y
@@ -340,6 +345,7 @@
CONFIG_QCOM_SCM=y
CONFIG_MSM_BOOT_STATS=y
CONFIG_QCOM_WATCHDOG_V2=y
+CONFIG_QCOM_MEMORY_DUMP_V2=y
CONFIG_QCOM_BUS_SCALING=y
CONFIG_QCOM_BUS_CONFIG_RPMH=y
CONFIG_MSM_SMEM=y
@@ -360,6 +366,7 @@
CONFIG_QTI_RPM_STATS_LOG=y
CONFIG_QCOM_FORCE_WDOG_BITE_ON_PANIC=y
CONFIG_QCOM_DEVFREQ_DEVBW=y
+CONFIG_EXTCON_QCOM_SPMI_MISC=y
CONFIG_IIO=y
CONFIG_PWM=y
CONFIG_PWM_QPNP=y
diff --git a/arch/arm64/boot/dts/qcom/msm-arm-smmu-8937.dtsi b/arch/arm64/boot/dts/qcom/msm-arm-smmu-8937.dtsi
new file mode 100644
index 0000000..e862b0f
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/msm-arm-smmu-8937.dtsi
@@ -0,0 +1,102 @@
+/*
+ * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+
+&soc {
+ kgsl_smmu: arm,smmu-kgsl@1c40000 {
+ status = "ok";
+ compatible = "qcom,smmu-v2";
+ qcom,tz-device-id = "GPU";
+ reg = <0x1c40000 0x10000>;
+ #iommu-cells = <1>;
+ #global-interrupts = <0>;
+ interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>;
+ qcom,dynamic;
+ qcom,use-3-lvl-tables;
+ qcom,enable-smmu-halt;
+ qcom,skip-init;
+ vdd-supply = <&gdsc_oxili_cx>;
+ qcom,regulator-names = "vdd";
+ clocks = <&clock_gcc clk_gcc_oxili_ahb_clk>,
+ <&clock_gcc clk_gcc_bimc_gfx_clk>;
+ clock-names = "gpu_ahb_clk", "gcc_bimc_gfx_clk";
+ };
+
+ /* A test device to test the SMMU operation */
+ kgsl_iommu_test_device0 {
+ status = "disabled";
+ compatible = "iommu-debug-test";
+ /* The SID should be valid one to get the proper
+ *SMR,S2CR indices.
+ */
+ iommus = <&kgsl_smmu 0x0>;
+ };
+
+ apps_iommu: qcom,iommu@1e00000 {
+ status = "okay";
+ compatible = "qcom,qsmmu-v500";
+ reg = <0x1e00000 0x40000>,
+ <0x1ee2000 0x20>;
+ reg-names = "base", "tcu-base";
+ #iommu-cells = <2>;
+ qcom,tz-device-id = "APPS";
+ qcom,skip-init;
+ qcom,enable-static-cb;
+ qcom,use-3-lvl-tables;
+ qcom,disable-atos;
+ #global-interrupts = <0>;
+ #size-cells = <1>;
+ #address-cells = <1>;
+ ranges;
+ interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_gcc clk_gcc_smmu_cfg_clk>,
+ <&clock_gcc clk_gcc_apss_tcu_clk>;
+ clock-names = "iface_clk", "core_clk";
+ };
+};
+
+#include "msm-arm-smmu-impl-defs-8937.dtsi"
diff --git a/arch/arm64/boot/dts/qcom/msm-arm-smmu-impl-defs-8937.dtsi b/arch/arm64/boot/dts/qcom/msm-arm-smmu-impl-defs-8937.dtsi
new file mode 100644
index 0000000..ce3e1c3
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/msm-arm-smmu-impl-defs-8937.dtsi
@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&kgsl_smmu {
+ attach-impl-defs = <0x6000 0x270>,
+ <0x6060 0x1055>,
+ <0x6800 0x6>,
+ <0x6900 0x3ff>,
+ <0x6924 0x204>,
+ <0x6928 0x10800>,
+ <0x6930 0x400>,
+ <0x6960 0xffffffff>,
+ <0x6b64 0xa0000>,
+ <0x6b68 0xaaab92a>;
+};
diff --git a/arch/arm64/boot/dts/qcom/msm8937-coresight.dtsi b/arch/arm64/boot/dts/qcom/msm8937-coresight.dtsi
new file mode 100644
index 0000000..b82767915
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/msm8937-coresight.dtsi
@@ -0,0 +1,1192 @@
+/*
+ * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 an
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&soc {
+ tmc_etr: tmc@6028000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b961>;
+
+ reg = <0x6028000 0x1000>,
+ <0x6044000 0x15000>;
+ reg-names = "tmc-base", "bam-base";
+
+ interrupts = <0 166 0>;
+ interrupt-names = "byte-cntr-irq";
+
+ arm,buffer-size = <0x100000>;
+ arm,sg-enable;
+
+ coresight-name = "coresight-tmc-etr";
+ coresight-ctis = <&cti0 &cti8>;
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+
+ port {
+ tmc_etr_in_replicator: endpoint {
+ slave-mode;
+ remote-endpoint = <&replicator_out_tmc_etr>;
+ };
+ };
+ };
+
+ tmc_etf: tmc@6027000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b961>;
+
+ reg = <0x6027000 0x1000>;
+ reg-names = "tmc-base";
+
+ coresight-name = "coresight-tmc-etf";
+
+ arm,default-sink;
+ coresight-ctis = <&cti0 &cti8>;
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ tmc_etf_out_replicator:endpoint {
+ remote-endpoint =
+ <&replicator_in_tmc_etf>;
+ };
+ };
+
+ port@1 {
+ reg = <0>;
+ tmc_etf_in_funnel_in0: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&funnel_in0_out_tmc_etf>;
+ };
+ };
+ };
+ };
+
+ replicator: replicator@6026000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b909>;
+
+ reg = <0x6026000 0x1000>;
+ reg-names = "replicator-base";
+
+ coresight-name = "coresight-replicator";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ replicator_out_tmc_etr: endpoint {
+ remote-endpoint =
+ <&tmc_etr_in_replicator>;
+ };
+ };
+
+ port@1 {
+ reg = <0>;
+ replicator_in_tmc_etf: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&tmc_etf_out_replicator>;
+ };
+ };
+ };
+ };
+
+ funnel_in0: funnel@6021000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b908>;
+
+ reg = <0x6021000 0x1000>;
+ reg-names = "funnel-base";
+
+ coresight-name = "coresight-funnel-in0";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ funnel_in0_out_tmc_etf: endpoint {
+ remote-endpoint =
+ <&tmc_etf_in_funnel_in0>;
+ };
+ };
+
+ port@1 {
+ reg = <7>;
+ funnel_in0_in_stm: endpoint {
+ slave-mode;
+ remote-endpoint = <&stm_out_funnel_in0>;
+ };
+ };
+
+ port@2 {
+ reg = <6>;
+ funnel_in0_in_tpda: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&tpda_out_funnel_in0>;
+ };
+ };
+
+ port@3 {
+ reg = <3>;
+ funnel_in0_in_funnel_center: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&funnel_center_out_funnel_in0>;
+ };
+ };
+
+ port@4 {
+ reg = <4>;
+ funnel_in0_in_funnel_right: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&funnel_right_out_funnel_in0>;
+ };
+ };
+
+ port@5 {
+ reg = <5>;
+ funnel_in0_in_funnel_mm: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&funnel_mm_out_funnel_in0>;
+ };
+ };
+ };
+ };
+
+ funnel_center: funnel@6100000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b908>;
+
+ reg = <0x6100000 0x1000>;
+ reg-names = "funnel-base";
+
+ coresight-name = "coresight-funnel-center";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ funnel_center_out_funnel_in0: endpoint {
+ remote-endpoint =
+ <&funnel_in0_in_funnel_center>;
+ };
+ };
+
+ port@1 {
+ reg = <0>;
+ funnel_center_in_rpm_etm0: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&rpm_etm0_out_funnel_center>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+ funnel_center_in_dbgui: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&dbgui_out_funnel_center>;
+ };
+ };
+ };
+ };
+
+ funnel_right: funnel@6120000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b908>;
+
+ reg = <0x6120000 0x1000>;
+ reg-names = "funnel-base";
+
+ coresight-name = "coresight-funnel-right";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ funnel_right_out_funnel_in0: endpoint {
+ remote-endpoint =
+ <&funnel_in0_in_funnel_right>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ funnel_right_in_modem_etm0: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&modem_etm0_out_funnel_right>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+ funnel_right_in_funnel_apss: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&funnel_apss_out_funnel_right>;
+ };
+ };
+ };
+ };
+
+ funnel_mm: funnel@6130000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b908>;
+
+ reg = <0x6130000 0x1000>;
+ reg-names = "funnel-base";
+
+ coresight-name = "coresight-funnel-mm";
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ funnel_mm_out_funnel_in0: endpoint {
+ remote-endpoint =
+ <&funnel_in0_in_funnel_mm>;
+ };
+ };
+
+ port@1 {
+ reg = <0>;
+ funnel_mm_in_wcn_etm0: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&wcn_etm0_out_funnel_mm>;
+ };
+ };
+
+ port@2 {
+ reg = <4>;
+ funnel_mm_in_funnel_cam: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&funnel_cam_out_funnel_mm>;
+ };
+ };
+
+ port@3 {
+ reg = <5>;
+ funnel_mm_in_audio_etm0: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&audio_etm0_out_funnel_mm>;
+ };
+ };
+ };
+ };
+
+ funnel_cam: funnel@6132000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b908>;
+
+ reg = <0x6132000 0x1000>;
+ reg-names = "funnel-base";
+
+ coresight-name = "coresight-funnel-cam";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+
+ port {
+ funnel_cam_out_funnel_mm: endpoint {
+ remote-endpoint = <&funnel_mm_in_funnel_cam>;
+ };
+ };
+ };
+
+ funnel_apss: funnel@61a1000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b908>;
+
+ reg = <0x61a1000 0x1000>;
+ reg-names = "funnel-base";
+
+ coresight-name = "coresight-funnel-apss";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ funnel_apss_out_funnel_right: endpoint {
+ remote-endpoint =
+ <&funnel_right_in_funnel_apss>;
+ };
+ };
+
+ port@1 {
+ reg = <0>;
+ funnel_apss0_in_etm4: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&etm4_out_funnel_apss0>;
+ };
+ };
+
+ port@2 {
+ reg = <1>;
+ funnel_apss0_in_etm5: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&etm5_out_funnel_apss0>;
+ };
+ };
+
+ port@3 {
+ reg = <2>;
+ funnel_apss0_in_etm6: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&etm6_out_funnel_apss0>;
+ };
+ };
+
+ port@4 {
+ reg = <3>;
+ funnel_apss0_in_etm7: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&etm7_out_funnel_apss0>;
+ };
+ };
+
+ port@5 {
+ reg = <4>;
+ funnel_apss0_in_etm0: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&etm0_out_funnel_apss0>;
+ };
+ };
+
+ port@6 {
+ reg = <5>;
+ funnel_apss0_in_etm1: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&etm1_out_funnel_apss0>;
+ };
+ };
+
+ port@7 {
+ reg = <6>;
+ funnel_apss0_in_etm2: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&etm2_out_funnel_apss0>;
+ };
+ };
+
+ port@8 {
+ reg = <7>;
+ funnel_apss0_in_etm3: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&etm3_out_funnel_apss0>;
+ };
+ };
+ };
+ };
+
+ etm4: etm@619c000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x000bb95d>;
+
+ reg = <0x619c000 0x1000>;
+ cpu = <&CPU4>;
+ coresight-name = "coresight-etm4";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+
+ port {
+ etm4_out_funnel_apss0: endpoint {
+ remote-endpoint = <&funnel_apss0_in_etm4>;
+ };
+ };
+ };
+
+ etm5: etm@619d000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x000bb95d>;
+
+ reg = <0x619d000 0x1000>;
+ cpu = <&CPU5>;
+ coresight-name = "coresight-etm5";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+
+ port {
+ etm5_out_funnel_apss0: endpoint {
+ remote-endpoint = <&funnel_apss0_in_etm5>;
+ };
+ };
+ };
+
+ etm6: etm@619e000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x000bb95d>;
+
+ reg = <0x619e000 0x1000>;
+ cpu = <&CPU6>;
+ coresight-name = "coresight-etm6";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+
+ port {
+ etm6_out_funnel_apss0: endpoint {
+ remote-endpoint = <&funnel_apss0_in_etm6>;
+ };
+ };
+ };
+
+ etm7: etm@619f000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x000bb95d>;
+
+ reg = <0x619f000 0x1000>;
+ cpu = <&CPU7>;
+ coresight-name = "coresight-etm7";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+
+ port {
+ etm7_out_funnel_apss0: endpoint {
+ remote-endpoint = <&funnel_apss0_in_etm7>;
+ };
+ };
+ };
+
+ etm0: etm@61bc000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x000bb95d>;
+
+ reg = <0x61bc000 0x1000>;
+ cpu = <&CPU0>;
+ coresight-name = "coresight-etm0";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+
+ port {
+ etm0_out_funnel_apss0: endpoint {
+ remote-endpoint = <&funnel_apss0_in_etm0>;
+ };
+ };
+ };
+
+ etm1: etm@61bd000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x000bb95d>;
+
+ reg = <0x61bd000 0x1000>;
+ cpu = <&CPU1>;
+ coresight-name = "coresight-etm1";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+
+ port {
+ etm1_out_funnel_apss0: endpoint {
+ remote-endpoint = <&funnel_apss0_in_etm1>;
+ };
+ };
+ };
+
+ etm2: etm@61be000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x000bb95d>;
+
+ reg = <0x61be000 0x1000>;
+ cpu = <&CPU2>;
+ coresight-name = "coresight-etm2";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+
+ port {
+ etm2_out_funnel_apss0: endpoint {
+ remote-endpoint = <&funnel_apss0_in_etm2>;
+ };
+ };
+ };
+
+ etm3: etm@61bf000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x000bb95d>;
+
+ reg = <0x61bf000 0x1000>;
+ coresight-name = "coresight-etm3";
+ cpu = <&CPU3>;
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+
+ port {
+ etm3_out_funnel_apss0: endpoint {
+ remote-endpoint = <&funnel_apss0_in_etm3>;
+ };
+ };
+ };
+
+ stm: stm@6002000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b962>;
+
+ reg = <0x6002000 0x1000>,
+ <0x9280000 0x180000>;
+ reg-names = "stm-base", "stm-stimulus-base";
+
+ coresight-name = "coresight-stm";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+
+ port {
+ stm_out_funnel_in0: endpoint {
+ remote-endpoint = <&funnel_in0_in_stm>;
+ };
+ };
+ };
+
+ cti0: cti@6010000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b966>;
+
+ reg = <0x6010000 0x1000>;
+ reg-names = "cti-base";
+ coresight-name = "coresight-cti0";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+ };
+
+ cti1: cti@6011000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b966>;
+
+ reg = <0x6011000 0x1000>;
+ reg-names = "cti-base";
+ coresight-name = "coresight-cti1";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+ };
+
+ cti2: cti@6012000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b966>;
+
+ reg = <0x6012000 0x1000>;
+ reg-names = "cti-base";
+ coresight-name = "coresight-cti2";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+ };
+
+ cti3: cti@6013000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b966>;
+
+ reg = <0x6013000 0x1000>;
+ reg-names = "cti-base";
+ coresight-name = "coresight-cti3";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+ };
+
+ cti4: cti@6014000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b966>;
+
+ reg = <0x6014000 0x1000>;
+ reg-names = "cti-base";
+ coresight-name = "coresight-cti4";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+ };
+
+ cti5: cti@6015000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b966>;
+
+ reg = <0x6015000 0x1000>;
+ reg-names = "cti-base";
+ coresight-name = "coresight-cti5";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+ };
+
+ cti6: cti@6016000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b966>;
+
+ reg = <0x6016000 0x1000>;
+ reg-names = "cti-base";
+ coresight-name = "coresight-cti6";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+ };
+
+ cti7: cti@6017000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b966>;
+
+ reg = <0x6017000 0x1000>;
+ reg-names = "cti-base";
+ coresight-name = "coresight-cti7";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+ };
+
+ cti8: cti@6018000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b966>;
+
+ reg = <0x6018000 0x1000>;
+ reg-names = "cti-base";
+ coresight-name = "coresight-cti8";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+ };
+
+ cti9: cti@6019000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b966>;
+
+ reg = <0x6019000 0x1000>;
+ reg-names = "cti-base";
+ coresight-name = "coresight-cti9";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+ };
+
+ cti10: cti@601a000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b966>;
+
+ reg = <0x601a000 0x1000>;
+ reg-names = "cti-base";
+ coresight-name = "coresight-cti10";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+ };
+
+ cti11: cti@601b000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b966>;
+
+ reg = <0x601b000 0x1000>;
+ reg-names = "cti-base";
+ coresight-name = "coresight-cti11";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+ };
+
+ cti12: cti@601c000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b966>;
+
+ reg = <0x601c000 0x1000>;
+ reg-names = "cti-base";
+ coresight-name = "coresight-cti12";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+ };
+
+ cti13: cti@601d000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b966>;
+
+ reg = <0x601d000 0x1000>;
+ reg-names = "cti-base";
+ coresight-name = "coresight-cti13";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+ };
+
+ cti14: cti@601e000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b966>;
+
+ reg = <0x601e000 0x1000>;
+ reg-names = "cti-base";
+ coresight-name = "coresight-cti14";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+ };
+
+ cti15: cti@601f000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b966>;
+
+ reg = <0x601f000 0x1000>;
+ reg-names = "cti-base";
+ coresight-name = "coresight-cti15";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+ };
+
+ cti_cpu0: cti@6198000{
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b966>;
+
+ reg = <0x6198000 0x1000>;
+ reg-names = "cti-base";
+ coresight-name = "coresight-cti-cpu0";
+ cpu = <&CPU0>;
+ qcom,cti-save;
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+ };
+
+ cti_cpu1: cti@6199000{
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b966>;
+
+ reg = <0x6199000 0x1000>;
+ reg-names = "cti-base";
+ coresight-name = "coresight-cti-cpu1";
+ cpu = <&CPU1>;
+ qcom,cti-save;
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+ };
+
+ cti_cpu2: cti@619a000{
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b966>;
+
+ reg = <0x619a000 0x1000>;
+ reg-names = "cti-base";
+ coresight-name = "coresight-cti-cpu2";
+ cpu = <&CPU2>;
+ qcom,cti-save;
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+ };
+
+ cti_cpu3: cti@619b000{
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b966>;
+
+ reg = <0x619b000 0x1000>;
+ reg-names = "cti-base";
+ coresight-name = "coresight-cti-cpu3";
+ cpu = <&CPU3>;
+ qcom,cti-save;
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+ };
+
+ cti_cpu4: cti@61b8000{
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b966>;
+
+ reg = <0x61b8000 0x1000>;
+ reg-names = "cti-base";
+ coresight-name = "coresight-cti-cpu4";
+ cpu = <&CPU4>;
+ qcom,cti-save;
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+ };
+
+ cti_cpu5: cti@61b9000{
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b966>;
+
+ reg = <0x61b9000 0x1000>;
+ reg-names = "cti-base";
+ coresight-name = "coresight-cti-cpu5";
+ cpu = <&CPU5>;
+ qcom,cti-save;
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+ };
+
+ cti_cpu6: cti@61ba000{
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b966>;
+
+ reg = <0x61ba000 0x1000>;
+ reg-names = "cti-base";
+ coresight-name = "coresight-cti-cpu6";
+ cpu = <&CPU6>;
+ qcom,cti-save;
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+ };
+
+ cti_cpu7: cti@61bb000{
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b966>;
+
+ reg = <0x61bb000 0x1000>;
+ reg-names = "cti-base";
+ coresight-name = "coresight-cti-cpu7";
+ cpu = <&CPU7>;
+ qcom,cti-save;
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+ };
+
+ cti_modem_cpu0: cti@6128000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b966>;
+
+ reg = <0x6128000 0x1000>;
+ reg-names = "cti-base";
+ coresight-name = "coresight-cti-modem-cpu0";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+ };
+
+ cti_modem_cpu1: cti@6124000{
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b966>;
+
+ reg = <0x6124000 0x1000>;
+ reg-names = "cti-base";
+ coresight-name = "coresight-cti-modem-cpu1";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+ };
+
+ /* Venus CTI */
+ cti_video_cpu0: cti@6134000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b966>;
+
+ reg = <0x6134000 0x1000>;
+ reg-names = "cti-base";
+ coresight-name = "coresight-cti-video-cpu0";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+ };
+
+ /* Pronto CTI */
+ cti_wcn_cpu0: cti@6139000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b966>;
+
+ reg = <0x6139000 0x1000>;
+ reg-names = "cti-base";
+ coresight-name = "coresight-cti-wcn-cpu0";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+ };
+
+ /* LPASS CTI */
+ cti_audio_cpu0: cti@613c000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b966>;
+
+ reg = <0x613c000 0x1000>;
+ reg-names = "cti-base";
+ coresight-name = "coresight-cti-audio-cpu0";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+ };
+
+ cti_rpm_cpu0: cti@610c000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b966>;
+
+ reg = <0x610c000 0x1000>;
+ reg-names = "cti-base";
+ coresight-name = "coresight-cti-rpm-cpu0";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+ };
+
+ /* Pronto ETM */
+ wcn_etm0 {
+ compatible = "qcom,coresight-remote-etm";
+ coresight-name = "coresight-wcn-etm0";
+ qcom,inst-id = <3>;
+
+ port {
+ wcn_etm0_out_funnel_mm: endpoint {
+ remote-endpoint = <&funnel_mm_in_wcn_etm0>;
+ };
+ };
+ };
+
+ rpm_etm0 {
+ compatible = "qcom,coresight-remote-etm";
+ coresight-name = "coresight-rpm-etm0";
+ qcom,inst-id = <4>;
+
+ port {
+ rpm_etm0_out_funnel_center: endpoint {
+ remote-endpoint = <&funnel_center_in_rpm_etm0>;
+ };
+ };
+ };
+
+ /* LPASS ETM */
+ audio_etm0 {
+ compatible = "qcom,coresight-remote-etm";
+ coresight-name = "coresight-audio-etm0";
+ qcom,inst-id = <5>;
+
+ port {
+ audio_etm0_out_funnel_mm: endpoint {
+ remote-endpoint = <&funnel_mm_in_audio_etm0>;
+ };
+ };
+ };
+
+ /* MSS_SCL */
+ modem_etm0 {
+ compatible = "qcom,coresight-remote-etm";
+ coresight-name = "coresight-modem-etm0";
+ qcom,inst-id = <11>;
+
+ port {
+ modem_etm0_out_funnel_right: endpoint {
+ remote-endpoint = <&funnel_right_in_modem_etm0>;
+ };
+ };
+ };
+
+
+ csr: csr@6001000 {
+ compatible = "qcom,coresight-csr";
+ reg = <0x6001000 0x1000>;
+ reg-names = "csr-base";
+ coresight-name = "coresight-csr";
+
+ qcom,blk-size = <1>;
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+ };
+
+ dbgui: dbgui@6108000 {
+ compatible = "qcom,coresight-dbgui";
+ reg = <0x6108000 0x1000>;
+ reg-names = "dbgui-base";
+ coresight-name = "coresight-dbgui";
+
+ qcom,dbgui-addr-offset = <0x30>;
+ qcom,dbgui-data-offset = <0x130>;
+ qcom,dbgui-size = <64>;
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+
+ port {
+ dbgui_out_funnel_center: endpoint {
+ remote-endpoint = <&funnel_center_in_dbgui>;
+ };
+ };
+ };
+
+ tpda: tpda@6003000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b969>;
+
+ reg = <0x6003000 0x1000>;
+ reg-names = "tpda-base";
+ coresight-name = "coresight-tpda";
+
+ qcom,tpda-atid = <64>;
+ qcom,cmb-elem-size = <0 32>;
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ tpda_out_funnel_in0: endpoint {
+ remote-endpoint = <&funnel_in0_in_tpda>;
+ };
+ };
+
+ port@1 {
+ reg = <0>;
+ tpda_in_tpdm_dcc: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&tpdm_dcc_out_tpda>;
+ };
+ };
+ };
+ };
+
+ tpdm_dcc: tpdm@6110000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b968>;
+
+ reg = <0x6110000 0x1000>;
+ reg-names = "tpdm-base";
+ coresight-name = "coresight-tpdm-dcc";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+
+ port {
+ tpdm_dcc_out_tpda: endpoint {
+ remote-endpoint = <&tpda_in_tpdm_dcc>;
+ };
+ };
+ };
+
+ hwevent: hwevent@6101000 {
+ compatible = "qcom,coresight-hwevent";
+
+ reg = <0x6101000 0x148>,
+ <0x6101fb0 0x4>,
+ <0x6121000 0x148>,
+ <0x6121fb0 0x4>,
+ <0x6131000 0x148>,
+ <0x6131fb0 0x4>,
+ <0x7105010 0x4>,
+ <0x7885010 0x4>;
+
+ reg-names = "center-wrapper-mux", "center-wrapper-lockaccess",
+ "right-wrapper-mux", "right-wrapper-lockaccess",
+ "mm-wrapper-mux", "mm-wrapper-lockaccess",
+ "usbbam-mux", "blsp-mux";
+
+ coresight-name = "coresight-hwevent";
+
+ clocks = <&clock_gcc clk_qdss_clk>,
+ <&clock_gcc clk_qdss_a_clk>;
+ clock-names = "apb_pclk";
+ };
+
+};
diff --git a/arch/arm64/boot/dts/qcom/msm8937-gpu.dtsi b/arch/arm64/boot/dts/qcom/msm8937-gpu.dtsi
new file mode 100644
index 0000000..2ee4c0e
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/msm8937-gpu.dtsi
@@ -0,0 +1,224 @@
+/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&soc {
+ msm_bus: qcom,kgsl-busmon {
+ label = "kgsl-busmon";
+ compatible = "qcom,kgsl-busmon";
+ };
+
+ gpubw: qcom,gpubw {
+ compatible = "qcom,devbw";
+ governor = "bw_vbif";
+ qcom,src-dst-ports = <26 512>;
+ /*
+ * active-only flag is used while registering the bus
+ * governor.It helps release the bus vote when the CPU
+ * subsystem is inactiv3
+ */
+ qcom,active-only;
+ qcom,bw-tbl =
+ < 0 >, /* off */
+ < 769 >, /* 1. DDR:100.80 MHz BIMC: 50.40 MHz */
+ < 1611 >, /* 2. DDR:211.20 MHz BIMC: 105.60 MHz */
+ < 2124 >, /* 3. DDR:278.40 MHz BIMC: 139.20 MHz */
+ < 2929 >, /* 4. DDR:384.00 MHz BIMC: 192.00 MHz */
+ < 4101 >, /* 5. DDR:537.60 MHz BIMC: 268.80 MHz */
+ < 4248 >, /* 6. DDR:556.80 MHz BIMC: 278.40 MHz */
+ < 5346 >, /* 7. DDR:662.40 MHz BIMC: 331.20 MHz */
+ < 5712 >, /* 8. DDR:748.80 MHz BIMC: 374.40 MHz */
+ < 6152 >, /* 9. DDR:806.40 MHz BIMC: 403.20 MHz */
+ < 7031 >; /* 10. DDR:921.60 MHz BIMC: 460.80 MHz */
+ };
+
+ msm_gpu: qcom,kgsl-3d0@1c00000 {
+ label = "kgsl-3d0";
+ compatible = "qcom,kgsl-3d0", "qcom,kgsl-3d";
+ status = "ok";
+ reg = <0x1c00000 0x40000
+ 0xa0000 0x6fff>;
+ reg-names = "kgsl_3d0_reg_memory", "qfprom_memory";
+ interrupts = <0 33 0>;
+ interrupt-names = "kgsl_3d0_irq";
+ qcom,id = <0>;
+ qcom,chipid = <0x05000500>;
+
+ qcom,initial-pwrlevel = <2>;
+
+ qcom,idle-timeout = <80>; //msecs
+ qcom,strtstp-sleepwake;
+
+ qcom,highest-bank-bit = <14>;
+
+ qcom,snapshot-size = <1048576>; //bytes
+
+ clocks = <&clock_gcc clk_gcc_oxili_gfx3d_clk>,
+ <&clock_gcc clk_gcc_oxili_ahb_clk>,
+ <&clock_gcc clk_gcc_bimc_gfx_clk>,
+ <&clock_gcc clk_gcc_bimc_gpu_clk>,
+ <&clock_gcc clk_gcc_oxili_timer_clk>,
+ <&clock_gcc clk_gcc_oxili_aon_clk>;
+
+ clock-names = "core_clk", "iface_clk",
+ "mem_iface_clk", "alt_mem_iface_clk",
+ "rbbmtimer_clk", "alwayson_clk";
+
+
+ /* Bus Scale Settings */
+ qcom,gpubw-dev = <&gpubw>;
+ qcom,bus-control;
+ qcom,bus-width = <16>;
+ qcom,msm-bus,name = "grp3d";
+ qcom,msm-bus,num-cases = <11>;
+ qcom,msm-bus,num-paths = <1>;
+ qcom,msm-bus,vectors-KBps =
+ <26 512 0 0>, /* off */
+ <26 512 0 806400>, /* 1. 100.80 MHz */
+ <26 512 0 1689600>, /* 2. 211.20 MHz */
+ <26 512 0 2227200>, /* 3. 278.40 MHz */
+ <26 512 0 3072000>, /* 4. 384.00 MHz */
+ <26 512 0 4300800>, /* 5. 537.60 MHz */
+ <26 512 0 4454400>, /* 6. 556.80 MHz */
+ <26 512 0 5299200>, /* 7. 662.40 MHz */
+ <26 512 0 5990400>, /* 8. 748.80 MHz */
+ <26 512 0 6451200>, /* 9. 806.40 MHz */
+ <26 512 0 7372800>; /* 10. 921.60 MHz */
+
+ /* GDSC regulator names */
+ regulator-names = "vddcx", "vdd";
+ /* GDSC oxili regulators */
+ vddcx-supply = <&gdsc_oxili_cx>;
+ vdd-supply = <&gdsc_oxili_gx>;
+
+ /* CPU latency parameter */
+ qcom,pm-qos-active-latency = <360>;
+ qcom,pm-qos-wakeup-latency = <360>;
+
+ /* Quirks */
+ qcom,gpu-quirk-two-pass-use-wfi;
+ qcom,gpu-quirk-dp2clockgating-disable;
+ qcom,gpu-quirk-lmloadkill-disable;
+
+ /* Enable context aware freq. scaling */
+ qcom,enable-ca-jump;
+
+ /* Context aware jump busy penalty in us */
+ qcom,ca-busy-penalty = <12000>;
+
+ /* Context aware jump target power level */
+ qcom,ca-target-pwrlevel = <1>;
+
+ /* GPU Mempools */
+ qcom,gpu-mempools {
+ #address-cells= <1>;
+ #size-cells = <0>;
+ compatible = "qcom,gpu-mempools";
+
+ qcom,mempool-max-pages = <32768>;
+
+ /* 4K Page Pool configuration */
+ qcom,gpu-mempool@0 {
+ reg = <0>;
+ qcom,mempool-page-size = <4096>;
+ };
+ /* 64K Page Pool configuration */
+ qcom,gpu-mempool@1 {
+ reg = <1>;
+ qcom,mempool-page-size = <65536>;
+ };
+ };
+
+ /* Power levels */
+ qcom,gpu-pwrlevels {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "qcom,gpu-pwrlevels";
+
+ /* TURBO */
+ qcom,gpu-pwrlevel@0 {
+ reg = <0>;
+ qcom,gpu-freq = <450000000>;
+ qcom,bus-freq = <9>;
+ qcom,bus-min = <9>;
+ qcom,bus-max = <9>;
+ };
+
+ /* NOM+ */
+ qcom,gpu-pwrlevel@1 {
+ reg = <1>;
+ qcom,gpu-freq = <400000000>;
+ qcom,bus-freq = <7>;
+ qcom,bus-min = <6>;
+ qcom,bus-max = <9>;
+ };
+
+ /* NOM */
+ qcom,gpu-pwrlevel@2 {
+ reg = <2>;
+ qcom,gpu-freq = <375000000>;
+ qcom,bus-freq = <6>;
+ qcom,bus-min = <5>;
+ qcom,bus-max = <8>;
+ };
+
+ /* SVS+ */
+ qcom,gpu-pwrlevel@3 {
+ reg = <3>;
+ qcom,gpu-freq = <300000000>;
+ qcom,bus-freq = <5>;
+ qcom,bus-min = <4>;
+ qcom,bus-max = <7>;
+ };
+
+ /* SVS */
+ qcom,gpu-pwrlevel@4 {
+ reg = <4>;
+ qcom,gpu-freq = <216000000>;
+ qcom,bus-freq = <3>;
+ qcom,bus-min = <1>;
+ qcom,bus-max = <4>;
+ };
+
+ /* XO */
+ qcom,gpu-pwrlevel@5 {
+ reg = <5>;
+ qcom,gpu-freq = <19200000>;
+ qcom,bus-freq = <0>;
+ qcom,bus-min = <0>;
+ qcom,bus-max = <0>;
+ };
+ };
+ };
+
+ kgsl_msm_iommu: qcom,kgsl-iommu@1c40000 {
+ compatible = "qcom,kgsl-smmu-v2";
+
+ reg = <0x1c40000 0x10000>;
+ qcom,protect = <0x40000 0x10000>;
+ qcom,micro-mmu-control = <0x6000>;
+
+ clocks = <&clock_gcc clk_gcc_oxili_ahb_clk>,
+ <&clock_gcc clk_gcc_bimc_gfx_clk>;
+
+ clock-names = "gpu_ahb_clk", "gcc_bimc_gfx_clk";
+
+ qcom,secure_align_mask = <0xfff>;
+ qcom,retention;
+ gfx3d_user: gfx3d_user {
+ compatible = "qcom,smmu-kgsl-cb";
+ label = "gfx3d_user";
+ iommus = <&kgsl_smmu 0>;
+ qcom,gpu-offset = <0x48000>;
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/msm8937-ion.dtsi b/arch/arm64/boot/dts/qcom/msm8937-ion.dtsi
index 823d99d..96e7166 100644
--- a/arch/arm64/boot/dts/qcom/msm8937-ion.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8937-ion.dtsi
@@ -33,5 +33,11 @@
memory-region = <&qseecom_mem>;
qcom,ion-heap-type = "DMA";
};
+
+ qcom,ion-heap@19 { /* QSEECOM TA HEAP */
+ reg = <19>;
+ memory-region = <&qseecom_ta_mem>;
+ qcom,ion-heap-type = "DMA";
+ };
};
};
diff --git a/arch/arm64/boot/dts/qcom/msm8937-mdss-panels.dtsi b/arch/arm64/boot/dts/qcom/msm8937-mdss-panels.dtsi
index 7fdcb2d..ab2a365 100644
--- a/arch/arm64/boot/dts/qcom/msm8937-mdss-panels.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8937-mdss-panels.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -16,14 +16,8 @@
#include "dsi-panel-truly-1080p-cmd.dtsi"
#include "dsi-panel-r69006-1080p-cmd.dtsi"
#include "dsi-panel-r69006-1080p-video.dtsi"
-#include "dsi-panel-hx8394f-720p-video.dtsi"
#include "dsi-adv7533-1080p.dtsi"
#include "dsi-adv7533-720p.dtsi"
-#include "dsi-panel-truly-720p-video.dtsi"
-#include "dsi-panel-truly-wuxga-video.dtsi"
-#include "dsi-panel-truly-720p-cmd.dtsi"
-#include "dsi-panel-lead-fl10802-fwvga-video.dtsi"
-#include "dsi-panel-icn9706-720-1440p-video.dtsi"
&soc {
dsi_panel_pwr_supply: dsi_panel_pwr_supply {
@@ -48,5 +42,23 @@
qcom,supply-disable-load = <100>;
};
+ qcom,panel-supply-entry@2 {
+ reg = <2>;
+ qcom,supply-name = "lab";
+ qcom,supply-min-voltage = <4600000>;
+ qcom,supply-max-voltage = <6000000>;
+ qcom,supply-enable-load = <100000>;
+ qcom,supply-disable-load = <100>;
+ };
+
+ qcom,panel-supply-entry@3 {
+ reg = <3>;
+ qcom,supply-name = "ibb";
+ qcom,supply-min-voltage = <4600000>;
+ qcom,supply-max-voltage = <6000000>;
+ qcom,supply-enable-load = <100000>;
+ qcom,supply-disable-load = <100>;
+ qcom,supply-post-on-sleep = <10>;
+ };
};
};
diff --git a/arch/arm64/boot/dts/qcom/msm8937-mdss.dtsi b/arch/arm64/boot/dts/qcom/msm8937-mdss.dtsi
index 07ff464..2c86c8f 100644
--- a/arch/arm64/boot/dts/qcom/msm8937-mdss.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8937-mdss.dtsi
@@ -185,11 +185,11 @@
smmu_mdp_unsec: qcom,smmu_mdp_unsec_cb {
compatible = "qcom,smmu_mdp_unsec";
- iommus = <&apps_iommu 0xC00 0>; /* For NS ctx bank */
+ iommus = <&apps_iommu 0x2800 0>; /* For NS ctx bank */
};
smmu_mdp_sec: qcom,smmu_mdp_sec_cb {
compatible = "qcom,smmu_mdp_sec";
- iommus = <&apps_iommu 0xC01 0>; /* For SEC Ctx Bank */
+ iommus = <&apps_iommu 0x2801 0>; /* For SEC Ctx Bank */
};
mdss_fb0: qcom,mdss_fb_primary {
diff --git a/arch/arm64/boot/dts/qcom/msm8937-mtp.dtsi b/arch/arm64/boot/dts/qcom/msm8937-mtp.dtsi
index eeae4e8..f9af6cd 100644
--- a/arch/arm64/boot/dts/qcom/msm8937-mtp.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8937-mtp.dtsi
@@ -11,8 +11,11 @@
* GNU General Public License for more details.
*/
+#include "msm8937-pinctrl.dtsi"
&blsp1_uart2 {
status = "ok";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart_console_active>;
};
&sdhc_1 {
@@ -63,3 +66,51 @@
status = "ok";
};
+
+#include "msm8937-mdss-panels.dtsi"
+
+&mdss_mdp {
+ qcom,mdss-pref-prim-intf = "dsi";
+};
+
+&mdss_dsi {
+ hw-config = "single_dsi";
+};
+
+&mdss_dsi0 {
+ qcom,dsi-pref-prim-pan = <&dsi_truly_1080_vid>;
+ pinctrl-names = "mdss_default", "mdss_sleep";
+ pinctrl-0 = <&mdss_dsi_active &mdss_te_active>;
+ pinctrl-1 = <&mdss_dsi_suspend &mdss_te_suspend>;
+
+ qcom,platform-te-gpio = <&tlmm 24 0>;
+ qcom,platform-reset-gpio = <&tlmm 61 0>;
+ qcom,platform-bklight-en-gpio = <&tlmm 59 0>;
+};
+
+&mdss_dsi1 {
+ status = "disabled";
+ qcom,dsi-pref-prim-pan = <&dsi_adv7533_1080p>;
+ pinctrl-names = "mdss_default", "mdss_sleep";
+ pinctrl-0 = <&mdss_dsi_active &mdss_te_active>;
+ pinctrl-1 = <&mdss_dsi_suspend &mdss_te_suspend>;
+
+ qcom,pluggable;
+ qcom,platform-te-gpio = <&tlmm 24 0>;
+ qcom,platform-reset-gpio = <&tlmm 61 0>;
+ qcom,platform-bklight-en-gpio = <&tlmm 59 0>;
+};
+
+&dsi_truly_1080_vid {
+ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
+ qcom,mdss-dsi-pan-enable-dynamic-fps;
+ qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp";
+};
+
+&dsi_truly_1080_cmd {
+ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
+ qcom,ulps-enabled;
+ qcom,partial-update-enabled;
+ qcom,panel-roi-alignment = <2 2 4 2 1080 2>;
+};
+
diff --git a/arch/arm64/boot/dts/qcom/msm8937-pmi8950-mtp.dtsi b/arch/arm64/boot/dts/qcom/msm8937-pmi8950-mtp.dtsi
index 3197c8d..1afa230 100644
--- a/arch/arm64/boot/dts/qcom/msm8937-pmi8950-mtp.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8937-pmi8950-mtp.dtsi
@@ -14,17 +14,6 @@
#include "pmi8950.dtsi"
#include "msm8937-mtp.dtsi"
-&soc {
- led_flash0: qcom,camera-flash {
- cell-index = <0>;
- compatible = "qcom,camera-flash";
- qcom,flash-type = <1>;
- qcom,flash-source = <&pmi8950_flash0 &pmi8950_flash1>;
- qcom,torch-source = <&pmi8950_torch0 &pmi8950_torch1>;
- qcom,switch-source = <&pmi8950_switch>;
- };
-};
-
&vendor {
mtp_batterydata: qcom,battery-data {
qcom,batt-id-range-pct = <15>;
@@ -56,3 +45,13 @@
&ibb_regulator {
qcom,qpnp-ibb-discharge-resistor = <32>;
};
+
+&mdss_dsi0 {
+ lab-supply = <&lab_regulator>;
+ ibb-supply = <&ibb_regulator>;
+};
+
+&mdss_dsi1 {
+ lab-supply = <&lab_regulator>;
+ ibb-supply = <&ibb_regulator>;
+};
diff --git a/arch/arm64/boot/dts/qcom/msm8937.dtsi b/arch/arm64/boot/dts/qcom/msm8937.dtsi
index 9ef97fa..0eca751 100644
--- a/arch/arm64/boot/dts/qcom/msm8937.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8937.dtsi
@@ -27,6 +27,32 @@
bootargs = "sched_enable_hmp=1";
};
+ firmware: firmware {
+ android {
+ compatible = "android,firmware";
+ fstab {
+ compatible = "android,fstab";
+ vendor {
+ compatible = "android,vendor";
+ dev = "/dev/block/platform/soc/7824900.sdhci/by-name/vendor";
+ type = "ext4";
+ mnt_flags = "ro,barrier=1,discard";
+ fsmgr_flags = "wait";
+ status = "ok";
+ };
+ system {
+ compatible = "android,system";
+ dev = "/dev/block/platform/soc/7824900.sdhci/by-name/system";
+ type = "ext4";
+ mnt_flags = "ro,barrier=1,discard";
+ fsmgr_flags = "wait";
+ status = "ok";
+ };
+
+ };
+ };
+ };
+
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
@@ -79,6 +105,14 @@
size = <0 0x1000000>;
};
+ qseecom_ta_mem: qseecom_ta_region {
+ compatible = "shared-dma-pool";
+ alloc-ranges = <0 0x00000000 0 0xffffffff>;
+ reusable;
+ alignment = <0 0x400000>;
+ size = <0 0x1000000>;
+ };
+
adsp_mem: adsp_region@0 {
compatible = "shared-dma-pool";
reusable;
@@ -128,9 +162,13 @@
#include "msm8937-pinctrl.dtsi"
#include "msm8937-cpu.dtsi"
#include "msm8937-ion.dtsi"
+#include "msm-arm-smmu-8937.dtsi"
#include "msm8937-smp2p.dtsi"
#include "msm8937-bus.dtsi"
#include "msm8937-pm.dtsi"
+#include "msm8937-gpu.dtsi"
+#include "msm8937-mdss.dtsi"
+#include "msm8937-mdss-pll.dtsi"
&soc {
#address-cells = <1>;
@@ -429,6 +467,9 @@
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0x78b0000 0x200>;
interrupts = <0 108 0>;
+ clocks = <&clock_gcc clk_gcc_blsp1_uart2_apps_clk>,
+ <&clock_gcc clk_gcc_blsp1_ahb_clk>;
+ clock-names = "core", "iface";
status = "disabled";
};
@@ -482,6 +523,17 @@
#clock-cells = <1>;
};
+ clock_gcc_mdss: qcom,gcc-mdss@1800000 {
+ compatible = "qcom,gcc-mdss-8937";
+ clocks = <&mdss_dsi0_pll clk_dsi_pll0_pixel_clk_src>,
+ <&mdss_dsi0_pll clk_dsi_pll0_byte_clk_src>,
+ <&mdss_dsi1_pll clk_dsi_pll1_pixel_clk_src>,
+ <&mdss_dsi1_pll clk_dsi_pll1_byte_clk_src>;
+ clock-names = "pclk0_src", "byte0_src", "pclk1_src",
+ "byte1_src";
+ #clock-cells = <1>;
+ };
+
clock_cpu: qcom,cpu-clock-8939@b111050 {
compatible = "qcom,cpu-clock-8939";
reg = <0xb011050 0x8>,
@@ -1270,12 +1322,292 @@
status = "disabled";
};
+
+ qcom_seecom: qseecom@85b00000 {
+ compatible = "qcom,qseecom";
+ reg = <0x85b00000 0x800000>;
+ reg-names = "secapp-region";
+ qcom,hlos-num-ce-hw-instances = <1>;
+ qcom,hlos-ce-hw-instance = <0>;
+ qcom,qsee-ce-hw-instance = <0>;
+ qcom,disk-encrypt-pipe-pair = <2>;
+ qcom,support-fde;
+ qcom,msm-bus,name = "qseecom-noc";
+ qcom,msm-bus,num-cases = <4>;
+ qcom,msm-bus,num-paths = <1>;
+ qcom,support-bus-scaling;
+ qcom,msm-bus,vectors-KBps =
+ <55 512 0 0>,
+ <55 512 0 0>,
+ <55 512 120000 1200000>,
+ <55 512 393600 3936000>;
+ clocks = <&clock_gcc clk_crypto_clk_src>,
+ <&clock_gcc clk_gcc_crypto_clk>,
+ <&clock_gcc clk_gcc_crypto_ahb_clk>,
+ <&clock_gcc clk_gcc_crypto_axi_clk>;
+ clock-names = "core_clk_src", "core_clk",
+ "iface_clk", "bus_clk";
+ qcom,ce-opp-freq = <100000000>;
+ };
+
+ qcom_rng: qrng@e3000 {
+ compatible = "qcom,msm-rng";
+ reg = <0xe3000 0x1000>;
+ qcom,msm-rng-iface-clk;
+ qcom,no-qrng-config;
+ qcom,msm-bus,name = "msm-rng-noc";
+ qcom,msm-bus,num-cases = <2>;
+ qcom,msm-bus,num-paths = <1>;
+ qcom,msm-bus,vectors-KBps =
+ <1 618 0 0>, /* No vote */
+ <1 618 0 800>; /* 100 MB/s */
+ clocks = <&clock_gcc clk_gcc_prng_ahb_clk>;
+ clock-names = "iface_clk";
+ };
+
+ qcom_crypto: qcrypto@720000 {
+ compatible = "qcom,qcrypto";
+ reg = <0x720000 0x20000>,
+ <0x704000 0x20000>;
+ reg-names = "crypto-base","crypto-bam-base";
+ interrupts = <0 207 0>;
+ qcom,bam-pipe-pair = <2>;
+ qcom,ce-hw-instance = <0>;
+ qcom,ce-device = <0>;
+ qcom,ce-hw-shared;
+ qcom,clk-mgmt-sus-res;
+ qcom,msm-bus,name = "qcrypto-noc";
+ qcom,msm-bus,num-cases = <2>;
+ qcom,msm-bus,num-paths = <1>;
+ qcom,msm-bus,vectors-KBps =
+ <55 512 0 0>,
+ <55 512 393600 393600>;
+ clocks = <&clock_gcc clk_crypto_clk_src>,
+ <&clock_gcc clk_gcc_crypto_clk>,
+ <&clock_gcc clk_gcc_crypto_ahb_clk>,
+ <&clock_gcc clk_gcc_crypto_axi_clk>;
+ clock-names = "core_clk_src", "core_clk",
+ "iface_clk", "bus_clk";
+ qcom,use-sw-aes-cbc-ecb-ctr-algo;
+ qcom,use-sw-aes-xts-algo;
+ qcom,use-sw-aes-ccm-algo;
+ qcom,use-sw-ahash-algo;
+ qcom,use-sw-hmac-algo;
+ qcom,use-sw-aead-algo;
+ qcom,ce-opp-freq = <100000000>;
+ };
+
+ qcom_cedev: qcedev@720000 {
+ compatible = "qcom,qcedev";
+ reg = <0x720000 0x20000>,
+ <0x704000 0x20000>;
+ reg-names = "crypto-base","crypto-bam-base";
+ interrupts = <0 207 0>;
+ qcom,bam-pipe-pair = <1>;
+ qcom,ce-hw-instance = <0>;
+ qcom,ce-device = <0>;
+ qcom,ce-hw-shared;
+ qcom,msm-bus,name = "qcedev-noc";
+ qcom,msm-bus,num-cases = <2>;
+ qcom,msm-bus,num-paths = <1>;
+ qcom,msm-bus,vectors-KBps =
+ <55 512 0 0>,
+ <55 512 393600 393600>;
+ clocks = <&clock_gcc clk_crypto_clk_src>,
+ <&clock_gcc clk_gcc_crypto_clk>,
+ <&clock_gcc clk_gcc_crypto_ahb_clk>,
+ <&clock_gcc clk_gcc_crypto_axi_clk>;
+ clock-names = "core_clk_src", "core_clk",
+ "iface_clk", "bus_clk";
+ qcom,ce-opp-freq = <100000000>;
+ };
+
+ pil_mss: qcom,mss@4080000 {
+ compatible = "qcom,pil-q6v55-mss";
+ reg = <0x04080000 0x100>,
+ <0x0194f000 0x010>,
+ <0x01950000 0x008>,
+ <0x01951000 0x008>,
+ <0x04020000 0x040>,
+ <0x01871000 0x004>;
+ reg-names = "qdsp6_base", "halt_q6", "halt_modem", "halt_nc",
+ "rmb_base", "restart_reg";
+
+ interrupts = <GIC_SPI 24 IRQ_TYPE_EDGE_RISING>;
+ vdd_mss-supply = <&pm8937_s1>;
+ vdd_cx-supply = <&pm8937_s2_level>;
+ vdd_cx-voltage = <RPM_SMD_REGULATOR_LEVEL_TURBO>;
+ vdd_mx-supply = <&pm8937_l3_level_ao>;
+ vdd_mx-uV = <RPM_SMD_REGULATOR_LEVEL_TURBO>;
+ vdd_pll-supply = <&pm8937_l7>;
+ qcom,vdd_pll = <1800000>;
+ vdd_mss-uV = <RPM_SMD_REGULATOR_LEVEL_TURBO>;
+
+ clocks = <&clock_gcc clk_xo_pil_mss_clk>,
+ <&clock_gcc clk_gcc_mss_cfg_ahb_clk>,
+ <&clock_gcc clk_gcc_mss_q6_bimc_axi_clk>,
+ <&clock_gcc clk_gcc_boot_rom_ahb_clk>;
+ clock-names = "xo", "iface_clk", "bus_clk", "mem_clk";
+ qcom,proxy-clock-names = "xo";
+ qcom,active-clock-names = "iface_clk", "bus_clk", "mem_clk";
+
+ qcom,pas-id = <5>;
+ qcom,pil-mss-memsetup;
+ qcom,firmware-name = "modem";
+ qcom,pil-self-auth;
+ qcom,override-acc-1 = <0x80800000>;
+ qcom,sysmon-id = <0>;
+ qcom,ssctl-instance-id = <0x12>;
+ qcom,qdsp6v56-1-8-inrush-current;
+ qcom,reset-clk;
+
+ /* GPIO inputs from mss */
+ qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>;
+ qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>;
+ qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>;
+ qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_1_in 3 0>;
+ qcom,gpio-shutdown-ack = <&smp2pgpio_ssr_smp2p_1_in 7 0>;
+
+ /* GPIO output to mss */
+ qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>;
+
+ memory-region = <&modem_mem>;
+ };
+
+ qcom,lpass@c200000 {
+ compatible = "qcom,pil-tz-generic";
+ reg = <0xc200000 0x00100>;
+ interrupts = <GIC_SPI 293 IRQ_TYPE_EDGE_RISING>;
+
+ vdd_cx-supply = <&pm8937_s2_level>;
+ qcom,proxy-reg-names = "vdd_cx";
+ qcom,vdd_cx-uV-uA = <RPM_SMD_REGULATOR_LEVEL_TURBO 100000>;
+
+ clocks = <&clock_gcc clk_xo_pil_lpass_clk>,
+ <&clock_gcc clk_gcc_crypto_clk>,
+ <&clock_gcc clk_gcc_crypto_ahb_clk>,
+ <&clock_gcc clk_gcc_crypto_axi_clk>,
+ <&clock_gcc clk_crypto_clk_src>;
+ clock-names = "xo", "scm_core_clk", "scm_iface_clk",
+ "scm_bus_clk", "scm_core_clk_src";
+ qcom,proxy-clock-names = "xo", "scm_core_clk", "scm_iface_clk",
+ "scm_bus_clk", "scm_core_clk_src";
+ qcom,scm_core_clk_src-freq = <80000000>;
+
+ qcom,mas-crypto = <&mas_crypto>;
+ qcom,pas-id = <1>;
+ qcom,proxy-timeout-ms = <10000>;
+ qcom,smem-id = <423>;
+ qcom,sysmon-id = <1>;
+ qcom,ssctl-instance-id = <0x14>;
+ qcom,firmware-name = "adsp";
+
+ /* GPIO inputs from lpass */
+ qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>;
+ qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_2_in 2 0>;
+ qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_2_in 1 0>;
+ qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_2_in 3 0>;
+
+ /* GPIO output to lpass */
+ qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>;
+
+ memory-region = <&adsp_fw_mem>;
+ };
+
+ qcom,pronto@a21b000 {
+ compatible = "qcom,pil-tz-generic";
+ reg = <0x0a21b000 0x3000>;
+ interrupts = <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>;
+
+ vdd_pronto_pll-supply = <&pm8937_l7>;
+ proxy-reg-names = "vdd_pronto_pll";
+ vdd_pronto_pll-uV-uA = <1800000 18000>;
+ clocks = <&clock_gcc clk_xo_pil_pronto_clk>,
+ <&clock_gcc clk_gcc_crypto_clk>,
+ <&clock_gcc clk_gcc_crypto_ahb_clk>,
+ <&clock_gcc clk_gcc_crypto_axi_clk>,
+ <&clock_gcc clk_crypto_clk_src>;
+
+ clock-names = "xo", "scm_core_clk", "scm_iface_clk",
+ "scm_bus_clk", "scm_core_clk_src";
+ qcom,proxy-clock-names = "xo", "scm_core_clk", "scm_iface_clk",
+ "scm_bus_clk", "scm_core_clk_src";
+ qcom,scm_core_clk_src = <80000000>;
+
+ qcom,mas-crypto = <&mas_crypto>;
+ qcom,pas-id = <6>;
+ qcom,proxy-timeout-ms = <10000>;
+ qcom,smem-id = <422>;
+ qcom,sysmon-id = <6>;
+ qcom,ssctl-instance-id = <0x13>;
+ qcom,firmware-name = "wcnss";
+
+ /* GPIO inputs from wcnss */
+ qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_4_in 0 0>;
+ qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_4_in 1 0>;
+ qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_4_in 2 0>;
+ qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_4_in 3 0>;
+
+ /* GPIO output to wcnss */
+ qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_4_out 0 0>;
+ memory-region = <&wcnss_fw_mem>;
+ };
+
+ qcom,venus@1de0000 {
+ compatible = "qcom,pil-tz-generic";
+ reg = <0x1de0000 0x4000>;
+
+ vdd-supply = <&gdsc_venus>;
+ qcom,proxy-reg-names = "vdd";
+
+ clocks = <&clock_gcc clk_gcc_venus0_vcodec0_clk>,
+ <&clock_gcc clk_gcc_venus0_ahb_clk>,
+ <&clock_gcc clk_gcc_venus0_axi_clk>,
+ <&clock_gcc clk_gcc_crypto_clk>,
+ <&clock_gcc clk_gcc_crypto_ahb_clk>,
+ <&clock_gcc clk_gcc_crypto_axi_clk>,
+ <&clock_gcc clk_crypto_clk_src>;
+
+ clock-names = "core_clk", "iface_clk", "bus_clk",
+ "scm_core_clk", "scm_iface_clk",
+ "scm_bus_clk", "scm_core_clk_src";
+
+ qcom,proxy-clock-names = "core_clk", "iface_clk",
+ "bus_clk", "scm_core_clk",
+ "scm_iface_clk", "scm_bus_clk",
+ "scm_core_clk_src";
+ qcom,scm_core_clk_src-freq = <80000000>;
+
+ qcom,msm-bus,name = "pil-venus";
+ qcom,msm-bus,num-cases = <2>;
+ qcom,msm-bus,num-paths = <1>;
+ qcom,msm-bus,vectors-KBps =
+ <63 512 0 0>,
+ <63 512 0 304000>;
+
+ qcom,mas-crypto = <&mas_crypto>;
+ qcom,pas-id = <9>;
+ qcom,proxy-timeout-ms = <100>;
+ qcom,firmware-name = "venus";
+ memory-region = <&venus_mem>;
+ };
+
+ bam_dmux: qcom,bam_dmux@4044000 {
+ compatible = "qcom,bam_dmux";
+ reg = <0x4044000 0x19000>;
+ interrupts = <0 162 1>;
+ qcom,rx-ring-size = <32>;
+ qcom,max-rx-mtu = <4096>;
+ qcom,fast-shutdown;
+ qcom,no-cpu-affinity;
+ };
};
#include "pm8937-rpm-regulator.dtsi"
#include "msm8937-regulator.dtsi"
#include "pm8937.dtsi"
#include "msm-gdsc-8916.dtsi"
+#include "msm8937-coresight.dtsi"
&gdsc_venus {
clock-names = "bus_clk", "core_clk";
diff --git a/arch/arm64/boot/dts/qcom/msm8953-audio.dtsi b/arch/arm64/boot/dts/qcom/msm8953-audio.dtsi
index c19f267..fc10b4d 100644
--- a/arch/arm64/boot/dts/qcom/msm8953-audio.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953-audio.dtsi
@@ -248,16 +248,23 @@
"SpkrRight IN", "SPK2 OUT";
qcom,tasha-mclk-clk-freq = <9600000>;
+ qcom,cdc-us-euro-gpios = <&tlmm 63 0>;
+ qcom,msm-mbhc-hphl-swh = <0>;
+ qcom,msm-mbhc-gnd-swh = <0>;
+ qcom,cdc-us-eu-gpios = <&cdc_us_euro_sw>;
+ qcom,quin-mi2s-gpios = <&cdc_quin_mi2s_gpios>;
asoc-platform = <&pcm0>, <&pcm1>, <&pcm2>, <&voip>, <&voice>,
<&loopback>, <&compress>, <&hostless>,
- <&afe>, <&lsm>, <&routing>;
+ <&afe>, <&lsm>, <&routing>, <&cpe>, <&compr>,
+ <&pcm_noirq>;
asoc-platform-names = "msm-pcm-dsp.0", "msm-pcm-dsp.1",
"msm-pcm-dsp.2", "msm-voip-dsp",
"msm-pcm-voice", "msm-pcm-loopback",
"msm-compress-dsp", "msm-pcm-hostless",
"msm-pcm-afe", "msm-lsm-client",
- "msm-pcm-routing";
+ "msm-pcm-routing", "msm-cpe-lsm",
+ "msm-compr-dsp", "msm-pcm-dsp-noirq";
asoc-cpu = <&dai_pri_auxpcm>,
<&dai_mi2s2>, <&dai_mi2s3>, <&dai_mi2s5>,
@@ -289,9 +296,6 @@
asoc-codec = <&stub_codec>, <&hdmi_dba>;
asoc-codec-names = "msm-stub-codec.1", "msm-hdmi-dba-codec-rx";
- qcom,cdc-us-euro-gpios = <&tlmm 63 0>;
- qcom,msm-mbhc-hphl-swh = <0>;
- qcom,msm-mbhc-gnd-swh = <0>;
qcom,wsa-max-devs = <2>;
qcom,wsa-devs = <&wsa881x_211>, <&wsa881x_212>,
@@ -300,11 +304,19 @@
"SpkrLeft", "SpkrRight";
};
+ cpe: qcom,msm-cpe-lsm {
+ compatible = "qcom,msm-cpe-lsm";
+ };
+
wcd9xxx_intc: wcd9xxx-irq {
status = "disabled";
+ compatible = "qcom,wcd9xxx-irq";
+ interrupt-controller;
+ #interrupt-cells = <1>;
interrupt-parent = <&tlmm>;
- interrupts = <73 0>;
qcom,gpio-connect = <&tlmm 73 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&wcd_intr_default>;
};
clock_audio: audio_ext_clk {
@@ -313,29 +325,64 @@
clock-names = "osr_clk";
qcom,node_has_rpm_clock;
#clock-cells = <1>;
+ pinctrl-names = "active", "sleep";
+ pinctrl-0 = <&tasha_mclk_default>;
+ pinctrl-1 = <&tasha_mclk_default>;
qcom,audio-ref-clk-gpio = <&pm8953_gpios 1 0>;
- qcom,lpass-mclk-id = "pri_mclk";
clocks = <&clock_gcc clk_div_clk2>;
- pinctrl-0 = <&cdc_mclk2_sleep>;
- pinctrl-1 = <&cdc_mclk2_active>;
};
- wcd_rst_gpio: wcd_gpio_ctrl {
+ wcd_rst_gpio: msm_cdc_pinctrl@67 {
status = "disabled";
- qcom,cdc-rst-n-gpio = <&tlmm 67 0>;
+ compatible = "qcom,msm-cdc-pinctrl";
+ pinctrl-names = "aud_active", "aud_sleep";
+ pinctrl-0 = <&cdc_reset_active>;
+ pinctrl-1 = <&cdc_reset_sleep>;
};
};
&slim_msm {
status = "disabled";
+
+ dai_slim: msm_dai_slim {
+ status = "disabled";
+ compatible = "qcom,msm-dai-slim";
+ elemental-addr = [ff ff ff fe 17 02];
+ };
+
wcd9335: tasha_codec {
status = "disabled";
compatible = "qcom,tasha-slim-pgd";
+ elemental-addr = [00 01 A0 01 17 02];
+
+ qcom,cdc-slim-ifd = "tasha-slim-ifd";
+ qcom,cdc-slim-ifd-elemental-addr = [00 00 A0 01 17 02];
+
+ interrupt-parent = <&wcd9xxx_intc>;
+ interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
+ 17 18 19 20 21 22 23 24 25 26 27 28 29 30>;
+
+ qcom,wcd-rst-gpio-node = <&wcd_rst_gpio>;
+
clock-names = "wcd_clk", "wcd_native_clk";
clocks = <&clock_audio clk_audio_pmi_clk>,
<&clock_audio clk_audio_ap_clk2>;
- qcom,cdc-reset-gpio = <&tlmm 67 0>;
+ qcom,cdc-static-supplies =
+ "cdc-vdd-buck",
+ "cdc-buck-sido",
+ "cdc-vdd-tx-h",
+ "cdc-vdd-rx-h",
+ "cdc-vdd-px";
+
+ qcom,cdc-on-demand-supplies = "cdc-vdd-mic-bias";
+ qcom,cdc-micbias1-mv = <1800>;
+ qcom,cdc-micbias2-mv = <1800>;
+ qcom,cdc-micbias3-mv = <1800>;
+ qcom,cdc-micbias4-mv = <1800>;
+
+ qcom,cdc-dmic-sample-rate = <2400000>;
+ qcom,cdc-mclk-clk-rate = <9600000>;
cdc-vdd-buck-supply = <&eldo2_8953>;
qcom,cdc-vdd-buck-voltage = <1800000 1800000>;
@@ -372,6 +419,17 @@
qcom,master-en = <1>;
qcom,out-strength = <2>;
};
+
+ tasha_mclk {
+ tasha_mclk_default: tasha_mclk_default{
+ pins = "gpio1";
+ function = "func1";
+ qcom,drive-strength = <2>;
+ power-source = <0>;
+ bias-disable;
+ output-low;
+ };
+ };
};
&pm8953_1 {
diff --git a/arch/arm64/boot/dts/qcom/msm8953-cdp.dtsi b/arch/arm64/boot/dts/qcom/msm8953-cdp.dtsi
index 9aa5260..8f75caf 100644
--- a/arch/arm64/boot/dts/qcom/msm8953-cdp.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953-cdp.dtsi
@@ -11,6 +11,8 @@
* GNU General Public License for more details.
*/
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/msm-clocks-8953.h>
#include "msm8953-audio-cdp.dtsi"
&blsp1_uart0 {
diff --git a/arch/arm64/boot/dts/qcom/msm8953-ext-codec-mtp.dts b/arch/arm64/boot/dts/qcom/msm8953-ext-codec-mtp.dts
index 59a3136..ee22633 100644
--- a/arch/arm64/boot/dts/qcom/msm8953-ext-codec-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/msm8953-ext-codec-mtp.dts
@@ -26,3 +26,75 @@
qcom,pmic-id = <0x010016 0x010011 0x0 0x0>;
};
+&int_codec {
+ status = "disabled";
+};
+
+&pmic_analog_codec {
+ status = "disabled";
+};
+
+&wsa881x_i2c_f {
+ status = "disabled";
+};
+
+&wsa881x_i2c_45 {
+ status = "disabled";
+};
+
+&cdc_pri_mi2s_gpios {
+ status = "disabled";
+};
+
+&wsa881x_analog_vi_gpio {
+ status = "disabled";
+};
+
+&wsa881x_analog_clk_gpio {
+ status = "disabled";
+};
+
+&wsa881x_analog_reset_gpio {
+ status = "disabled";
+};
+
+&cdc_comp_gpios {
+ status = "disabled";
+};
+
+&slim_msm {
+ status = "okay";
+};
+
+&dai_slim {
+ status = "okay";
+};
+
+&wcd9xxx_intc {
+ status = "okay";
+};
+
+&clock_audio {
+ status = "okay";
+};
+
+&wcd9335 {
+ status = "okay";
+};
+
+&cdc_us_euro_sw {
+ status = "okay";
+};
+
+&cdc_quin_mi2s_gpios {
+ status = "okay";
+};
+
+&wcd_rst_gpio {
+ status = "okay";
+};
+
+&ext_codec {
+ qcom,model = "msm8953-tasha-snd-card";
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/qcom/msm8953-ipc.dtsi b/arch/arm64/boot/dts/qcom/msm8953-ipc.dtsi
index 26f4338..b62d12d 100644
--- a/arch/arm64/boot/dts/qcom/msm8953-ipc.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953-ipc.dtsi
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -11,6 +11,8 @@
* GNU General Public License for more details.
*/
+#include <dt-bindings/gpio/gpio.h>
+
&blsp1_uart0 {
status = "ok";
pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/qcom/msm8953-mdss-panels.dtsi b/arch/arm64/boot/dts/qcom/msm8953-mdss-panels.dtsi
index 28a6b74..c6bc2b9 100644
--- a/arch/arm64/boot/dts/qcom/msm8953-mdss-panels.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953-mdss-panels.dtsi
@@ -47,6 +47,23 @@
qcom,supply-enable-load = <100000>;
qcom,supply-disable-load = <100>;
};
+ qcom,panel-supply-entry@2 {
+ reg = <2>;
+ qcom,supply-name = "lab";
+ qcom,supply-min-voltage = <4600000>;
+ qcom,supply-max-voltage = <6000000>;
+ qcom,supply-enable-load = <100000>;
+ qcom,supply-disable-load = <100>;
+ };
+ qcom,panel-supply-entry@3 {
+ reg = <3>;
+ qcom,supply-name = "ibb";
+ qcom,supply-min-voltage = <4600000>;
+ qcom,supply-max-voltage = <6000000>;
+ qcom,supply-enable-load = <100000>;
+ qcom,supply-disable-load = <100>;
+ qcom,supply-post-on-sleep = <10>;
+ };
};
};
diff --git a/arch/arm64/boot/dts/qcom/msm8953-mtp.dtsi b/arch/arm64/boot/dts/qcom/msm8953-mtp.dtsi
index e22d40f..76e39f6 100644
--- a/arch/arm64/boot/dts/qcom/msm8953-mtp.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953-mtp.dtsi
@@ -11,6 +11,9 @@
* GNU General Public License for more details.
*/
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/msm-clocks-8953.h>
+
&blsp1_uart0 {
status = "ok";
pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/qcom/msm8953-qrd.dtsi b/arch/arm64/boot/dts/qcom/msm8953-qrd.dtsi
index 4e1c030..845bf70 100644
--- a/arch/arm64/boot/dts/qcom/msm8953-qrd.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953-qrd.dtsi
@@ -11,6 +11,9 @@
* GNU General Public License for more details.
*/
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/msm-clocks-8953.h>
+
&soc {
i2c@78b7000 { /* BLSP1 QUP3 */
/delete-node/ synaptics@4b;
diff --git a/arch/arm64/boot/dts/qcom/msm8953-wsa881x.dtsi b/arch/arm64/boot/dts/qcom/msm8953-wsa881x.dtsi
index 671b736..86f5323 100644
--- a/arch/arm64/boot/dts/qcom/msm8953-wsa881x.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953-wsa881x.dtsi
@@ -15,6 +15,7 @@
tasha_codec {
swr_master {
compatible = "qcom,swr-wcd";
+ qcom,swr-num-dev = <2>;
#address-cells = <2>;
#size-cells = <0>;
diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi
index b4111b9..e66e1da 100644
--- a/arch/arm64/boot/dts/qcom/msm8953.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi
@@ -138,6 +138,12 @@
alignment = <0 0x400000>;
size = <0 0x800000>;
};
+
+ dump_mem: mem_dump_region {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0 0x2400000>;
+ };
};
aliases {
@@ -336,6 +342,52 @@
thermal_zones: thermal-zones {};
+ mem_dump {
+ compatible = "qcom,mem-dump";
+ memory-region = <&dump_mem>;
+
+ rpmh_dump {
+ qcom,dump-size = <0x2000000>;
+ qcom,dump-id = <0xec>;
+ };
+
+ fcm_dump {
+ qcom,dump-size = <0x8400>;
+ qcom,dump-id = <0xee>;
+ };
+
+ rpm_sw_dump {
+ qcom,dump-size = <0x28000>;
+ qcom,dump-id = <0xea>;
+ };
+
+ pmic_dump {
+ qcom,dump-size = <0x10000>;
+ qcom,dump-id = <0xe4>;
+ };
+
+ tmc_etf_dump {
+ qcom,dump-size = <0x10000>;
+ qcom,dump-id = <0xf0>;
+ };
+
+ tmc_etr_reg_dump {
+ qcom,dump-size = <0x1000>;
+ qcom,dump-id = <0x100>;
+ };
+
+ tmc_etf_reg_dump {
+ qcom,dump-size = <0x1000>;
+ qcom,dump-id = <0x101>;
+ };
+
+ misc_data_dump {
+ qcom,dump-size = <0x1000>;
+ qcom,dump-id = <0xe8>;
+ };
+
+ };
+
tsens0: tsens@4a8000 {
compatible = "qcom,msm8953-tsens";
reg = <0x4a8000 0x1000>,
@@ -1391,8 +1443,8 @@
interrupts = <GIC_SPI 190 IRQ_TYPE_NONE>;
qcom,ee = <0>;
qcom,channel = <0>;
- #address-cells = <2>;
- #size-cells = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
interrupt-controller;
#interrupt-cells = <4>;
cell-index = <0>;
diff --git a/arch/arm64/boot/dts/qcom/pm8953.dtsi b/arch/arm64/boot/dts/qcom/pm8953.dtsi
index 75dda62..3a587a8 100644
--- a/arch/arm64/boot/dts/qcom/pm8953.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm8953.dtsi
@@ -35,6 +35,7 @@
"resin-bark", "kpdpwr-resin-bark";
qcom,pon-dbc-delay = <15625>;
qcom,system-reset;
+ qcom,store-hard-reset-reason;
qcom,pon_1 {
qcom,pon-type = <0>;
@@ -78,6 +79,24 @@
gpio-controller;
#gpio-cells = <2>;
+
+ case_therm {
+ cas_therm_default: cas_therm_default {
+ pins = "mpp4";
+ function = "analog";
+ input-enable;
+ qcom,amux-route = <3>;
+ };
+ };
+
+ pa_therm1 {
+ pa_therm1_default: pa_therm1_default {
+ pins = "mpp2";
+ function = "analog";
+ input-enable;
+ qcom,amux-route = <1>;
+ };
+ };
};
pm8953_gpios: gpios {
@@ -87,15 +106,16 @@
interrupts = <0x0 0xc0 0 IRQ_TYPE_NONE>,
<0x0 0xc1 0 IRQ_TYPE_NONE>,
<0x0 0xc3 0 IRQ_TYPE_NONE>,
+ <0x0 0xc4 0 IRQ_TYPE_NONE>,
<0x0 0xc6 0 IRQ_TYPE_NONE>,
<0x0 0xc7 0 IRQ_TYPE_NONE>;
interrupt-names = "pm8953_gpio1", "pm8953_gpio2",
- "pm8953_gpio4", "pm8953_gpio7",
- "pm8953_gpio8";
+ "pm8953_gpio4", "pm8953_gpio5",
+ "pm8953_gpio7", "pm8953_gpio8";
gpio-controller;
#gpio-cells = <2>;
- qcom,gpios-disallowed = <3 5 6>;
+ qcom,gpios-disallowed = <3 6>;
};
pm8953_vadc: vadc@3100 {
@@ -109,6 +129,8 @@
qcom,adc-vdd-reference = <1800>;
qcom,vadc-poll-eoc;
#thermal-sensor-cells = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pa_therm1_default &cas_therm_default>;
chan@5 {
label = "vcoin";
diff --git a/arch/arm64/boot/dts/qcom/pmi632.dtsi b/arch/arm64/boot/dts/qcom/pmi632.dtsi
index b5dc49b..38d2629 100644
--- a/arch/arm64/boot/dts/qcom/pmi632.dtsi
+++ b/arch/arm64/boot/dts/qcom/pmi632.dtsi
@@ -18,8 +18,8 @@
qcom,pmi632@2 {
compatible = "qcom,spmi-pmic";
reg = <0x2 SPMI_USID>;
- #address-cells = <2>;
- #size-cells = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
pmi632_revid: qcom,revid@100 {
compatible = "qcom,qpnp-revid";
@@ -432,8 +432,8 @@
pmi632_3: qcom,pmi632@3 {
compatible ="qcom,spmi-pmic";
reg = <0x3 SPMI_USID>;
- #address-cells = <2>;
- #size-cells = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
pmi632_vib: qcom,vibrator@5700 {
compatible = "qcom,qpnp-vibrator-ldo";
@@ -456,16 +456,19 @@
label = "red";
pwms = <&pmi632_pwm 0 1000000>;
led-sources = <0>;
+ linux,default-trigger = "timer";
};
green {
label = "green";
pwms = <&pmi632_pwm 1 1000000>;
led-sources = <1>;
+ linux,default-trigger = "timer";
};
blue {
label = "blue";
pwms = <&pmi632_pwm 2 1000000>;
led-sources = <2>;
+ linux,default-trigger = "timer";
};
};
diff --git a/arch/arm64/boot/dts/qcom/pmi8950.dtsi b/arch/arm64/boot/dts/qcom/pmi8950.dtsi
index 6f1f899..8797ea8 100644
--- a/arch/arm64/boot/dts/qcom/pmi8950.dtsi
+++ b/arch/arm64/boot/dts/qcom/pmi8950.dtsi
@@ -18,8 +18,8 @@
qcom,pmi8950@2 {
compatible ="qcom,spmi-pmic";
reg = <0x2 SPMI_USID>;
- #address-cells = <2>;
- #size-cells = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
pmi8950_revid: qcom,revid@100 {
compatible = "qcom,qpnp-revid";
diff --git a/arch/arm64/boot/dts/qcom/qcs605-lc.dtsi b/arch/arm64/boot/dts/qcom/qcs605-lc.dtsi
index 2bef956..6b31136 100644
--- a/arch/arm64/boot/dts/qcom/qcs605-lc.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs605-lc.dtsi
@@ -91,6 +91,13 @@
};
};
};
+
+ qcom,chd_silver {
+ compatible = "qcom,core-hang-detect";
+ label = "silver";
+ qcom,threshold-arr = <0x17e00058 0x17e10058>;
+ qcom,config-arr = <0x17e00060 0x17e10060>;
+ };
};
&pm660_temp_alarm {
diff --git a/arch/arm64/boot/dts/qcom/sdm450-pmi632-cdp-s2.dtsi b/arch/arm64/boot/dts/qcom/sdm450-pmi632-cdp-s2.dtsi
index c47e323..d8a0e9d 100644
--- a/arch/arm64/boot/dts/qcom/sdm450-pmi632-cdp-s2.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm450-pmi632-cdp-s2.dtsi
@@ -37,25 +37,3 @@
qcom,mdss-dsi-bl-pmic-bank-select = <0>;
qcom,mdss-dsi-pwm-gpio = <&pm8953_gpios 8 0>;
};
-
-
-&dsi_panel_pwr_supply {
- qcom,panel-supply-entry@2 {
- reg = <2>;
- qcom,supply-name = "lab";
- qcom,supply-min-voltage = <4600000>;
- qcom,supply-max-voltage = <6000000>;
- qcom,supply-enable-load = <100000>;
- qcom,supply-disable-load = <100>;
- };
- qcom,panel-supply-entry@3 {
- reg = <3>;
- qcom,supply-name = "ibb";
- qcom,supply-min-voltage = <4600000>;
- qcom,supply-max-voltage = <6000000>;
- qcom,supply-enable-load = <100000>;
- qcom,supply-disable-load = <100>;
- qcom,supply-post-on-sleep = <10>;
- };
-};
-
diff --git a/arch/arm64/boot/dts/qcom/sdm450-pmi632-mtp-s3.dtsi b/arch/arm64/boot/dts/qcom/sdm450-pmi632-mtp-s3.dtsi
index d532434..129d507 100644
--- a/arch/arm64/boot/dts/qcom/sdm450-pmi632-mtp-s3.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm450-pmi632-mtp-s3.dtsi
@@ -38,24 +38,3 @@
qcom,mdss-dsi-bl-pmic-bank-select = <0>;
qcom,mdss-dsi-pwm-gpio = <&pm8953_gpios 8 0>;
};
-
-&dsi_panel_pwr_supply {
- qcom,panel-supply-entry@2 {
- reg = <2>;
- qcom,supply-name = "lab";
- qcom,supply-min-voltage = <4600000>;
- qcom,supply-max-voltage = <6000000>;
- qcom,supply-enable-load = <100000>;
- qcom,supply-disable-load = <100>;
- };
- qcom,panel-supply-entry@3 {
- reg = <3>;
- qcom,supply-name = "ibb";
- qcom,supply-min-voltage = <4600000>;
- qcom,supply-max-voltage = <6000000>;
- qcom,supply-enable-load = <100000>;
- qcom,supply-disable-load = <100>;
- qcom,supply-post-on-sleep = <10>;
- };
-};
-
diff --git a/arch/arm64/boot/dts/qcom/sdm632.dtsi b/arch/arm64/boot/dts/qcom/sdm632.dtsi
index 80e6749..08a247f 100644
--- a/arch/arm64/boot/dts/qcom/sdm632.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm632.dtsi
@@ -36,3 +36,125 @@
&clock_gcc_gfx {
compatible = "qcom,gcc-gfx-sdm632";
};
+
+&thermal_zones {
+ camera-usr {
+ status = "disabled";
+ };
+
+ apc1-l2-usr {
+ status = "disabled";
+ };
+
+ apc0-cpu0-usr {
+ status = "disabled";
+ };
+
+ apc0-cpu1-usr {
+ status = "disabled";
+ };
+
+ apc0-cpu2-usr {
+ status = "disabled";
+ };
+
+ apc0-cpu3-usr {
+ status = "disabled";
+ };
+
+ apc0-l2-usr {
+ status = "disabled";
+ };
+
+ gpu0-usr {
+ status = "disabled";
+ };
+
+ gpu1-usr {
+ status = "disabled";
+ };
+
+ video-usr {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-governor = "user_space";
+ thermal-sensors = <&tsens0 3>;
+ trips {
+ active-config0 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ };
+ };
+
+ cpuss0-usr {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens0 8>;
+ thermal-governor = "user_space";
+ trips {
+ active-config0 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ };
+ };
+
+ cpuss1-usr {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens0 9>;
+ thermal-governor = "user_space";
+ trips {
+ active-config0 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ };
+ };
+
+ cpuss3-usr {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens0 13>;
+ thermal-governor = "user_space";
+ trips {
+ active-config0 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ };
+ };
+
+ camera-usr {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens0 14>;
+ thermal-governor = "user_space";
+ trips {
+ active-config0 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ };
+ };
+
+ gpu0-usr {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens0 15>;
+ thermal-governor = "user_space";
+ trips {
+ active-config0 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/sdm670-camera.dtsi b/arch/arm64/boot/dts/qcom/sdm670-camera.dtsi
index d9068b1..46e555a5 100644
--- a/arch/arm64/boot/dts/qcom/sdm670-camera.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670-camera.dtsi
@@ -403,13 +403,16 @@
label = "cpas";
arch-compat = "cpas_top";
status = "ok";
- reg-names = "cam_cpas_top", "cam_camnoc";
+ reg-names = "cam_cpas_top", "cam_camnoc", "core_top_csr_tcsr";
reg = <0xac40000 0x1000>,
- <0xac42000 0x5000>;
- reg-cam-base = <0x40000 0x42000>;
+ <0xac42000 0x5000>,
+ <0x01fc0000 0x30000>;
+ reg-cam-base = <0x40000 0x42000 0x0>;
interrupt-names = "cpas_camnoc";
interrupts = <0 459 0>;
qcom,cpas-hw-ver = <0x170110>; /* Titan v170 v1.1.0 */
+ nvmem-cells = <&minor_rev>;
+ nvmem-cell-names = "minor_rev";
regulator-names = "camss-vdd";
camss-vdd-supply = <&titan_top_gdsc>;
clock-names = "gcc_ahb_clk",
diff --git a/arch/arm64/boot/dts/qcom/sdm670-gpu.dtsi b/arch/arm64/boot/dts/qcom/sdm670-gpu.dtsi
index 9acef75..011192a 100644
--- a/arch/arm64/boot/dts/qcom/sdm670-gpu.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670-gpu.dtsi
@@ -429,38 +429,74 @@
qcom,speed-bin = <163>;
- qcom,initial-pwrlevel = <3>;
+ qcom,initial-pwrlevel = <7>;
- /* SVS_L1 */
+ /* TURBO_L1 */
qcom,gpu-pwrlevel@0 {
reg = <0>;
- qcom,gpu-freq = <430000000>;
+ qcom,gpu-freq = <780000000>;
qcom,bus-freq = <11>;
+ qcom,bus-min = <10>;
+ qcom,bus-max = <11>;
+ };
+
+ /* TURBO */
+ qcom,gpu-pwrlevel@1 {
+ reg = <1>;
+ qcom,gpu-freq = <750000000>;
+ qcom,bus-freq = <11>;
+ qcom,bus-min = <9>;
+ qcom,bus-max = <11>;
+ };
+
+ /* NOM_L1 */
+ qcom,gpu-pwrlevel@2 {
+ reg = <2>;
+ qcom,gpu-freq = <650000000>;
+ qcom,bus-freq = <10>;
qcom,bus-min = <8>;
qcom,bus-max = <11>;
};
- /* SVS */
- qcom,gpu-pwrlevel@1 {
- reg = <1>;
- qcom,gpu-freq = <355000000>;
- qcom,bus-freq = <8>;
- qcom,bus-min = <5>;
- qcom,bus-max = <9>;
+ /* NOM */
+ qcom,gpu-pwrlevel@3 {
+ reg = <3>;
+ qcom,gpu-freq = <565000000>;
+ qcom,bus-freq = <9>;
+ qcom,bus-min = <8>;
+ qcom,bus-max = <10>;
};
- /* LOW SVS */
- qcom,gpu-pwrlevel@2 {
- reg = <2>;
- qcom,gpu-freq = <267000000>;
- qcom,bus-freq = <6>;
- qcom,bus-min = <4>;
+ /* SVS_L1 */
+ qcom,gpu-pwrlevel@4 {
+ reg = <4>;
+ qcom,gpu-freq = <430000000>;
+ qcom,bus-freq = <8>;
+ qcom,bus-min = <7>;
+ qcom,bus-max = <10>;
+ };
+
+ /* SVS */
+ qcom,gpu-pwrlevel@5 {
+ reg = <5>;
+ qcom,gpu-freq = <355000000>;
+ qcom,bus-freq = <7>;
+ qcom,bus-min = <5>;
qcom,bus-max = <8>;
};
+ /* LOW SVS */
+ qcom,gpu-pwrlevel@6 {
+ reg = <6>;
+ qcom,gpu-freq = <267000000>;
+ qcom,bus-freq = <6>;
+ qcom,bus-min = <4>;
+ qcom,bus-max = <7>;
+ };
+
/* MIN SVS */
- qcom,gpu-pwrlevel@3 {
- reg = <3>;
+ qcom,gpu-pwrlevel@7 {
+ reg = <7>;
qcom,gpu-freq = <180000000>;
qcom,bus-freq = <4>;
qcom,bus-min = <3>;
@@ -468,8 +504,8 @@
};
/* XO */
- qcom,gpu-pwrlevel@4 {
- reg = <4>;
+ qcom,gpu-pwrlevel@8 {
+ reg = <8>;
qcom,gpu-freq = <0>;
qcom,bus-freq = <0>;
qcom,bus-min = <0>;
diff --git a/arch/arm64/boot/dts/qcom/sdm670-smp2p.dtsi b/arch/arm64/boot/dts/qcom/sdm670-smp2p.dtsi
index f3e5ddb..b2601ee 100644
--- a/arch/arm64/boot/dts/qcom/sdm670-smp2p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670-smp2p.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -268,4 +268,16 @@
interrupt-controller;
#interrupt-cells = <2>;
};
+
+ /* wlan - inbound entry from mss/WLAN PD */
+ smp2pgpio_wlan_1_in: qcom,smp2pgpio-wlan-1-in {
+ compatible = "qcom,smp2pgpio";
+ qcom,entry-name = "wlan";
+ qcom,remote-pid = <1>;
+ qcom,is-inbound;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
};
diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi
index e576baf..e6bf8ee 100644
--- a/arch/arm64/boot/dts/qcom/sdm670.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi
@@ -1675,7 +1675,7 @@
};
};
- qcom,chd_sliver {
+ qcom,chd_silver {
compatible = "qcom,core-hang-detect";
label = "silver";
qcom,threshold-arr = <0x17e00058 0x17e10058 0x17e20058
@@ -2585,6 +2585,8 @@
qcom,vdd-3.3-ch0-config = <3000000 3312000>;
qcom,wlan-msa-memory = <0x100000>;
qcom,wlan-msa-fixed-region = <&wlan_msa_mem>;
+ qcom,gpio-force-fatal-error = <&smp2pgpio_wlan_1_in 0 0>;
+ qcom,gpio-early-crash-ind = <&smp2pgpio_wlan_1_in 1 0>;
qcom,smmu-s1-bypass;
};
@@ -2668,6 +2670,18 @@
< 1 >;
};
+ bus_proxy_client: qcom,bus_proxy_client {
+ compatible = "qcom,bus-proxy-client";
+ qcom,msm-bus,name = "bus-proxy-client";
+ qcom,msm-bus,num-cases = <2>;
+ qcom,msm-bus,num-paths = <2>;
+ qcom,msm-bus,vectors-KBps =
+ <22 512 0 0>, <23 512 0 0>,
+ <22 512 0 5000000>, <23 512 0 5000000>;
+ qcom,msm-bus,active-only;
+ status = "ok";
+ };
+
devfreq_memlat_0: qcom,cpu0-memlat-mon {
compatible = "qcom,arm-memlat-mon";
qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3 &CPU4 &CPU5>;
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index f158f07..a667b01 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -87,7 +87,7 @@
qcom,dump-size = <0xa000>;
};
L1_TLB_0: l1-tlb {
- qcom,dump-size = <0x3000>;
+ qcom,dump-size = <0x6000>;
};
};
@@ -118,7 +118,7 @@
qcom,dump-size = <0xa000>;
};
L1_TLB_100: l1-tlb {
- qcom,dump-size = <0x3000>;
+ qcom,dump-size = <0x6000>;
};
};
@@ -149,7 +149,7 @@
qcom,dump-size = <0xa000>;
};
L1_TLB_200: l1-tlb {
- qcom,dump-size = <0x3000>;
+ qcom,dump-size = <0x6000>;
};
};
@@ -180,7 +180,7 @@
qcom,dump-size = <0xa000>;
};
L1_TLB_300: l1-tlb {
- qcom,dump-size = <0x3000>;
+ qcom,dump-size = <0x6000>;
};
};
@@ -211,7 +211,7 @@
qcom,dump-size = <0x14000>;
};
L1_TLB_400: l1-tlb {
- qcom,dump-size = <0x3c00>;
+ qcom,dump-size = <0x6800>;
};
};
@@ -242,7 +242,7 @@
qcom,dump-size = <0x14000>;
};
L1_TLB_500: l1-tlb {
- qcom,dump-size = <0x3c00>;
+ qcom,dump-size = <0x6800>;
};
};
@@ -273,7 +273,7 @@
qcom,dump-size = <0x14000>;
};
L1_TLB_600: l1-tlb {
- qcom,dump-size = <0x3c00>;
+ qcom,dump-size = <0x6800>;
};
};
@@ -304,7 +304,7 @@
qcom,dump-size = <0x14000>;
};
L1_TLB_700: l1-tlb {
- qcom,dump-size = <0x3c00>;
+ qcom,dump-size = <0x6800>;
};
};
@@ -2045,35 +2045,35 @@
};
qcom,l1_tlb_dump0 {
qcom,dump-node = <&L1_TLB_0>;
- qcom,dump-id = <0x20>;
+ qcom,dump-id = <0x120>;
};
qcom,l1_tlb_dump100 {
qcom,dump-node = <&L1_TLB_100>;
- qcom,dump-id = <0x21>;
+ qcom,dump-id = <0x121>;
};
qcom,l1_tlb_dump200 {
qcom,dump-node = <&L1_TLB_200>;
- qcom,dump-id = <0x22>;
+ qcom,dump-id = <0x122>;
};
qcom,l1_tlb_dump300 {
qcom,dump-node = <&L1_TLB_300>;
- qcom,dump-id = <0x23>;
+ qcom,dump-id = <0x123>;
};
qcom,l1_tlb_dump400 {
qcom,dump-node = <&L1_TLB_400>;
- qcom,dump-id = <0x24>;
+ qcom,dump-id = <0x124>;
};
qcom,l1_tlb_dump500 {
qcom,dump-node = <&L1_TLB_500>;
- qcom,dump-id = <0x25>;
+ qcom,dump-id = <0x125>;
};
qcom,l1_tlb_dump600 {
qcom,dump-node = <&L1_TLB_600>;
- qcom,dump-id = <0x26>;
+ qcom,dump-id = <0x126>;
};
qcom,l1_tlb_dump700 {
qcom,dump-node = <&L1_TLB_700>;
- qcom,dump-id = <0x27>;
+ qcom,dump-id = <0x127>;
};
};
diff --git a/arch/arm64/configs/msm8953-perf_defconfig b/arch/arm64/configs/msm8953-perf_defconfig
index dce7015..00e4a86 100644
--- a/arch/arm64/configs/msm8953-perf_defconfig
+++ b/arch/arm64/configs/msm8953-perf_defconfig
@@ -517,6 +517,7 @@
CONFIG_MAILBOX=y
CONFIG_ARM_SMMU=y
CONFIG_QCOM_LAZY_MAPPING=y
+CONFIG_QCOM_RUN_QUEUE_STATS=y
CONFIG_MSM_SPM=y
CONFIG_MSM_L2_SPM=y
CONFIG_MSM_BOOT_STATS=y
@@ -545,9 +546,12 @@
CONFIG_QTI_RPM_STATS_LOG=y
CONFIG_QCOM_FORCE_WDOG_BITE_ON_PANIC=y
CONFIG_MEM_SHARE_QMI_SERVICE=y
+CONFIG_MSM_BAM_DMUX=y
CONFIG_WCNSS_CORE=y
CONFIG_WCNSS_CORE_PRONTO=y
CONFIG_WCNSS_REGISTER_DUMP_ON_BITE=y
+CONFIG_QCOM_BIMC_BWMON=y
+CONFIG_DEVFREQ_GOV_QCOM_BW_HWMON=y
CONFIG_QCOM_DEVFREQ_DEVBW=y
CONFIG_SPDM_SCM=y
CONFIG_DEVFREQ_SPDM=y
diff --git a/arch/arm64/configs/msm8953_defconfig b/arch/arm64/configs/msm8953_defconfig
index ce206c6..1ea739c 100644
--- a/arch/arm64/configs/msm8953_defconfig
+++ b/arch/arm64/configs/msm8953_defconfig
@@ -534,6 +534,7 @@
CONFIG_IOMMU_DEBUG=y
CONFIG_IOMMU_DEBUG_TRACKING=y
CONFIG_IOMMU_TESTS=y
+CONFIG_QCOM_RUN_QUEUE_STATS=y
CONFIG_MSM_SPM=y
CONFIG_MSM_L2_SPM=y
CONFIG_MSM_BOOT_STATS=y
@@ -566,9 +567,12 @@
CONFIG_QTI_RPM_STATS_LOG=y
CONFIG_QCOM_FORCE_WDOG_BITE_ON_PANIC=y
CONFIG_MEM_SHARE_QMI_SERVICE=y
+CONFIG_MSM_BAM_DMUX=y
CONFIG_WCNSS_CORE=y
CONFIG_WCNSS_CORE_PRONTO=y
CONFIG_WCNSS_REGISTER_DUMP_ON_BITE=y
+CONFIG_QCOM_BIMC_BWMON=y
+CONFIG_DEVFREQ_GOV_QCOM_BW_HWMON=y
CONFIG_QCOM_DEVFREQ_DEVBW=y
CONFIG_SPDM_SCM=y
CONFIG_DEVFREQ_SPDM=y
diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index c66fa93..63001be 100644
--- a/arch/arm64/mm/mmu.c
+++ b/arch/arm64/mm/mmu.c
@@ -823,6 +823,10 @@
int pud_set_huge(pud_t *pud, phys_addr_t phys, pgprot_t prot)
{
+ /* ioremap_page_range doesn't honour BBM */
+ if (pud_present(READ_ONCE(*pud)))
+ return 0;
+
BUG_ON(phys & ~PUD_MASK);
set_pud(pud, __pud(phys | PUD_TYPE_SECT | pgprot_val(mk_sect_prot(prot))));
return 1;
@@ -830,6 +834,10 @@
int pmd_set_huge(pmd_t *pmd, phys_addr_t phys, pgprot_t prot)
{
+ /* ioremap_page_range doesn't honour BBM */
+ if (pmd_present(READ_ONCE(*pmd)))
+ return 0;
+
BUG_ON(phys & ~PMD_MASK);
set_pmd(pmd, __pmd(phys | PMD_TYPE_SECT | pgprot_val(mk_sect_prot(prot))));
return 1;
diff --git a/block/blk-cgroup.c b/block/blk-cgroup.c
index 8ba0af7..d673a69 100644
--- a/block/blk-cgroup.c
+++ b/block/blk-cgroup.c
@@ -184,7 +184,7 @@
goto err_free_blkg;
}
- wb_congested = wb_congested_get_create(&q->backing_dev_info,
+ wb_congested = wb_congested_get_create(q->backing_dev_info,
blkcg->css.id,
GFP_NOWAIT | __GFP_NOWARN);
if (!wb_congested) {
@@ -469,8 +469,8 @@
const char *blkg_dev_name(struct blkcg_gq *blkg)
{
/* some drivers (floppy) instantiate a queue w/o disk registered */
- if (blkg->q->backing_dev_info.dev)
- return dev_name(blkg->q->backing_dev_info.dev);
+ if (blkg->q->backing_dev_info->dev)
+ return dev_name(blkg->q->backing_dev_info->dev);
return NULL;
}
EXPORT_SYMBOL_GPL(blkg_dev_name);
diff --git a/block/blk-core.c b/block/blk-core.c
index 37b814a..3bf59cd 100644
--- a/block/blk-core.c
+++ b/block/blk-core.c
@@ -75,7 +75,7 @@
* flip its congestion state for events on other blkcgs.
*/
if (rl == &rl->q->root_rl)
- clear_wb_congested(rl->q->backing_dev_info.wb.congested, sync);
+ clear_wb_congested(rl->q->backing_dev_info->wb.congested, sync);
#endif
}
@@ -86,7 +86,7 @@
#else
/* see blk_clear_congested() */
if (rl == &rl->q->root_rl)
- set_wb_congested(rl->q->backing_dev_info.wb.congested, sync);
+ set_wb_congested(rl->q->backing_dev_info->wb.congested, sync);
#endif
}
@@ -105,22 +105,6 @@
q->nr_congestion_off = nr;
}
-/**
- * blk_get_backing_dev_info - get the address of a queue's backing_dev_info
- * @bdev: device
- *
- * Locates the passed device's request queue and returns the address of its
- * backing_dev_info. This function can only be called if @bdev is opened
- * and the return value is never NULL.
- */
-struct backing_dev_info *blk_get_backing_dev_info(struct block_device *bdev)
-{
- struct request_queue *q = bdev_get_queue(bdev);
-
- return &q->backing_dev_info;
-}
-EXPORT_SYMBOL(blk_get_backing_dev_info);
-
void blk_rq_init(struct request_queue *q, struct request *rq)
{
memset(rq, 0, sizeof(*rq));
@@ -586,7 +570,7 @@
blk_flush_integrity();
/* @q won't process any more request, flush async actions */
- del_timer_sync(&q->backing_dev_info.laptop_mode_wb_timer);
+ del_timer_sync(&q->backing_dev_info->laptop_mode_wb_timer);
blk_sync_queue(q);
if (q->mq_ops)
@@ -598,8 +582,6 @@
q->queue_lock = &q->__queue_lock;
spin_unlock_irq(lock);
- bdi_unregister(&q->backing_dev_info);
-
/* @q is and will stay empty, shutdown and put */
blk_put_queue(q);
}
@@ -695,7 +677,6 @@
struct request_queue *blk_alloc_queue_node(gfp_t gfp_mask, int node_id)
{
struct request_queue *q;
- int err;
q = kmem_cache_alloc_node(blk_requestq_cachep,
gfp_mask | __GFP_ZERO, node_id);
@@ -710,17 +691,17 @@
if (!q->bio_split)
goto fail_id;
- q->backing_dev_info.ra_pages =
- (VM_MAX_READAHEAD * 1024) / PAGE_SIZE;
- q->backing_dev_info.capabilities = BDI_CAP_CGROUP_WRITEBACK;
- q->backing_dev_info.name = "block";
- q->node = node_id;
-
- err = bdi_init(&q->backing_dev_info);
- if (err)
+ q->backing_dev_info = bdi_alloc_node(gfp_mask, node_id);
+ if (!q->backing_dev_info)
goto fail_split;
- setup_timer(&q->backing_dev_info.laptop_mode_wb_timer,
+ q->backing_dev_info->ra_pages =
+ (VM_MAX_READAHEAD * 1024) / PAGE_SIZE;
+ q->backing_dev_info->capabilities = BDI_CAP_CGROUP_WRITEBACK;
+ q->backing_dev_info->name = "block";
+ q->node = node_id;
+
+ setup_timer(&q->backing_dev_info->laptop_mode_wb_timer,
laptop_mode_timer_fn, (unsigned long) q);
setup_timer(&q->timeout, blk_rq_timed_out_timer, (unsigned long) q);
INIT_WORK(&q->timeout_work, NULL);
@@ -771,7 +752,7 @@
fail_ref:
percpu_ref_exit(&q->q_usage_counter);
fail_bdi:
- bdi_destroy(&q->backing_dev_info);
+ bdi_put(q->backing_dev_info);
fail_split:
bioset_free(q->bio_split);
fail_id:
@@ -1197,7 +1178,7 @@
* disturb iosched and blkcg but weird is bettern than dead.
*/
printk_ratelimited(KERN_WARNING "%s: dev %s: request aux data allocation failed, iosched may be disturbed\n",
- __func__, dev_name(q->backing_dev_info.dev));
+ __func__, dev_name(q->backing_dev_info->dev));
rq->cmd_flags &= ~REQ_ELVPRIV;
rq->elv.icq = NULL;
@@ -2739,7 +2720,7 @@
BUG_ON(blk_queued_rq(req));
if (unlikely(laptop_mode) && req->cmd_type == REQ_TYPE_FS)
- laptop_io_completion(&req->q->backing_dev_info);
+ laptop_io_completion(req->q->backing_dev_info);
blk_delete_timer(req);
diff --git a/block/blk-integrity.c b/block/blk-integrity.c
index 478f572..e4ebd79 100644
--- a/block/blk-integrity.c
+++ b/block/blk-integrity.c
@@ -418,7 +418,7 @@
bi->tuple_size = template->tuple_size;
bi->tag_size = template->tag_size;
- disk->queue->backing_dev_info.capabilities |= BDI_CAP_STABLE_WRITES;
+ disk->queue->backing_dev_info->capabilities |= BDI_CAP_STABLE_WRITES;
}
EXPORT_SYMBOL(blk_integrity_register);
@@ -431,7 +431,7 @@
*/
void blk_integrity_unregister(struct gendisk *disk)
{
- disk->queue->backing_dev_info.capabilities &= ~BDI_CAP_STABLE_WRITES;
+ disk->queue->backing_dev_info->capabilities &= ~BDI_CAP_STABLE_WRITES;
memset(&disk->queue->integrity, 0, sizeof(struct blk_integrity));
}
EXPORT_SYMBOL(blk_integrity_unregister);
diff --git a/block/blk-sysfs.c b/block/blk-sysfs.c
index 9cc8d7c..07c75d0 100644
--- a/block/blk-sysfs.c
+++ b/block/blk-sysfs.c
@@ -75,7 +75,7 @@
static ssize_t queue_ra_show(struct request_queue *q, char *page)
{
- unsigned long ra_kb = q->backing_dev_info.ra_pages <<
+ unsigned long ra_kb = q->backing_dev_info->ra_pages <<
(PAGE_SHIFT - 10);
return queue_var_show(ra_kb, (page));
@@ -90,7 +90,7 @@
if (ret < 0)
return ret;
- q->backing_dev_info.ra_pages = ra_kb >> (PAGE_SHIFT - 10);
+ q->backing_dev_info->ra_pages = ra_kb >> (PAGE_SHIFT - 10);
return ret;
}
@@ -627,7 +627,7 @@
struct request_queue *q =
container_of(kobj, struct request_queue, kobj);
- bdi_exit(&q->backing_dev_info);
+ bdi_put(q->backing_dev_info);
blkcg_exit_queue(q);
if (q->elevator) {
diff --git a/block/compat_ioctl.c b/block/compat_ioctl.c
index 556826a..570021a 100644
--- a/block/compat_ioctl.c
+++ b/block/compat_ioctl.c
@@ -661,7 +661,6 @@
struct block_device *bdev = inode->i_bdev;
struct gendisk *disk = bdev->bd_disk;
fmode_t mode = file->f_mode;
- struct backing_dev_info *bdi;
loff_t size;
unsigned int max_sectors;
@@ -708,9 +707,8 @@
case BLKFRAGET:
if (!arg)
return -EINVAL;
- bdi = blk_get_backing_dev_info(bdev);
return compat_put_long(arg,
- (bdi->ra_pages * PAGE_SIZE) / 512);
+ (bdev->bd_bdi->ra_pages * PAGE_SIZE) / 512);
case BLKROGET: /* compatible */
return compat_put_int(arg, bdev_read_only(bdev) != 0);
case BLKBSZGET_32: /* get the logical block size (cf. BLKSSZGET) */
@@ -728,8 +726,7 @@
case BLKFRASET:
if (!capable(CAP_SYS_ADMIN))
return -EACCES;
- bdi = blk_get_backing_dev_info(bdev);
- bdi->ra_pages = (arg * 512) / PAGE_SIZE;
+ bdev->bd_bdi->ra_pages = (arg * 512) / PAGE_SIZE;
return 0;
case BLKGETSIZE:
size = i_size_read(bdev->bd_inode);
diff --git a/block/genhd.c b/block/genhd.c
index c6eb25d..6ad0fd0 100644
--- a/block/genhd.c
+++ b/block/genhd.c
@@ -613,7 +613,7 @@
disk_alloc_events(disk);
/* Register BDI before referencing it from bdev */
- bdi = &disk->queue->backing_dev_info;
+ bdi = disk->queue->backing_dev_info;
bdi_register_owner(bdi, disk_to_dev(disk));
blk_register_region(disk_devt(disk), disk->minors, NULL,
@@ -649,16 +649,27 @@
DISK_PITER_INCL_EMPTY | DISK_PITER_REVERSE);
while ((part = disk_part_iter_next(&piter))) {
invalidate_partition(disk, part->partno);
+ bdev_unhash_inode(part_devt(part));
delete_partition(disk, part->partno);
}
disk_part_iter_exit(&piter);
invalidate_partition(disk, 0);
+ bdev_unhash_inode(disk_devt(disk));
set_capacity(disk, 0);
disk->flags &= ~GENHD_FL_UP;
sysfs_remove_link(&disk_to_dev(disk)->kobj, "bdi");
- blk_unregister_queue(disk);
+ if (disk->queue) {
+ /*
+ * Unregister bdi before releasing device numbers (as they can
+ * get reused and we'd get clashes in sysfs).
+ */
+ bdi_unregister(disk->queue->backing_dev_info);
+ blk_unregister_queue(disk);
+ } else {
+ WARN_ON(1);
+ }
blk_unregister_region(disk_devt(disk), disk->minors);
part_stat_set_all(&disk->part0, 0);
@@ -1358,7 +1369,7 @@
owner = disk->fops->owner;
if (owner && !try_module_get(owner))
return NULL;
- kobj = kobject_get(&disk_to_dev(disk)->kobj);
+ kobj = kobject_get_unless_zero(&disk_to_dev(disk)->kobj);
if (kobj == NULL) {
module_put(owner);
return NULL;
diff --git a/block/ioctl.c b/block/ioctl.c
index 755119c..c4555b1 100644
--- a/block/ioctl.c
+++ b/block/ioctl.c
@@ -502,7 +502,6 @@
int blkdev_ioctl(struct block_device *bdev, fmode_t mode, unsigned cmd,
unsigned long arg)
{
- struct backing_dev_info *bdi;
void __user *argp = (void __user *)arg;
loff_t size;
unsigned int max_sectors;
@@ -525,8 +524,7 @@
case BLKFRAGET:
if (!arg)
return -EINVAL;
- bdi = blk_get_backing_dev_info(bdev);
- return put_long(arg, (bdi->ra_pages * PAGE_SIZE) / 512);
+ return put_long(arg, (bdev->bd_bdi->ra_pages*PAGE_SIZE) / 512);
case BLKROGET:
return put_int(arg, bdev_read_only(bdev) != 0);
case BLKBSZGET: /* get block device soft block size (cf. BLKSSZGET) */
@@ -553,8 +551,7 @@
case BLKFRASET:
if(!capable(CAP_SYS_ADMIN))
return -EACCES;
- bdi = blk_get_backing_dev_info(bdev);
- bdi->ra_pages = (arg * 512) / PAGE_SIZE;
+ bdev->bd_bdi->ra_pages = (arg * 512) / PAGE_SIZE;
return 0;
case BLKBSZSET:
return blkdev_bszset(bdev, mode, argp);
diff --git a/drivers/base/Kconfig b/drivers/base/Kconfig
index 0651010..0335e23 100644
--- a/drivers/base/Kconfig
+++ b/drivers/base/Kconfig
@@ -165,6 +165,11 @@
If you are unsure about this, say N here.
+config FW_CACHE
+ bool "Enable firmware caching during suspend"
+ depends on PM_SLEEP
+ default n
+
config WANT_DEV_COREDUMP
bool
help
diff --git a/drivers/base/firmware_class.c b/drivers/base/firmware_class.c
index 914433f..813a191 100644
--- a/drivers/base/firmware_class.c
+++ b/drivers/base/firmware_class.c
@@ -994,7 +994,7 @@
return _request_firmware_load(fw_priv, opt_flags, timeout);
}
-#ifdef CONFIG_PM_SLEEP
+#ifdef CONFIG_FW_CACHE
/* kill pending requests without uevent to avoid blocking suspend */
static void kill_requests_without_uevent(void)
{
@@ -1395,7 +1395,7 @@
}
EXPORT_SYMBOL(request_firmware_nowait);
-#ifdef CONFIG_PM_SLEEP
+#ifdef CONFIG_FW_CACHE
static ASYNC_DOMAIN_EXCLUSIVE(fw_cache_domain);
/**
@@ -1741,7 +1741,7 @@
INIT_LIST_HEAD(&fw_cache.head);
fw_cache.state = FW_LOADER_NO_CACHE;
-#ifdef CONFIG_PM_SLEEP
+#ifdef CONFIG_FW_CACHE
spin_lock_init(&fw_cache.name_lock);
INIT_LIST_HEAD(&fw_cache.fw_names);
@@ -1768,7 +1768,7 @@
static void __exit firmware_class_exit(void)
{
-#ifdef CONFIG_PM_SLEEP
+#ifdef CONFIG_FW_CACHE
unregister_syscore_ops(&fw_syscore_ops);
unregister_pm_notifier(&fw_cache.pm_notify);
#endif
diff --git a/drivers/block/aoe/aoeblk.c b/drivers/block/aoe/aoeblk.c
index ec9d861..027b876 100644
--- a/drivers/block/aoe/aoeblk.c
+++ b/drivers/block/aoe/aoeblk.c
@@ -396,8 +396,8 @@
WARN_ON(d->gd);
WARN_ON(d->flags & DEVFL_UP);
blk_queue_max_hw_sectors(q, BLK_DEF_MAX_SECTORS);
- q->backing_dev_info.name = "aoe";
- q->backing_dev_info.ra_pages = READ_AHEAD / PAGE_SIZE;
+ q->backing_dev_info->name = "aoe";
+ q->backing_dev_info->ra_pages = READ_AHEAD / PAGE_SIZE;
d->bufpool = mp;
d->blkq = gd->queue = q;
q->queuedata = d;
diff --git a/drivers/block/drbd/drbd_main.c b/drivers/block/drbd/drbd_main.c
index 8348272..d305f05 100644
--- a/drivers/block/drbd/drbd_main.c
+++ b/drivers/block/drbd/drbd_main.c
@@ -2462,7 +2462,7 @@
if (get_ldev(device)) {
q = bdev_get_queue(device->ldev->backing_bdev);
- r = bdi_congested(&q->backing_dev_info, bdi_bits);
+ r = bdi_congested(q->backing_dev_info, bdi_bits);
put_ldev(device);
if (r)
reason = 'b';
@@ -2834,8 +2834,8 @@
/* we have no partitions. we contain only ourselves. */
device->this_bdev->bd_contains = device->this_bdev;
- q->backing_dev_info.congested_fn = drbd_congested;
- q->backing_dev_info.congested_data = device;
+ q->backing_dev_info->congested_fn = drbd_congested;
+ q->backing_dev_info->congested_data = device;
blk_queue_make_request(q, drbd_make_request);
blk_queue_write_cache(q, true, true);
diff --git a/drivers/block/drbd/drbd_nl.c b/drivers/block/drbd/drbd_nl.c
index f35db29..908c704 100644
--- a/drivers/block/drbd/drbd_nl.c
+++ b/drivers/block/drbd/drbd_nl.c
@@ -1328,11 +1328,13 @@
if (b) {
blk_queue_stack_limits(q, b);
- if (q->backing_dev_info.ra_pages != b->backing_dev_info.ra_pages) {
+ if (q->backing_dev_info->ra_pages !=
+ b->backing_dev_info->ra_pages) {
drbd_info(device, "Adjusting my ra_pages to backing device's (%lu -> %lu)\n",
- q->backing_dev_info.ra_pages,
- b->backing_dev_info.ra_pages);
- q->backing_dev_info.ra_pages = b->backing_dev_info.ra_pages;
+ q->backing_dev_info->ra_pages,
+ b->backing_dev_info->ra_pages);
+ q->backing_dev_info->ra_pages =
+ b->backing_dev_info->ra_pages;
}
}
fixup_discard_if_not_supported(q);
@@ -3345,7 +3347,7 @@
s->dev_disk_flags = md->flags;
q = bdev_get_queue(device->ldev->backing_bdev);
s->dev_lower_blocked =
- bdi_congested(&q->backing_dev_info,
+ bdi_congested(q->backing_dev_info,
(1 << WB_async_congested) |
(1 << WB_sync_congested));
put_ldev(device);
diff --git a/drivers/block/drbd/drbd_proc.c b/drivers/block/drbd/drbd_proc.c
index be2b93f..8378142 100644
--- a/drivers/block/drbd/drbd_proc.c
+++ b/drivers/block/drbd/drbd_proc.c
@@ -288,7 +288,7 @@
seq_printf(seq, "%2d: cs:Unconfigured\n", i);
} else {
/* reset device->congestion_reason */
- bdi_rw_congested(&device->rq_queue->backing_dev_info);
+ bdi_rw_congested(device->rq_queue->backing_dev_info);
nc = rcu_dereference(first_peer_device(device)->connection->net_conf);
wp = nc ? nc->wire_protocol - DRBD_PROT_A + 'A' : ' ';
diff --git a/drivers/block/drbd/drbd_req.c b/drivers/block/drbd/drbd_req.c
index de279fe..cb6bdb7 100644
--- a/drivers/block/drbd/drbd_req.c
+++ b/drivers/block/drbd/drbd_req.c
@@ -938,7 +938,7 @@
switch (rbm) {
case RB_CONGESTED_REMOTE:
- bdi = &device->ldev->backing_bdev->bd_disk->queue->backing_dev_info;
+ bdi = device->ldev->backing_bdev->bd_disk->queue->backing_dev_info;
return bdi_read_congested(bdi);
case RB_LEAST_PENDING:
return atomic_read(&device->local_cnt) >
diff --git a/drivers/block/pktcdvd.c b/drivers/block/pktcdvd.c
index 90fa4ac..b0d2cb7 100644
--- a/drivers/block/pktcdvd.c
+++ b/drivers/block/pktcdvd.c
@@ -1276,7 +1276,7 @@
&& pd->bio_queue_size <= pd->write_congestion_off);
spin_unlock(&pd->lock);
if (wakeup) {
- clear_bdi_congested(&pd->disk->queue->backing_dev_info,
+ clear_bdi_congested(pd->disk->queue->backing_dev_info,
BLK_RW_ASYNC);
}
@@ -2405,7 +2405,7 @@
spin_lock(&pd->lock);
if (pd->write_congestion_on > 0
&& pd->bio_queue_size >= pd->write_congestion_on) {
- set_bdi_congested(&q->backing_dev_info, BLK_RW_ASYNC);
+ set_bdi_congested(q->backing_dev_info, BLK_RW_ASYNC);
do {
spin_unlock(&pd->lock);
congestion_wait(BLK_RW_ASYNC, HZ);
diff --git a/drivers/block/rbd.c b/drivers/block/rbd.c
index e32badd..2622e14 100644
--- a/drivers/block/rbd.c
+++ b/drivers/block/rbd.c
@@ -4524,7 +4524,7 @@
q->limits.discard_zeroes_data = 1;
if (!ceph_test_opt(rbd_dev->rbd_client->client, NOCRC))
- q->backing_dev_info.capabilities |= BDI_CAP_STABLE_WRITES;
+ q->backing_dev_info->capabilities |= BDI_CAP_STABLE_WRITES;
disk->queue = q;
diff --git a/drivers/block/zram/zram_drv.c b/drivers/block/zram/zram_drv.c
index ed9de1b..58f7c39 100644
--- a/drivers/block/zram/zram_drv.c
+++ b/drivers/block/zram/zram_drv.c
@@ -122,7 +122,7 @@
{
revalidate_disk(zram->disk);
/* revalidate_disk reset the BDI_CAP_STABLE_WRITES so set again */
- zram->disk->queue->backing_dev_info.capabilities |=
+ zram->disk->queue->backing_dev_info->capabilities |=
BDI_CAP_STABLE_WRITES;
}
diff --git a/drivers/char/adsprpc.c b/drivers/char/adsprpc.c
index a6cabf7..49f8779 100644
--- a/drivers/char/adsprpc.c
+++ b/drivers/char/adsprpc.c
@@ -72,6 +72,8 @@
#define M_CRCLIST (64)
#define SESSION_ID_INDEX (30)
#define FASTRPC_CTX_MAGIC (0xbeeddeed)
+#define FASTRPC_CTX_MAX (256)
+#define FASTRPC_CTXID_MASK (0xFF0)
#define IS_CACHE_ALIGNED(x) (((x) & ((L1_CACHE_BYTES)-1)) == 0)
@@ -210,6 +212,7 @@
unsigned int magic;
unsigned int *attrs;
uint32_t *crc;
+ uint64_t ctxid;
};
struct fastrpc_ctx_lst {
@@ -292,6 +295,8 @@
unsigned int latency;
bool glink;
bool legacy;
+ spinlock_t ctxlock;
+ struct smq_invoke_ctx *ctxtable[FASTRPC_CTX_MAX];
};
struct fastrpc_mmap {
@@ -1038,7 +1043,7 @@
struct smq_invoke_ctx **po)
{
struct fastrpc_apps *me = &gfa;
- int err = 0, bufs, size = 0;
+ int err = 0, bufs, ii, size = 0;
struct smq_invoke_ctx *ctx = NULL;
struct fastrpc_ctx_lst *clst = &fl->clst;
struct fastrpc_ioctl_invoke *invoke = &invokefd->inv;
@@ -1103,6 +1108,21 @@
hlist_add_head(&ctx->hn, &clst->pending);
spin_unlock(&fl->hlock);
+ spin_lock(&me->ctxlock);
+ for (ii = 0; ii < FASTRPC_CTX_MAX; ii++) {
+ if (!me->ctxtable[ii]) {
+ me->ctxtable[ii] = ctx;
+ ctx->ctxid = (ptr_to_uint64(ctx) & ~0xFFF)|(ii << 4);
+ break;
+ }
+ }
+ spin_unlock(&me->ctxlock);
+ VERIFY(err, ii < FASTRPC_CTX_MAX);
+ if (err) {
+ pr_err("adsprpc: out of context memory\n");
+ goto bail;
+ }
+
*po = ctx;
bail:
if (ctx && err)
@@ -1125,6 +1145,7 @@
static void context_free(struct smq_invoke_ctx *ctx)
{
int i;
+ struct fastrpc_apps *me = &gfa;
int nbufs = REMOTE_SCALARS_INBUFS(ctx->sc) +
REMOTE_SCALARS_OUTBUFS(ctx->sc);
spin_lock(&ctx->fl->hlock);
@@ -1137,6 +1158,17 @@
mutex_unlock(&ctx->fl->fl_map_mutex);
fastrpc_buf_free(ctx->buf, 1);
ctx->magic = 0;
+ ctx->ctxid = 0;
+
+ spin_lock(&me->ctxlock);
+ for (i = 0; i < FASTRPC_CTX_MAX; i++) {
+ if (me->ctxtable[i] == ctx) {
+ me->ctxtable[i] = NULL;
+ break;
+ }
+ }
+ spin_unlock(&me->ctxlock);
+
kfree(ctx);
}
@@ -1643,7 +1675,7 @@
msg->tid |= (1 << SESSION_ID_INDEX);
if (kernel)
msg->pid = 0;
- msg->invoke.header.ctx = ptr_to_uint64(ctx) | fl->pd;
+ msg->invoke.header.ctx = ctx->ctxid | fl->pd;
msg->invoke.header.handle = handle;
msg->invoke.header.sc = ctx->sc;
msg->invoke.page.addr = ctx->buf ? ctx->buf->phys : 0;
@@ -1676,19 +1708,30 @@
{
struct fastrpc_apps *me = &gfa;
struct smq_invoke_rsp rsp = {0};
- struct smq_invoke_ctx *ctx;
int ret = 0, err = 0;
+ uint32_t index;
do {
ret = smd_read_from_cb(me->channel[cid].chan, &rsp,
sizeof(rsp));
if (ret != sizeof(rsp))
break;
- ctx = (struct smq_invoke_ctx *)(uint64_to_ptr(rsp.ctx & ~1));
- VERIFY(err, (ctx && ctx->magic == FASTRPC_CTX_MAGIC));
+
+ index = (uint32_t)((rsp.ctx & FASTRPC_CTXID_MASK) >> 4);
+ VERIFY(err, index < FASTRPC_CTX_MAX);
if (err)
goto bail;
- context_notify_user(uint64_to_ptr(rsp.ctx & ~1), rsp.retval);
+
+ VERIFY(err, !IS_ERR_OR_NULL(me->ctxtable[index]));
+ if (err)
+ goto bail;
+
+ VERIFY(err, ((me->ctxtable[index]->ctxid == (rsp.ctx & ~1)) &&
+ me->ctxtable[index]->magic == FASTRPC_CTX_MAGIC));
+ if (err)
+ goto bail;
+
+ context_notify_user(me->ctxtable[index], rsp.retval);
} while (ret == sizeof(rsp));
bail:
if (err)
@@ -1722,6 +1765,7 @@
INIT_HLIST_HEAD(&me->drivers);
INIT_HLIST_HEAD(&me->maps);
spin_lock_init(&me->hlock);
+ spin_lock_init(&me->ctxlock);
mutex_init(&me->smd_mutex);
me->channel = &gcinfo[0];
for (i = 0; i < NUM_CHANNELS; i++) {
@@ -2510,19 +2554,29 @@
const void *pkt_priv, const void *ptr, size_t size)
{
struct smq_invoke_rsp *rsp = (struct smq_invoke_rsp *)ptr;
- struct smq_invoke_ctx *ctx;
+ struct fastrpc_apps *me = &gfa;
+ uint32_t index;
int err = 0;
VERIFY(err, (rsp && size >= sizeof(*rsp)));
if (err)
goto bail;
- ctx = (struct smq_invoke_ctx *)(uint64_to_ptr(rsp->ctx & ~1));
- VERIFY(err, (ctx && ctx->magic == FASTRPC_CTX_MAGIC));
+ index = (uint32_t)((rsp->ctx & FASTRPC_CTXID_MASK) >> 4);
+ VERIFY(err, index < FASTRPC_CTX_MAX);
if (err)
goto bail;
- context_notify_user(ctx, rsp->retval);
+ VERIFY(err, !IS_ERR_OR_NULL(me->ctxtable[index]));
+ if (err)
+ goto bail;
+
+ VERIFY(err, ((me->ctxtable[index]->ctxid == (rsp->ctx & ~1)) &&
+ me->ctxtable[index]->magic == FASTRPC_CTX_MAGIC));
+ if (err)
+ goto bail;
+
+ context_notify_user(me->ctxtable[index], rsp->retval);
bail:
if (err)
pr_err("adsprpc: invalid response or context\n");
diff --git a/drivers/clk/msm/clock-alpha-pll.c b/drivers/clk/msm/clock-alpha-pll.c
index dbe8d8e..37e34d5 100644
--- a/drivers/clk/msm/clock-alpha-pll.c
+++ b/drivers/clk/msm/clock-alpha-pll.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -774,6 +774,13 @@
writel_relaxed(regval, USER_CTL_HI_REG(pll));
}
+ if (masks->cal_l_val_mask && pll->cal_l_val) {
+ regval = readl_relaxed(USER_CTL_HI_REG(pll));
+ regval &= ~masks->cal_l_val_mask;
+ regval |= pll->cal_l_val;
+ writel_relaxed(regval, USER_CTL_HI_REG(pll));
+ }
+
if (masks->test_ctl_lo_mask) {
regval = readl_relaxed(TEST_CTL_LO_REG(pll));
regval &= ~masks->test_ctl_lo_mask;
diff --git a/drivers/clk/qcom/clk-cpu-osm.c b/drivers/clk/qcom/clk-cpu-osm.c
index bf4df55..f53d1ee 100644
--- a/drivers/clk/qcom/clk-cpu-osm.c
+++ b/drivers/clk/qcom/clk-cpu-osm.c
@@ -432,6 +432,7 @@
static DEFINE_CLK_VOTER(l3_cluster0_vote_clk, l3_clk, 0);
static DEFINE_CLK_VOTER(l3_cluster1_vote_clk, l3_clk, 0);
static DEFINE_CLK_VOTER(l3_misc_vote_clk, l3_clk, 0);
+static DEFINE_CLK_VOTER(l3_gpu_vote_clk, l3_clk, 0);
static struct clk_osm pwrcl_clk = {
.cluster_num = 1,
@@ -581,6 +582,7 @@
[L3_CLUSTER0_VOTE_CLK] = &l3_cluster0_vote_clk.hw,
[L3_CLUSTER1_VOTE_CLK] = &l3_cluster1_vote_clk.hw,
[L3_MISC_VOTE_CLK] = &l3_misc_vote_clk.hw,
+ [L3_GPU_VOTE_CLK] = &l3_gpu_vote_clk.hw,
[PWRCL_CLK] = &pwrcl_clk.hw,
[CPU0_PWRCL_CLK] = &cpu0_pwrcl_clk.hw,
[CPU1_PWRCL_CLK] = &cpu1_pwrcl_clk.hw,
@@ -1345,6 +1347,8 @@
"clk: Failed to enable cluster1 clock for L3\n");
WARN(clk_prepare_enable(l3_misc_vote_clk.hw.clk),
"clk: Failed to enable misc clock for L3\n");
+ WARN(clk_prepare_enable(l3_gpu_vote_clk.hw.clk),
+ "clk: Failed to enable iocoherent bwmon clock for L3\n");
/*
* Call clk_prepare_enable for the silver clock explicitly in order to
diff --git a/drivers/cpuidle/lpm-levels.c b/drivers/cpuidle/lpm-levels.c
index 4615122..786ba01 100644
--- a/drivers/cpuidle/lpm-levels.c
+++ b/drivers/cpuidle/lpm-levels.c
@@ -1371,11 +1371,6 @@
const struct cpumask *cpumask = get_cpu_mask(dev->cpu);
ktime_t start = ktime_get();
uint64_t start_time = ktime_to_ns(start), end_time;
- struct power_params *pwr_params;
-
- pwr_params = &cpu->levels[idx].pwr;
- sched_set_cpu_cstate(dev->cpu, idx + 1,
- pwr_params->energy_overhead, pwr_params->latency_us);
cpu_prepare(cpu, idx, true);
cluster_prepare(cpu->parent, cpumask, idx, true, start_time);
@@ -1394,7 +1389,6 @@
cluster_unprepare(cpu->parent, cpumask, idx, true, end_time);
cpu_unprepare(cpu, idx, true);
- sched_set_cpu_cstate(smp_processor_id(), 0, 0, 0);
dev->last_residency = ktime_us_delta(ktime_get(), start);
update_history(dev, idx);
trace_cpu_idle_exit(idx, success);
@@ -1748,7 +1742,7 @@
int cpu;
for_each_possible_cpu(cpu) {
- rc = arm_cpuidle_init(smp_processor_id());
+ rc = arm_cpuidle_init(cpu);
if (rc) {
pr_err("CPU%d ARM CPUidle init failed (%d)\n", cpu, rc);
return rc;
diff --git a/drivers/devfreq/devfreq_spdm_debugfs.c b/drivers/devfreq/devfreq_spdm_debugfs.c
index 4e49d5b..d39ff73 100644
--- a/drivers/devfreq/devfreq_spdm_debugfs.c
+++ b/drivers/devfreq/devfreq_spdm_debugfs.c
@@ -34,7 +34,7 @@
int i;
int next_idx;
- if (size > sizeof(buf))
+ if (size > sizeof(buf) - 1)
return -EINVAL;
if (copy_from_user(buf, data, size)) {
@@ -42,6 +42,8 @@
size = -EINVAL;
}
+ buf[size] = '\0';
+
if (sscanf(buf, "%u\n", &i) != 1) {
size = -EINVAL;
goto err;
@@ -105,7 +107,7 @@
int ext_status = 0;
int i;
- if (size > sizeof(buf))
+ if (size > sizeof(buf) - 1)
return -EINVAL;
if (copy_from_user(buf, data, size)) {
@@ -113,6 +115,8 @@
goto out;
}
+ buf[size] = '\0';
+
if (sscanf(buf, "%u %u\n", &spdm_data->config_data.pl_freqs[0],
&spdm_data->config_data.pl_freqs[1]) != 2) {
size = -EINVAL;
@@ -164,7 +168,7 @@
struct spdm_args desc = { { 0 } };
int ext_status = 0;
- if (size > sizeof(buf))
+ if (size > sizeof(buf) - 1)
return -EINVAL;
if (copy_from_user(buf, data, size)) {
@@ -172,6 +176,8 @@
goto out;
}
+ buf[size] = '\0';
+
if (sscanf(buf, "%u %u\n", &spdm_data->config_data.reject_rate[0],
&spdm_data->config_data.reject_rate[1]) != 2) {
size = -EINVAL;
@@ -224,13 +230,16 @@
struct spdm_args desc = { { 0 } };
int ext_status = 0;
- if (size > sizeof(buf))
+ if (size > sizeof(buf) - 1)
return -EINVAL;
if (copy_from_user(buf, data, size)) {
size = -EINVAL;
goto out;
}
+
+ buf[size] = '\0';
+
if (sscanf(buf, "%u %u\n", &spdm_data->config_data.reject_rate[2],
&spdm_data->config_data.reject_rate[3]) != 2) {
size = -EINVAL;
@@ -282,13 +291,16 @@
struct spdm_args desc = { { 0 } };
int ext_status = 0;
- if (size > sizeof(buf))
+ if (size > sizeof(buf) - 1)
return -EINVAL;
if (copy_from_user(buf, data, size)) {
size = -EINVAL;
goto out;
}
+
+ buf[size] = '\0';
+
if (sscanf(buf, "%u %u\n", &spdm_data->config_data.reject_rate[4],
&spdm_data->config_data.reject_rate[5]) != 2) {
size = -EINVAL;
@@ -340,13 +352,16 @@
struct spdm_args desc = { { 0 } };
int ext_status = 0;
- if (size > sizeof(buf))
+ if (size > sizeof(buf) - 1)
return -EINVAL;
if (copy_from_user(buf, data, size)) {
size = -EINVAL;
goto out;
}
+
+ buf[size] = '\0';
+
if (sscanf(buf, "%u %u\n", &spdm_data->config_data.response_time_us[0],
&spdm_data->config_data.response_time_us[1]) != 2) {
size = -EINVAL;
@@ -398,13 +413,16 @@
struct spdm_args desc = { { 0 } };
int ext_status = 0;
- if (size > sizeof(buf))
+ if (size > sizeof(buf) - 1)
return -EINVAL;
if (copy_from_user(buf, data, size)) {
size = -EINVAL;
goto out;
}
+
+ buf[size] = '\0';
+
if (sscanf(buf, "%u %u\n", &spdm_data->config_data.response_time_us[2],
&spdm_data->config_data.response_time_us[3]) != 2) {
size = -EINVAL;
@@ -456,13 +474,16 @@
struct spdm_args desc = { { 0 } };
int ext_status = 0;
- if (size > sizeof(buf))
+ if (size > sizeof(buf) - 1)
return -EINVAL;
if (copy_from_user(buf, data, size)) {
size = -EINVAL;
goto out;
}
+
+ buf[size] = '\0';
+
if (sscanf(buf, "%u %u\n", &spdm_data->config_data.response_time_us[4],
&spdm_data->config_data.response_time_us[5]) != 2) {
size = -EINVAL;
@@ -515,13 +536,16 @@
struct spdm_args desc = { { 0 } };
int ext_status = 0;
- if (size > sizeof(buf))
+ if (size > sizeof(buf) - 1)
return -EINVAL;
if (copy_from_user(buf, data, size)) {
size = -EINVAL;
goto out;
}
+
+ buf[size] = '\0';
+
if (sscanf(buf, "%u %u\n",
&spdm_data->config_data.cci_response_time_us[0],
&spdm_data->config_data.cci_response_time_us[1]) != 2) {
@@ -575,13 +599,16 @@
struct spdm_args desc = { { 0 } };
int ext_status = 0;
- if (size > sizeof(buf))
+ if (size > sizeof(buf) - 1)
return -EINVAL;
if (copy_from_user(buf, data, size)) {
size = -EINVAL;
goto out;
}
+
+ buf[size] = '\0';
+
if (sscanf(buf, "%u %u\n",
&spdm_data->config_data.cci_response_time_us[2],
&spdm_data->config_data.cci_response_time_us[3]) != 2) {
@@ -635,13 +662,16 @@
struct spdm_args desc = { { 0 } };
int ext_status = 0;
- if (size > sizeof(buf))
+ if (size > sizeof(buf) - 1)
return -EINVAL;
if (copy_from_user(buf, data, size)) {
size = -EINVAL;
goto out;
}
+
+ buf[size] = '\0';
+
if (sscanf(buf, "%u %u\n",
&spdm_data->config_data.cci_response_time_us[4],
&spdm_data->config_data.cci_response_time_us[5]) != 2){
@@ -694,13 +724,16 @@
struct spdm_args desc = { { 0 } };
int ext_status = 0;
- if (size > sizeof(buf))
+ if (size > sizeof(buf) - 1)
return -EINVAL;
if (copy_from_user(buf, data, size)) {
size = -EINVAL;
goto out;
}
+
+ buf[size] = '\0';
+
if (sscanf(buf, "%u\n", &spdm_data->config_data.max_cci_freq) != 1) {
size = -EINVAL;
goto out;
@@ -748,13 +781,16 @@
struct spdm_args desc = { { 0 } };
int ext_status = 0;
- if (size > sizeof(buf))
+ if (size > sizeof(buf) - 1)
return -EINVAL;
if (copy_from_user(buf, data, size)) {
size = -EINVAL;
goto out;
}
+
+ buf[size] = '\0';
+
if (sscanf(buf, "%u %u %u %u\n", &spdm_data->config_data.upstep,
&spdm_data->config_data.downstep,
&spdm_data->config_data.max_vote,
diff --git a/drivers/devfreq/governor_bw_hwmon.c b/drivers/devfreq/governor_bw_hwmon.c
index 3026bc2..cb04014 100644
--- a/drivers/devfreq/governor_bw_hwmon.c
+++ b/drivers/devfreq/governor_bw_hwmon.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2017, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2013-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -171,7 +171,7 @@
#define MAX_MS 500U
/* Returns MBps of read/writes for the sampling window. */
-static unsigned int bytes_to_mbps(long long bytes, unsigned int us)
+static unsigned long bytes_to_mbps(unsigned long long bytes, unsigned int us)
{
bytes *= USEC_PER_SEC;
do_div(bytes, us);
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c
index 731a554..bf903b9 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -816,7 +816,7 @@
struct dp_display_private *dp = container_of(dw,
struct dp_display_private, connect_work);
- if (dp->dp_display.is_connected) {
+ if (dp->dp_display.is_connected && dp_display_framework_ready(dp)) {
pr_debug("HPD already on\n");
return;
}
@@ -1085,6 +1085,11 @@
dp->aux->init(dp->aux, dp->parser->aux_cfg);
+ if (dp->debug->psm_enabled) {
+ dp->link->psm_config(dp->link, &dp->panel->link_info, false);
+ dp->debug->psm_enabled = false;
+ }
+
rc = dp->ctrl->on(dp->ctrl);
if (dp->debug->tpg_state)
@@ -1227,10 +1232,9 @@
* any notification from driver. Initialize post_open callback to notify
* DP connection once framework restarts.
*/
- if (dp->usbpd->hpd_high && dp->usbpd->alt_mode_cfg_done) {
+ if (dp->usbpd->hpd_high && dp->usbpd->alt_mode_cfg_done)
dp_display->post_open = dp_display_post_open;
- dp->dp_display.is_connected = false;
- }
+
dp->power_on = false;
dp->aux->state = DP_STATE_CTRL_POWERED_OFF;
end:
diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_display.c b/drivers/gpu/drm/msm/dsi-staging/dsi_display.c
index c5f8092..ff2c9ce 100644
--- a/drivers/gpu/drm/msm/dsi-staging/dsi_display.c
+++ b/drivers/gpu/drm/msm/dsi-staging/dsi_display.c
@@ -37,6 +37,7 @@
#define NO_OVERRIDE -1
#define MISR_BUFF_SIZE 256
+#define ESD_MODE_STRING_MAX_LEN 256
#define MAX_NAME_SIZE 64
@@ -1027,62 +1028,6 @@
return rc;
}
-static ssize_t debugfs_esd_trigger_check(struct file *file,
- const char __user *user_buf,
- size_t user_len,
- loff_t *ppos)
-{
- struct dsi_display *display = file->private_data;
- char *buf;
- int rc = 0;
- u32 esd_trigger;
-
- if (!display)
- return -ENODEV;
-
- if (*ppos)
- return 0;
-
- if (user_len > sizeof(u32))
- return -EINVAL;
-
- buf = kzalloc(user_len, GFP_KERNEL);
- if (!buf)
- return -ENOMEM;
-
- if (copy_from_user(buf, user_buf, user_len)) {
- rc = -EINVAL;
- goto error;
- }
-
- buf[user_len] = '\0'; /* terminate the string */
-
- if (kstrtouint(buf, 10, &esd_trigger)) {
- rc = -EINVAL;
- goto error;
- }
-
- if (esd_trigger != 1) {
- rc = -EINVAL;
- goto error;
- }
-
- display->esd_trigger = esd_trigger;
-
- if (display->esd_trigger) {
- rc = dsi_panel_trigger_esd_attack(display->panel);
- if (rc) {
- pr_err("Failed to trigger ESD attack\n");
- return rc;
- }
- }
-
- rc = user_len;
-error:
- kfree(buf);
- return rc;
-}
-
static ssize_t debugfs_misr_read(struct file *file,
char __user *user_buf,
size_t user_len,
@@ -1148,6 +1093,191 @@
return len;
}
+static ssize_t debugfs_esd_trigger_check(struct file *file,
+ const char __user *user_buf,
+ size_t user_len,
+ loff_t *ppos)
+{
+ struct dsi_display *display = file->private_data;
+ char *buf;
+ int rc = 0;
+ u32 esd_trigger;
+
+ if (!display)
+ return -ENODEV;
+
+ if (*ppos)
+ return 0;
+
+ if (user_len > sizeof(u32))
+ return -EINVAL;
+
+ buf = kzalloc(user_len, GFP_KERNEL);
+ if (!buf)
+ return -ENOMEM;
+
+ if (copy_from_user(buf, user_buf, user_len)) {
+ rc = -EINVAL;
+ goto error;
+ }
+
+ buf[user_len] = '\0'; /* terminate the string */
+
+ if (kstrtouint(buf, 10, &esd_trigger)) {
+ rc = -EINVAL;
+ goto error;
+ }
+
+ if (esd_trigger != 1) {
+ rc = -EINVAL;
+ goto error;
+ }
+
+ display->esd_trigger = esd_trigger;
+
+ if (display->esd_trigger) {
+ rc = dsi_panel_trigger_esd_attack(display->panel);
+ if (rc) {
+ pr_err("Failed to trigger ESD attack\n");
+ return rc;
+ }
+ }
+
+ rc = user_len;
+error:
+ kfree(buf);
+ return rc;
+}
+
+static ssize_t debugfs_alter_esd_check_mode(struct file *file,
+ const char __user *user_buf,
+ size_t user_len,
+ loff_t *ppos)
+{
+ struct dsi_display *display = file->private_data;
+ struct drm_panel_esd_config *esd_config;
+ char *buf;
+ int rc = 0;
+ size_t len = min_t(size_t, user_len, ESD_MODE_STRING_MAX_LEN);
+
+ if (!display)
+ return -ENODEV;
+
+ if (*ppos)
+ return 0;
+
+ buf = kzalloc(len, GFP_KERNEL);
+ if (!buf)
+ return -ENOMEM;
+
+ if (copy_from_user(buf, user_buf, user_len)) {
+ rc = -EINVAL;
+ goto error;
+ }
+
+ buf[len] = '\0'; /* terminate the string */
+ if (!display->panel) {
+ rc = -EINVAL;
+ goto error;
+ }
+
+ esd_config = &display->panel->esd_config;
+ if (!esd_config) {
+ pr_err("Invalid panel esd config\n");
+ rc = -EINVAL;
+ goto error;
+ }
+
+ if (!esd_config->esd_enabled)
+ goto error;
+
+ if (!strcmp(buf, "te_signal_check\n")) {
+ esd_config->status_mode = ESD_MODE_PANEL_TE;
+ dsi_display_change_te_irq_status(display, true);
+ }
+
+ if (!strcmp(buf, "reg_read\n")) {
+ rc = dsi_panel_parse_esd_reg_read_configs(display->panel,
+ display->panel_of);
+ if (rc) {
+ pr_err("failed to alter esd check mode,rc=%d\n",
+ rc);
+ rc = user_len;
+ goto error;
+ }
+ esd_config->status_mode = ESD_MODE_REG_READ;
+ if (dsi_display_is_te_based_esd(display))
+ dsi_display_change_te_irq_status(display, false);
+ }
+
+ rc = len;
+error:
+ kfree(buf);
+ return rc;
+}
+
+static ssize_t debugfs_read_esd_check_mode(struct file *file,
+ char __user *user_buf,
+ size_t user_len,
+ loff_t *ppos)
+{
+ struct dsi_display *display = file->private_data;
+ struct drm_panel_esd_config *esd_config;
+ char *buf;
+ int rc = 0;
+ size_t len = min_t(size_t, user_len, ESD_MODE_STRING_MAX_LEN);
+
+ if (!display)
+ return -ENODEV;
+
+ if (*ppos)
+ return 0;
+
+ if (!display->panel) {
+ pr_err("invalid panel data\n");
+ return -EINVAL;
+ }
+
+ buf = kzalloc(len, GFP_KERNEL);
+ if (!buf)
+ return -ENOMEM;
+
+ esd_config = &display->panel->esd_config;
+ if (!esd_config) {
+ pr_err("Invalid panel esd config\n");
+ rc = -EINVAL;
+ goto error;
+ }
+
+ if (!esd_config->esd_enabled) {
+ rc = snprintf(buf, len, "ESD feature not enabled");
+ goto output_mode;
+ }
+
+ if (esd_config->status_mode == ESD_MODE_REG_READ)
+ rc = snprintf(buf, len, "reg_read");
+
+ if (esd_config->status_mode == ESD_MODE_PANEL_TE)
+ rc = snprintf(buf, len, "te_signal_check");
+
+output_mode:
+ if (!rc) {
+ rc = -EINVAL;
+ goto error;
+ }
+
+ if (copy_to_user(user_buf, buf, len)) {
+ rc = -EFAULT;
+ goto error;
+ }
+
+ *ppos += len;
+
+error:
+ kfree(buf);
+ return len;
+}
+
static const struct file_operations dump_info_fops = {
.open = simple_open,
.read = debugfs_dump_info_read,
@@ -1164,6 +1294,12 @@
.write = debugfs_esd_trigger_check,
};
+static const struct file_operations esd_check_mode_fops = {
+ .open = simple_open,
+ .write = debugfs_alter_esd_check_mode,
+ .read = debugfs_read_esd_check_mode,
+};
+
static int dsi_display_debugfs_init(struct dsi_display *display)
{
int rc = 0;
@@ -1203,6 +1339,18 @@
goto error_remove_dir;
}
+ dump_file = debugfs_create_file("esd_check_mode",
+ 0644,
+ dir,
+ display,
+ &esd_check_mode_fops);
+ if (IS_ERR_OR_NULL(dump_file)) {
+ rc = PTR_ERR(dump_file);
+ pr_err("[%s] debugfs for esd check mode failed, rc=%d\n",
+ display->name, rc);
+ goto error_remove_dir;
+ }
+
misr_data = debugfs_create_file("misr_data",
0600,
dir,
diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c b/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c
index d8b90e3..31d6fd1 100644
--- a/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c
+++ b/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c
@@ -18,6 +18,7 @@
#include <linux/gpio.h>
#include <linux/of_gpio.h>
#include <video/mipi_display.h>
+#include <linux/firmware.h>
#include "dsi_panel.h"
#include "dsi_ctrl_hw.h"
@@ -710,12 +711,58 @@
error:
return rc;
}
-static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
- struct device_node *of_node)
+
+static int dsi_panel_fw_parse(const struct firmware *fw_entry,
+ char *id_match, u32 *param_value)
{
- int rc = 0;
+ int value, numlen = 1, index = 0;
+ char id[SZ_256];
+
+ while (sscanf(fw_entry->data + index,
+ "%255s %d", id, &value) > 0) {
+ if (!strcmp(id, id_match)) {
+ *param_value = value;
+ return 0;
+ }
+
+ while ((value / 10) > 0) {
+ value /= 10;
+ numlen++;
+ }
+
+ index += (strlen(id) + numlen + 1);
+ numlen = 1;
+ }
+
+ return -EINVAL;
+}
+
+static int dsi_panel_parse(struct device_node *of_node,
+ const struct firmware *fw_entry, char *id_match, u32 *val)
+{
+ if (fw_entry && fw_entry->data)
+ return dsi_panel_fw_parse(fw_entry, id_match, val);
+ else
+ return of_property_read_u32(of_node, id_match, val);
+
+ return 0;
+}
+
+static int dsi_panel_parse_timing(struct device *parent,
+ struct dsi_mode_info *mode, const char *name,
+ struct device_node *of_node)
+{
+ int fw = 0, rc = 0;
u64 tmp64;
struct dsi_display_mode *display_mode;
+ const struct firmware *fw_entry = NULL;
+ char *fw_name = "dsi_prop";
+
+ if (strcmp(name, "Simulator video mode dsi panel") == 0)
+ fw = request_firmware(&fw_entry, fw_name, parent);
+
+ if (fw)
+ fw_entry = NULL;
display_mode = container_of(mode, struct dsi_display_mode, timing);
@@ -730,47 +777,47 @@
mode->clk_rate_hz = !rc ? tmp64 : 0;
display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
- rc = of_property_read_u32(of_node, "qcom,mdss-dsi-panel-framerate",
- &mode->refresh_rate);
+ rc = dsi_panel_parse(of_node, fw_entry,
+ "qcom,mdss-dsi-panel-framerate", &mode->refresh_rate);
if (rc) {
pr_err("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
rc);
goto error;
}
- rc = of_property_read_u32(of_node, "qcom,mdss-dsi-panel-width",
- &mode->h_active);
+ rc = dsi_panel_parse(of_node, fw_entry,
+ "qcom,mdss-dsi-panel-width", &mode->h_active);
if (rc) {
pr_err("failed to read qcom,mdss-dsi-panel-width, rc=%d\n", rc);
goto error;
}
- rc = of_property_read_u32(of_node, "qcom,mdss-dsi-h-front-porch",
- &mode->h_front_porch);
+ rc = dsi_panel_parse(of_node, fw_entry,
+ "qcom,mdss-dsi-h-front-porch", &mode->h_front_porch);
if (rc) {
pr_err("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
rc);
goto error;
}
- rc = of_property_read_u32(of_node, "qcom,mdss-dsi-h-back-porch",
- &mode->h_back_porch);
+ rc = dsi_panel_parse(of_node, fw_entry,
+ "qcom,mdss-dsi-h-back-porch", &mode->h_back_porch);
if (rc) {
pr_err("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
rc);
goto error;
}
- rc = of_property_read_u32(of_node, "qcom,mdss-dsi-h-pulse-width",
- &mode->h_sync_width);
+ rc = dsi_panel_parse(of_node, fw_entry,
+ "qcom,mdss-dsi-h-pulse-width", &mode->h_sync_width);
if (rc) {
pr_err("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
rc);
goto error;
}
- rc = of_property_read_u32(of_node, "qcom,mdss-dsi-h-sync-skew",
- &mode->h_skew);
+ rc = dsi_panel_parse(of_node, fw_entry,
+ "qcom,mdss-dsi-h-sync-skew", &mode->h_skew);
if (rc)
pr_err("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n", rc);
@@ -778,32 +825,32 @@
mode->h_active, mode->h_front_porch, mode->h_back_porch,
mode->h_sync_width);
- rc = of_property_read_u32(of_node, "qcom,mdss-dsi-panel-height",
- &mode->v_active);
+ rc = dsi_panel_parse(of_node, fw_entry,
+ "qcom,mdss-dsi-panel-height", &mode->v_active);
if (rc) {
pr_err("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
rc);
goto error;
}
- rc = of_property_read_u32(of_node, "qcom,mdss-dsi-v-back-porch",
- &mode->v_back_porch);
+ rc = dsi_panel_parse(of_node, fw_entry,
+ "qcom,mdss-dsi-v-back-porch", &mode->v_back_porch);
if (rc) {
pr_err("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
rc);
goto error;
}
- rc = of_property_read_u32(of_node, "qcom,mdss-dsi-v-front-porch",
- &mode->v_front_porch);
+ rc = dsi_panel_parse(of_node, fw_entry,
+ "qcom,mdss-dsi-v-front-porch", &mode->v_front_porch);
if (rc) {
pr_err("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
rc);
goto error;
}
- rc = of_property_read_u32(of_node, "qcom,mdss-dsi-v-pulse-width",
- &mode->v_sync_width);
+ rc = dsi_panel_parse(of_node, fw_entry,
+ "qcom,mdss-dsi-v-pulse-width", &mode->v_sync_width);
if (rc) {
pr_err("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
rc);
@@ -2580,54 +2627,23 @@
kfree(esd_config->status_cmd.cmds);
}
-static int dsi_panel_parse_esd_config(struct dsi_panel *panel,
- struct device_node *of_node)
+int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel,
+ struct device_node *of_node)
{
+ struct drm_panel_esd_config *esd_config;
int rc = 0;
u32 tmp;
u32 i, status_len, *lenp;
struct property *data;
- const char *string;
- struct drm_panel_esd_config *esd_config;
- u8 *esd_mode = NULL;
- esd_config = &panel->esd_config;
- esd_config->status_mode = ESD_MODE_MAX;
- esd_config->esd_enabled = of_property_read_bool(of_node,
- "qcom,esd-check-enabled");
-
- if (!esd_config->esd_enabled)
- return 0;
-
- rc = of_property_read_string(of_node,
- "qcom,mdss-dsi-panel-status-check-mode", &string);
- if (!rc) {
- if (!strcmp(string, "bta_check")) {
- esd_config->status_mode = ESD_MODE_SW_BTA;
- } else if (!strcmp(string, "reg_read")) {
- esd_config->status_mode = ESD_MODE_REG_READ;
- } else if (!strcmp(string, "te_signal_check")) {
- if (panel->panel_mode == DSI_OP_CMD_MODE) {
- esd_config->status_mode = ESD_MODE_PANEL_TE;
- } else {
- pr_err("TE-ESD not valid for video mode\n");
- rc = -EINVAL;
- goto error;
- }
- } else {
- pr_err("No valid panel-status-check-mode string\n");
- rc = -EINVAL;
- goto error;
- }
- } else {
- pr_debug("status check method not defined!\n");
- rc = -EINVAL;
- goto error;
+ if (!panel || !of_node) {
+ pr_err("Invalid Params\n");
+ return -EINVAL;
}
- if ((esd_config->status_mode == ESD_MODE_SW_BTA) ||
- (esd_config->status_mode == ESD_MODE_PANEL_TE))
- return 0;
+ esd_config = &panel->esd_config;
+ if (!esd_config)
+ return -EINVAL;
dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
DSI_CMD_SET_PANEL_STATUS, of_node);
@@ -2702,8 +2718,10 @@
}
esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
- if (!esd_config->status_buf)
+ if (!esd_config->status_buf) {
+ rc = -ENOMEM;
goto error4;
+ }
rc = of_property_read_u32_array(of_node,
"qcom,mdss-dsi-panel-status-value",
@@ -2714,15 +2732,6 @@
esd_config->groups * status_len);
}
- if (panel->esd_config.status_mode == ESD_MODE_REG_READ)
- esd_mode = "register_read";
- else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA)
- esd_mode = "bta_trigger";
- else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE)
- esd_mode = "te_check";
-
- pr_info("ESD enabled with mode: %s\n", esd_mode);
-
return 0;
error4:
@@ -2735,6 +2744,70 @@
error1:
kfree(esd_config->status_cmd.cmds);
error:
+ return rc;
+}
+
+static int dsi_panel_parse_esd_config(struct dsi_panel *panel,
+ struct device_node *of_node)
+{
+ int rc = 0;
+ const char *string;
+ struct drm_panel_esd_config *esd_config;
+ u8 *esd_mode = NULL;
+
+ esd_config = &panel->esd_config;
+ esd_config->status_mode = ESD_MODE_MAX;
+ esd_config->esd_enabled = of_property_read_bool(of_node,
+ "qcom,esd-check-enabled");
+
+ if (!esd_config->esd_enabled)
+ return 0;
+
+ rc = of_property_read_string(of_node,
+ "qcom,mdss-dsi-panel-status-check-mode", &string);
+ if (!rc) {
+ if (!strcmp(string, "bta_check")) {
+ esd_config->status_mode = ESD_MODE_SW_BTA;
+ } else if (!strcmp(string, "reg_read")) {
+ esd_config->status_mode = ESD_MODE_REG_READ;
+ } else if (!strcmp(string, "te_signal_check")) {
+ if (panel->panel_mode == DSI_OP_CMD_MODE) {
+ esd_config->status_mode = ESD_MODE_PANEL_TE;
+ } else {
+ pr_err("TE-ESD not valid for video mode\n");
+ rc = -EINVAL;
+ goto error;
+ }
+ } else {
+ pr_err("No valid panel-status-check-mode string\n");
+ rc = -EINVAL;
+ goto error;
+ }
+ } else {
+ pr_debug("status check method not defined!\n");
+ rc = -EINVAL;
+ goto error;
+ }
+
+ if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
+ rc = dsi_panel_parse_esd_reg_read_configs(panel, of_node);
+ if (rc) {
+ pr_err("failed to parse esd reg read mode params, rc=%d\n",
+ rc);
+ goto error;
+ }
+ esd_mode = "register_read";
+ } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
+ esd_mode = "bta_trigger";
+ } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
+ esd_mode = "te_check";
+ }
+
+ pr_info("ESD enabled with mode: %s\n", esd_mode);
+
+ return 0;
+
+error:
panel->esd_config.esd_enabled = false;
return rc;
}
@@ -3090,7 +3163,8 @@
if (index != child_idx++)
continue;
- rc = dsi_panel_parse_timing(&mode->timing, child_np);
+ rc = dsi_panel_parse_timing(panel->parent, &mode->timing,
+ panel->name, child_np);
if (rc) {
pr_err("failed to parse panel timing, rc=%d\n", rc);
goto parse_fail;
diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_panel.h b/drivers/gpu/drm/msm/dsi-staging/dsi_panel.h
index 3b226b0..f8b65ab 100644
--- a/drivers/gpu/drm/msm/dsi-staging/dsi_panel.h
+++ b/drivers/gpu/drm/msm/dsi-staging/dsi_panel.h
@@ -283,6 +283,9 @@
struct device_node *of_node,
int topology_override);
+int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel,
+ struct device_node *of_node);
+
void dsi_panel_ext_bridge_put(struct dsi_panel *panel);
#endif /* _DSI_PANEL_H_ */
diff --git a/drivers/gpu/drm/msm/sde/sde_color_processing.c b/drivers/gpu/drm/msm/sde/sde_color_processing.c
index 3e3533e..919ed97 100644
--- a/drivers/gpu/drm/msm/sde/sde_color_processing.c
+++ b/drivers/gpu/drm/msm/sde/sde_color_processing.c
@@ -25,6 +25,7 @@
#include "sde_hw_interrupts.h"
#include "sde_core_irq.h"
#include "dsi_panel.h"
+#include "sde_hw_color_processing.h"
struct sde_cp_node {
u32 property_id;
@@ -148,6 +149,24 @@
SDE_CP_CRTC_MAX_FEATURES,
};
+#define HIGH_BUS_VOTE_NEEDED(feature) ((feature == SDE_CP_CRTC_DSPP_IGC) |\
+ (feature == SDE_CP_CRTC_DSPP_GC) |\
+ (feature == SDE_CP_CRTC_DSPP_SIXZONE) |\
+ (feature == SDE_CP_CRTC_DSPP_GAMUT))
+
+static u32 crtc_feature_map[SDE_CP_CRTC_MAX_FEATURES] = {
+ [SDE_CP_CRTC_DSPP_IGC] = SDE_DSPP_IGC,
+ [SDE_CP_CRTC_DSPP_PCC] = SDE_DSPP_PCC,
+ [SDE_CP_CRTC_DSPP_GC] = SDE_DSPP_GC,
+ [SDE_CP_CRTC_DSPP_MEMCOL_SKIN] = SDE_DSPP_MEMCOLOR,
+ [SDE_CP_CRTC_DSPP_MEMCOL_SKY] = SDE_DSPP_MEMCOLOR,
+ [SDE_CP_CRTC_DSPP_MEMCOL_FOLIAGE] = SDE_DSPP_MEMCOLOR,
+ [SDE_CP_CRTC_DSPP_SIXZONE] = SDE_DSPP_SIXZONE,
+ [SDE_CP_CRTC_DSPP_GAMUT] = SDE_DSPP_GAMUT,
+ [SDE_CP_CRTC_DSPP_DITHER] = SDE_DSPP_DITHER,
+ [SDE_CP_CRTC_DSPP_VLUT] = SDE_DSPP_VLUT,
+};
+
#define INIT_PROP_ATTACH(p, crtc, prop, node, feature, val) \
do { \
(p)->crtc = crtc; \
@@ -859,6 +878,10 @@
struct sde_hw_ctl *ctl;
uint32_t flush_mask = 0;
u32 num_mixers = 0, i = 0;
+ u32 sde_dspp_feature = SDE_DSPP_MAX;
+ struct msm_drm_private *priv = NULL;
+ struct sde_kms *sde_kms = NULL;
+ bool mdss_bus_vote = false;
if (!crtc || !crtc->dev) {
DRM_ERROR("invalid crtc %pK dev %pK\n", crtc,
@@ -878,6 +901,17 @@
return;
}
+ priv = crtc->dev->dev_private;
+ if (!priv || !priv->kms) {
+ SDE_ERROR("invalid kms\n");
+ return;
+ }
+ sde_kms = to_sde_kms(priv->kms);
+ if (!sde_kms) {
+ SDE_ERROR("invalid sde kms\n");
+ return;
+ }
+
mutex_lock(&sde_crtc->crtc_cp_lock);
/* Check if dirty lists are empty and ad features are disabled for
@@ -896,6 +930,16 @@
list_for_each_entry_safe(prop_node, n, &sde_crtc->dirty_list,
dirty_list) {
+ sde_dspp_feature = crtc_feature_map[prop_node->feature];
+ if (!mdss_bus_vote && HIGH_BUS_VOTE_NEEDED(prop_node->feature)
+ && !reg_dmav1_dspp_feature_support(sde_dspp_feature)) {
+ sde_power_scale_reg_bus(&priv->phandle,
+ sde_kms->core_client,
+ VOTE_INDEX_HIGH, false);
+ pr_debug("Vote HIGH for data bus: feature %d\n",
+ prop_node->feature);
+ mdss_bus_vote = true;
+ }
sde_cp_crtc_setfeature(prop_node, sde_crtc);
/* Set the flush flag to true */
if (prop_node->is_dspp_feature)
@@ -903,6 +947,12 @@
else
set_lm_flush = true;
}
+ if (mdss_bus_vote) {
+ sde_power_scale_reg_bus(&priv->phandle, sde_kms->core_client,
+ VOTE_INDEX_LOW, false);
+ pr_debug("Vote LOW for data bus\n");
+ mdss_bus_vote = false;
+ }
list_for_each_entry_safe(prop_node, n, &sde_crtc->ad_dirty,
dirty_list) {
@@ -1180,6 +1230,7 @@
{
struct sde_crtc *sde_crtc = NULL;
struct sde_cp_node *prop_node = NULL, *n = NULL;
+ bool ad_suspend = false;
if (!crtc) {
DRM_ERROR("crtc %pK\n", crtc);
@@ -1202,8 +1253,12 @@
active_list) {
sde_cp_update_list(prop_node, sde_crtc, true);
list_del_init(&prop_node->active_list);
+ ad_suspend = true;
}
mutex_unlock(&sde_crtc->crtc_cp_lock);
+
+ if (ad_suspend)
+ sde_cp_ad_set_prop(sde_crtc, AD_SUSPEND);
}
void sde_cp_crtc_resume(struct drm_crtc *crtc)
@@ -1639,6 +1694,9 @@
struct sde_crtc *crtc;
struct drm_event event;
int i;
+ struct msm_drm_private *priv;
+ struct sde_kms *kms;
+ int ret;
crtc = to_sde_crtc(crtc_drm);
num_mixers = crtc->num_mixers;
@@ -1655,9 +1713,25 @@
if (!hw_dspp)
return;
+ kms = get_kms(crtc_drm);
+ if (!kms || !kms->dev) {
+ SDE_ERROR("invalid arg(s)\n");
+ return;
+ }
+
+ priv = kms->dev->dev_private;
+ ret = sde_power_resource_enable(&priv->phandle, kms->core_client, true);
+ if (ret) {
+ SDE_ERROR("failed to enable power resource %d\n", ret);
+ SDE_EVT32(ret, SDE_EVTLOG_ERROR);
+ return;
+ }
+
hw_dspp->ops.ad_read_intr_resp(hw_dspp, AD4_IN_OUT_BACKLIGHT,
&input_bl, &output_bl);
+ sde_power_resource_enable(&priv->phandle, kms->core_client,
+ false);
if (!input_bl || input_bl < output_bl)
return;
@@ -1898,6 +1972,9 @@
struct drm_event event;
struct drm_msm_hist *hist_data;
struct drm_msm_hist tmp_hist_data;
+ struct msm_drm_private *priv;
+ struct sde_kms *kms;
+ int ret;
u32 i, j;
if (!crtc_drm) {
@@ -1914,6 +1991,20 @@
if (!crtc->hist_blob)
return;
+ kms = get_kms(crtc_drm);
+ if (!kms || !kms->dev) {
+ SDE_ERROR("invalid arg(s)\n");
+ return;
+ }
+
+ priv = kms->dev->dev_private;
+ ret = sde_power_resource_enable(&priv->phandle, kms->core_client, true);
+ if (ret) {
+ SDE_ERROR("failed to enable power resource %d\n", ret);
+ SDE_EVT32(ret, SDE_EVTLOG_ERROR);
+ return;
+ }
+
/* read histogram data into blob */
hist_data = (struct drm_msm_hist *)crtc->hist_blob->data;
for (i = 0; i < crtc->num_mixers; i++) {
@@ -1921,6 +2012,8 @@
if (!hw_dspp || !hw_dspp->ops.read_histogram) {
DRM_ERROR("invalid dspp %pK or read_histogram func\n",
hw_dspp);
+ sde_power_resource_enable(&priv->phandle,
+ kms->core_client, false);
return;
}
if (!i) {
@@ -1933,6 +2026,8 @@
}
}
+ sde_power_resource_enable(&priv->phandle, kms->core_client,
+ false);
/* send histogram event with blob id */
event.length = sizeof(u32);
event.type = DRM_EVENT_HISTOGRAM;
diff --git a/drivers/gpu/drm/msm/sde/sde_crtc.c b/drivers/gpu/drm/msm/sde/sde_crtc.c
index 8c1599e..161b27e 100644
--- a/drivers/gpu/drm/msm/sde/sde_crtc.c
+++ b/drivers/gpu/drm/msm/sde/sde_crtc.c
@@ -4486,46 +4486,6 @@
return rc;
}
-static int _sde_crtc_excl_rect_overlap_check(struct plane_state pstates[],
- int cnt, int curr_cnt, struct sde_rect *excl_rect)
-{
- struct sde_rect dst_rect, intersect;
- int i, rc = -EINVAL;
- const struct drm_plane_state *pstate;
-
- for (i = 0; i < cnt; i++) {
- if (i == curr_cnt)
- continue;
-
- pstate = pstates[i].drm_pstate;
- POPULATE_RECT(&dst_rect, pstate->crtc_x, pstate->crtc_y,
- pstate->crtc_w, pstate->crtc_h, false);
- sde_kms_rect_intersect(&dst_rect, excl_rect, &intersect);
-
- /* complete intersection of excl_rect is required */
- if (intersect.w == excl_rect->w && intersect.h == excl_rect->h
- /* intersecting rect should be in another z_order */
- && pstates[curr_cnt].stage != pstates[i].stage) {
- rc = 0;
- goto end;
- }
- }
-
- SDE_ERROR(
- "no overlapping rect for [%d] z_pos:%d, excl_rect:{%d,%d,%d,%d}\n",
- i, pstates[curr_cnt].stage,
- excl_rect->x, excl_rect->y, excl_rect->w, excl_rect->h);
- for (i = 0; i < cnt; i++) {
- pstate = pstates[i].drm_pstate;
- SDE_ERROR("[%d] p:%d, z_pos:%d, src:{%d,%d,%d,%d}\n",
- i, pstate->plane->base.id, pstates[i].stage,
- pstate->crtc_x, pstate->crtc_y,
- pstate->crtc_w, pstate->crtc_h);
- }
-end:
- return rc;
-}
-
/* no input validation - caller API has all the checks */
static int _sde_crtc_excl_dim_layer_check(struct drm_crtc_state *state,
struct plane_state pstates[], int cnt)
@@ -4558,17 +4518,16 @@
}
}
- /* this is traversing on sorted z-order pstates */
+ /* log all src and excl_rect, useful for debugging */
for (i = 0; i < cnt; i++) {
pstate = pstates[i].drm_pstate;
sde_pstate = to_sde_plane_state(pstate);
- if (sde_pstate->excl_rect.w && sde_pstate->excl_rect.h) {
- /* check overlap on any other z-order */
- rc = _sde_crtc_excl_rect_overlap_check(pstates, cnt,
- i, &sde_pstate->excl_rect);
- if (rc)
- goto end;
- }
+ SDE_DEBUG("p %d z %d src{%d,%d,%d,%d} excl_rect{%d,%d,%d,%d}\n",
+ pstate->plane->base.id, pstates[i].stage,
+ pstate->crtc_x, pstate->crtc_y,
+ pstate->crtc_w, pstate->crtc_h,
+ sde_pstate->excl_rect.x, sde_pstate->excl_rect.y,
+ sde_pstate->excl_rect.w, sde_pstate->excl_rect.h);
}
end:
@@ -6227,6 +6186,7 @@
spin_lock_irqsave(&crtc->spin_lock, flags);
list_for_each_entry(node, &crtc->user_event_list, list) {
if (node->event == event) {
+ list_del(&node->list);
found = true;
break;
}
@@ -6242,7 +6202,6 @@
* no need to disable/de-register.
*/
if (!crtc_drm->enabled) {
- list_del(&node->list);
kfree(node);
return 0;
}
@@ -6251,13 +6210,11 @@
if (ret) {
SDE_ERROR("failed to enable power resource %d\n", ret);
SDE_EVT32(ret, SDE_EVTLOG_ERROR);
- list_del(&node->list);
kfree(node);
return ret;
}
ret = node->func(crtc_drm, false, &node->irq);
- list_del(&node->list);
kfree(node);
sde_power_resource_enable(&priv->phandle, kms->core_client, false);
return ret;
diff --git a/drivers/gpu/drm/msm/sde/sde_hw_catalog.c b/drivers/gpu/drm/msm/sde/sde_hw_catalog.c
index cdc6a9c..ea39dcd 100644
--- a/drivers/gpu/drm/msm/sde/sde_hw_catalog.c
+++ b/drivers/gpu/drm/msm/sde/sde_hw_catalog.c
@@ -80,6 +80,17 @@
#define LINE_LM_OFFSET 5
#define LINE_MODE_WB_OFFSET 2
+/**
+ * these configurations are decided based on max mdp clock. It accounts
+ * for max and min display resolution based on virtual hardware resource
+ * support.
+ */
+#define MAX_DISPLAY_HEIGHT_WITH_DECIMATION 2160
+#define MAX_DISPLAY_HEIGHT 5120
+#define MIN_DISPLAY_HEIGHT 0
+#define MIN_DISPLAY_WIDTH 0
+#define MAX_LM_PER_DISPLAY 2
+
/* maximum XIN halt timeout in usec */
#define VBIF_XIN_HALT_TIMEOUT 0x4000
@@ -3216,7 +3227,7 @@
return rc;
}
-static int _sde_hardware_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev)
+static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev)
{
int rc = 0;
@@ -3249,6 +3260,46 @@
return rc;
}
+static int _sde_hardware_post_caps(struct sde_mdss_cfg *sde_cfg,
+ uint32_t hw_rev)
+{
+ int rc = 0, i;
+ u32 max_horz_deci = 0, max_vert_deci = 0;
+
+ if (!sde_cfg)
+ return -EINVAL;
+
+ for (i = 0; i < sde_cfg->sspp_count; i++) {
+ if (sde_cfg->sspp[i].sblk) {
+ max_horz_deci = max(max_horz_deci,
+ sde_cfg->sspp[i].sblk->maxhdeciexp);
+ max_vert_deci = max(max_vert_deci,
+ sde_cfg->sspp[i].sblk->maxvdeciexp);
+ }
+ }
+
+ /* this should be updated based on HW rev in future */
+ sde_cfg->max_lm_per_display = MAX_LM_PER_DISPLAY;
+
+ if (max_horz_deci)
+ sde_cfg->max_display_width = sde_cfg->max_sspp_linewidth *
+ max_horz_deci;
+ else
+ sde_cfg->max_display_width = sde_cfg->max_mixer_width *
+ sde_cfg->max_lm_per_display;
+
+ if (max_vert_deci)
+ sde_cfg->max_display_height =
+ MAX_DISPLAY_HEIGHT_WITH_DECIMATION * max_vert_deci;
+ else
+ sde_cfg->max_display_height = MAX_DISPLAY_HEIGHT;
+
+ sde_cfg->min_display_height = MIN_DISPLAY_HEIGHT;
+ sde_cfg->min_display_width = MIN_DISPLAY_WIDTH;
+
+ return rc;
+}
+
void sde_hw_catalog_deinit(struct sde_mdss_cfg *sde_cfg)
{
int i;
@@ -3307,7 +3358,7 @@
sde_cfg->hwversion = hw_rev;
- rc = _sde_hardware_caps(sde_cfg, hw_rev);
+ rc = _sde_hardware_pre_caps(sde_cfg, hw_rev);
if (rc)
goto end;
@@ -3379,6 +3430,10 @@
if (rc)
goto end;
+ rc = _sde_hardware_post_caps(sde_cfg, hw_rev);
+ if (rc)
+ goto end;
+
return sde_cfg;
end:
diff --git a/drivers/gpu/drm/msm/sde/sde_hw_catalog.h b/drivers/gpu/drm/msm/sde/sde_hw_catalog.h
index aa6c482..0bb61b3 100644
--- a/drivers/gpu/drm/msm/sde/sde_hw_catalog.h
+++ b/drivers/gpu/drm/msm/sde/sde_hw_catalog.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -909,6 +909,11 @@
* @max_mixer_blendstages max layer mixer blend stages or
* supported z order
* @max_wb_linewidth max writeback line width support.
+ * @max_display_width maximum display width support.
+ * @max_display_height maximum display height support.
+ * @max_lm_per_display maximum layer mixer per display
+ * @min_display_width minimum display width support.
+ * @min_display_height minimum display height support.
* @qseed_type qseed2 or qseed3 support.
* @csc_type csc or csc_10bit support.
* @smart_dma_rev Supported version of SmartDMA feature.
@@ -935,6 +940,13 @@
u32 max_mixer_width;
u32 max_mixer_blendstages;
u32 max_wb_linewidth;
+
+ u32 max_display_width;
+ u32 max_display_height;
+ u32 min_display_width;
+ u32 min_display_height;
+ u32 max_lm_per_display;
+
u32 qseed_type;
u32 csc_type;
u32 smart_dma_rev;
diff --git a/drivers/gpu/drm/msm/sde/sde_hw_reg_dma_v1_color_proc.c b/drivers/gpu/drm/msm/sde/sde_hw_reg_dma_v1_color_proc.c
index 0dc3fed..05ac893 100644
--- a/drivers/gpu/drm/msm/sde/sde_hw_reg_dma_v1_color_proc.c
+++ b/drivers/gpu/drm/msm/sde/sde_hw_reg_dma_v1_color_proc.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -248,6 +248,32 @@
return rc;
}
+bool reg_dmav1_dspp_feature_support(int feature)
+{
+ struct sde_hw_reg_dma_ops *dma_ops;
+ bool is_supported = false;
+
+ if (feature >= SDE_DSPP_MAX) {
+ DRM_ERROR("invalid feature %x max %x\n",
+ feature, SDE_DSPP_MAX);
+ return is_supported;
+ }
+
+ if (feature_map[feature] >= REG_DMA_FEATURES_MAX) {
+ DRM_ERROR("invalid feature map %d for feature %d\n",
+ feature_map[feature], feature);
+ return is_supported;
+ }
+
+ dma_ops = sde_reg_dma_get_ops();
+ if (IS_ERR_OR_NULL(dma_ops))
+ return is_supported;
+
+ dma_ops->check_support(feature_map[feature], DSPP0, &is_supported);
+
+ return is_supported;
+}
+
int reg_dmav1_init_dspp_op_v4(int feature, enum sde_dspp idx)
{
int rc = -ENOTSUPP;
diff --git a/drivers/gpu/drm/msm/sde/sde_hw_reg_dma_v1_color_proc.h b/drivers/gpu/drm/msm/sde/sde_hw_reg_dma_v1_color_proc.h
index a8115d6..5cd212a 100644
--- a/drivers/gpu/drm/msm/sde/sde_hw_reg_dma_v1_color_proc.h
+++ b/drivers/gpu/drm/msm/sde/sde_hw_reg_dma_v1_color_proc.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -25,6 +25,13 @@
int reg_dmav1_init_dspp_op_v4(int feature, enum sde_dspp idx);
/**
+ * reg_dmav1_dspp_feature_support() - check if dspp feature using REG_DMA
+ * or not.
+ * @feature: dspp feature
+ */
+bool reg_dmav1_dspp_feature_support(int feature);
+
+/**
* reg_dma_init_sspp_op_v4() - initialize the sspp feature op for sde v4
* @feature: sspp feature
* @idx: sspp idx
diff --git a/drivers/gpu/drm/msm/sde/sde_kms.c b/drivers/gpu/drm/msm/sde/sde_kms.c
index 5895a4d..691fbd4 100644
--- a/drivers/gpu/drm/msm/sde/sde_kms.c
+++ b/drivers/gpu/drm/msm/sde/sde_kms.c
@@ -3016,15 +3016,10 @@
goto drm_obj_init_err;
}
- dev->mode_config.min_width = 0;
- dev->mode_config.min_height = 0;
-
- /*
- * max crtc width is equal to the max mixer width * 2 and max height is
- * is 4K
- */
- dev->mode_config.max_width = sde_kms->catalog->max_mixer_width * 2;
- dev->mode_config.max_height = 4096;
+ dev->mode_config.min_width = sde_kms->catalog->min_display_width;
+ dev->mode_config.min_height = sde_kms->catalog->min_display_height;
+ dev->mode_config.max_width = sde_kms->catalog->max_display_width;
+ dev->mode_config.max_height = sde_kms->catalog->max_display_height;
/*
* Support format modifiers for compression etc.
diff --git a/drivers/gpu/drm/msm/sde/sde_rm.c b/drivers/gpu/drm/msm/sde/sde_rm.c
index 93304e16..83cf812 100644
--- a/drivers/gpu/drm/msm/sde/sde_rm.c
+++ b/drivers/gpu/drm/msm/sde/sde_rm.c
@@ -1182,7 +1182,7 @@
}
SDE_EVT32(status, irq_idx_pp_done, SDE_EVTLOG_ERROR);
- SDE_ERROR("polling timed out. status = 0x%x\n", status);
+ SDE_DEBUG("polling timed out. status = 0x%x\n", status);
return -ETIMEDOUT;
}
diff --git a/drivers/gpu/drm/msm/sde_power_handle.c b/drivers/gpu/drm/msm/sde_power_handle.c
index 40542ab..037c036 100644
--- a/drivers/gpu/drm/msm/sde_power_handle.c
+++ b/drivers/gpu/drm/msm/sde_power_handle.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2014-2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -844,6 +844,68 @@
sde_rsc_client_destroy(phandle->rsc_client);
}
+
+int sde_power_scale_reg_bus(struct sde_power_handle *phandle,
+ struct sde_power_client *pclient, u32 usecase_ndx, bool skip_lock)
+{
+ struct sde_power_client *client;
+ int rc = 0;
+ u32 max_usecase_ndx = VOTE_INDEX_DISABLE;
+
+ if (!skip_lock) {
+ mutex_lock(&phandle->phandle_lock);
+
+ if (WARN_ON(pclient->refcount == 0)) {
+ /*
+ * This is not expected, clients calling without skip
+ * lock are outside the power resource enable, which
+ * means that they should have enabled the power
+ * resource before trying to scale.
+ */
+ rc = -EINVAL;
+ goto exit;
+ }
+ }
+
+ pr_debug("%pS: current idx:%d requested:%d client:%d\n",
+ __builtin_return_address(0), pclient->usecase_ndx,
+ usecase_ndx, pclient->id);
+
+ pclient->usecase_ndx = usecase_ndx;
+
+ list_for_each_entry(client, &phandle->power_client_clist, list) {
+ if (client->usecase_ndx < VOTE_INDEX_MAX &&
+ client->usecase_ndx > max_usecase_ndx)
+ max_usecase_ndx = client->usecase_ndx;
+ }
+
+ rc = sde_power_reg_bus_update(phandle->reg_bus_hdl,
+ max_usecase_ndx);
+ if (rc)
+ pr_err("failed to set reg bus vote rc=%d\n", rc);
+
+exit:
+ if (!skip_lock)
+ mutex_unlock(&phandle->phandle_lock);
+
+ return rc;
+}
+
+static inline bool _resource_changed(u32 current_usecase_ndx,
+ u32 max_usecase_ndx)
+{
+ WARN_ON((current_usecase_ndx >= VOTE_INDEX_MAX)
+ || (max_usecase_ndx >= VOTE_INDEX_MAX));
+
+ if (((current_usecase_ndx >= VOTE_INDEX_LOW) && /*current enabled */
+ (max_usecase_ndx == VOTE_INDEX_DISABLE)) || /* max disabled */
+ ((current_usecase_ndx == VOTE_INDEX_DISABLE) && /* disabled */
+ (max_usecase_ndx >= VOTE_INDEX_LOW))) /* max enabled */
+ return true;
+
+ return false;
+}
+
int sde_power_resource_enable(struct sde_power_handle *phandle,
struct sde_power_client *pclient, bool enable)
{
@@ -877,7 +939,15 @@
max_usecase_ndx = client->usecase_ndx;
}
- if (phandle->current_usecase_ndx != max_usecase_ndx) {
+ /*
+ * Check if we need to enable/disable the power resource, we won't
+ * only-scale up/down the AHB vote in this API; if a client wants to
+ * bump up the AHB clock above the LOW (default) level, it needs to
+ * call 'sde_power_scale_reg_bus' with the desired vote after the power
+ * resource was enabled.
+ */
+ if (_resource_changed(phandle->current_usecase_ndx,
+ max_usecase_ndx)) {
changed = true;
prev_usecase_ndx = phandle->current_usecase_ndx;
phandle->current_usecase_ndx = max_usecase_ndx;
@@ -920,8 +990,8 @@
}
}
- rc = sde_power_reg_bus_update(phandle->reg_bus_hdl,
- max_usecase_ndx);
+ rc = sde_power_scale_reg_bus(phandle, pclient,
+ max_usecase_ndx, true);
if (rc) {
pr_err("failed to set reg bus vote rc=%d\n", rc);
goto reg_bus_hdl_err;
@@ -952,8 +1022,8 @@
sde_power_rsc_update(phandle, false);
- sde_power_reg_bus_update(phandle->reg_bus_hdl,
- max_usecase_ndx);
+ sde_power_scale_reg_bus(phandle, pclient,
+ max_usecase_ndx, true);
if (!phandle->rsc_client)
msm_dss_enable_vreg(mp->vreg_config, mp->num_vreg,
@@ -975,7 +1045,7 @@
clk_err:
sde_power_rsc_update(phandle, false);
rsc_err:
- sde_power_reg_bus_update(phandle->reg_bus_hdl, prev_usecase_ndx);
+ sde_power_scale_reg_bus(phandle, pclient, max_usecase_ndx, true);
reg_bus_hdl_err:
if (!phandle->rsc_client)
msm_dss_enable_vreg(mp->vreg_config, mp->num_vreg, 0);
diff --git a/drivers/gpu/drm/msm/sde_power_handle.h b/drivers/gpu/drm/msm/sde_power_handle.h
index fb7322e..f02ca0a 100644
--- a/drivers/gpu/drm/msm/sde_power_handle.h
+++ b/drivers/gpu/drm/msm/sde_power_handle.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -43,11 +43,15 @@
* mdss_bus_vote_type: register bus vote type
* VOTE_INDEX_DISABLE: removes the client vote
* VOTE_INDEX_LOW: keeps the lowest vote for register bus
+ * VOTE_INDEX_MEDIUM: keeps medium vote for register bus
+ * VOTE_INDEX_HIGH: keeps the highest vote for register bus
* VOTE_INDEX_MAX: invalid
*/
enum mdss_bus_vote_type {
VOTE_INDEX_DISABLE,
VOTE_INDEX_LOW,
+ VOTE_INDEX_MEDIUM,
+ VOTE_INDEX_HIGH,
VOTE_INDEX_MAX,
};
@@ -228,6 +232,19 @@
struct sde_power_client *pclient, bool enable);
/**
+ * sde_power_scale_reg_bus() - Scale the registers bus for the specified client
+ * @pdata: power handle containing the resources
+ * @client: client information to scale its vote
+ * @usecase_ndx: new use case to scale the reg bus
+ * @skip_lock: will skip holding the power rsrc mutex during the call, this is
+ * for internal callers that already hold this required lock.
+ *
+ * Return: error code.
+ */
+int sde_power_scale_reg_bus(struct sde_power_handle *phandle,
+ struct sde_power_client *pclient, u32 usecase_ndx, bool skip_lock);
+
+/**
* sde_power_resource_is_enabled() - return true if power resource is enabled
* @pdata: power handle containing the resources
*
diff --git a/drivers/gpu/msm/kgsl.c b/drivers/gpu/msm/kgsl.c
index 49514e3..ebf96b53 100644
--- a/drivers/gpu/msm/kgsl.c
+++ b/drivers/gpu/msm/kgsl.c
@@ -4039,6 +4039,7 @@
struct kgsl_process_private *private = dev_priv->process_priv;
struct kgsl_gpuobj_set_info *param = data;
struct kgsl_mem_entry *entry;
+ int ret = 0;
if (param->id == 0)
return -EINVAL;
@@ -4051,13 +4052,16 @@
copy_metadata(entry, param->metadata, param->metadata_len);
if (param->flags & KGSL_GPUOBJ_SET_INFO_TYPE) {
- entry->memdesc.flags &= ~((uint64_t) KGSL_MEMTYPE_MASK);
- entry->memdesc.flags |= (uint64_t)(param->type <<
- KGSL_MEMTYPE_SHIFT);
+ if (param->type <= (KGSL_MEMTYPE_MASK >> KGSL_MEMTYPE_SHIFT)) {
+ entry->memdesc.flags &= ~((uint64_t) KGSL_MEMTYPE_MASK);
+ entry->memdesc.flags |= (uint64_t)((param->type <<
+ KGSL_MEMTYPE_SHIFT) & KGSL_MEMTYPE_MASK);
+ } else
+ ret = -EINVAL;
}
kgsl_mem_entry_put(entry);
- return 0;
+ return ret;
}
/**
diff --git a/drivers/gpu/msm/kgsl_sync.h b/drivers/gpu/msm/kgsl_sync.h
index 7c9f334e..955401d 100644
--- a/drivers/gpu/msm/kgsl_sync.h
+++ b/drivers/gpu/msm/kgsl_sync.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2014, 2017 The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014,2017-2018 The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -137,8 +137,8 @@
}
-struct kgsl_sync_fence_cb *kgsl_sync_fence_async_wait(int fd,
- void (*func)(void *priv), void *priv,
+static inline struct kgsl_sync_fence_cb *kgsl_sync_fence_async_wait(int fd,
+ bool (*func)(void *priv), void *priv,
char *fence_name, int name_len)
{
return NULL;
@@ -188,7 +188,7 @@
}
-void kgsl_dump_fence(struct kgsl_drawobj_sync_event *event,
+static inline void kgsl_dump_fence(struct kgsl_drawobj_sync_event *event,
char *fence_str, int len)
{
}
diff --git a/drivers/input/misc/hbtp_input.c b/drivers/input/misc/hbtp_input.c
index 09fa146..3cb8815 100644
--- a/drivers/input/misc/hbtp_input.c
+++ b/drivers/input/misc/hbtp_input.c
@@ -39,6 +39,7 @@
#define HBTP_HOLD_DURATION_US (10)
#define HBTP_PINCTRL_DDIC_SEQ_NUM (4)
#define HBTP_WAIT_TIMEOUT_MS 2000
+#define MSC_HBTP_ACTIVE_BLOB 0x05
struct hbtp_data {
struct platform_device *pdev;
@@ -91,6 +92,7 @@
s16 ROI[MAX_ROI_SIZE];
s16 accelBuffer[MAX_ACCEL_SIZE];
u32 display_status;
+ u32 touch_flag;
};
static struct hbtp_data *hbtp;
@@ -234,6 +236,9 @@
__set_bit(BTN_TOUCH, input_dev->keybit);
__set_bit(INPUT_PROP_DIRECT, input_dev->propbit);
+ /* for Blob touch interference feature */
+ input_set_capability(input_dev, EV_MSC, MSC_HBTP_ACTIVE_BLOB);
+
for (i = KEY_HOME; i <= KEY_MICMUTE; i++)
__set_bit(i, input_dev->keybit);
@@ -273,10 +278,12 @@
}
static int hbtp_input_report_events(struct hbtp_data *hbtp_data,
- struct hbtp_input_mt *mt_data)
+ struct hbtp_input_mt *mt_data, u32 flag)
{
int i;
struct hbtp_input_touch *tch;
+ u32 flag_change;
+ bool active_blob;
for (i = 0; i < HBTP_MAX_FINGER; i++) {
tch = &(mt_data->touches[i]);
@@ -331,10 +338,19 @@
hbtp_data->touch_status[i] = tch->active;
}
}
+ flag_change = hbtp_data->touch_flag ^ flag;
+ if (flag_change) {
+ if (flag_change & HBTP_FLAG_ACTIVE_BLOB) {
+ active_blob = (flag & HBTP_FLAG_ACTIVE_BLOB) ?
+ true : false;
+ input_event(hbtp_data->input_dev, EV_MSC,
+ MSC_HBTP_ACTIVE_BLOB, active_blob);
+ }
+ }
input_report_key(hbtp->input_dev, BTN_TOUCH, mt_data->num_touches > 0);
input_sync(hbtp->input_dev);
-
+ hbtp_data->touch_flag = flag;
return 0;
}
@@ -595,6 +611,7 @@
{
int error = 0;
struct hbtp_input_mt mt_data;
+ struct hbtp_input_mt_ext mt_data_ext;
struct hbtp_input_absinfo absinfo[ABS_MT_LAST - ABS_MT_FIRST + 1];
struct hbtp_input_key key_data;
enum hbtp_afe_power_cmd power_cmd;
@@ -636,7 +653,26 @@
return -EFAULT;
}
- hbtp_input_report_events(hbtp, &mt_data);
+ hbtp_input_report_events(hbtp, &mt_data, 0);
+ error = 0;
+ break;
+
+ case HBTP_SET_TOUCHDATA_EXT:
+ if (!hbtp || !hbtp->input_dev) {
+ pr_err("%s: The input device hasn't been created\n",
+ __func__);
+ return -EFAULT;
+ }
+
+ if (copy_from_user(&mt_data_ext, (void __user *)arg,
+ sizeof(struct hbtp_input_mt_ext))) {
+ pr_err("%s: Error copying data\n", __func__);
+ return -EFAULT;
+ }
+
+ hbtp_input_report_events(hbtp,
+ (struct hbtp_input_mt *)&mt_data_ext,
+ mt_data_ext.flag);
error = 0;
break;
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index bc01a41..56ac9e0 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -1366,6 +1366,28 @@
.free_pages_exact = arm_smmu_free_pages_exact,
};
+static void msm_smmu_tlb_inv_context(void *cookie)
+{
+}
+
+static void msm_smmu_tlb_inv_range_nosync(unsigned long iova, size_t size,
+ size_t granule, bool leaf,
+ void *cookie)
+{
+}
+
+static void msm_smmu_tlb_sync(void *cookie)
+{
+}
+
+static struct iommu_gather_ops msm_smmu_gather_ops = {
+ .tlb_flush_all = msm_smmu_tlb_inv_context,
+ .tlb_add_flush = msm_smmu_tlb_inv_range_nosync,
+ .tlb_sync = msm_smmu_tlb_sync,
+ .alloc_pages_exact = arm_smmu_alloc_pages_exact,
+ .free_pages_exact = arm_smmu_free_pages_exact,
+};
+
static phys_addr_t arm_smmu_verify_fault(struct iommu_domain *domain,
dma_addr_t iova, u32 fsr)
{
@@ -1887,6 +1909,9 @@
if (smmu->options & ARM_SMMU_OPT_MMU500_ERRATA1)
tlb = &qsmmuv500_errata1_smmu_gather_ops;
+ if (arm_smmu_is_slave_side_secure(smmu_domain))
+ tlb = &msm_smmu_gather_ops;
+
ret = arm_smmu_alloc_cb(domain, smmu, dev);
if (ret < 0)
goto out_unlock;
@@ -1907,6 +1932,7 @@
.sec_id = smmu->sec_id,
.cbndx = cfg->cbndx,
},
+ .tlb = tlb,
.iommu_dev = smmu->dev,
};
fmt = ARM_MSM_SECURE;
@@ -2277,8 +2303,6 @@
const struct iommu_gather_ops *tlb;
tlb = smmu_domain->pgtbl_cfg.tlb;
- if (!tlb)
- return;
mutex_lock(&smmu->stream_map_mutex);
for_each_cfg_sme(fwspec, i, idx) {
diff --git a/drivers/iommu/io-pgtable-msm-secure.c b/drivers/iommu/io-pgtable-msm-secure.c
index 983b28b..1ebf657 100644
--- a/drivers/iommu/io-pgtable-msm-secure.c
+++ b/drivers/iommu/io-pgtable-msm-secure.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -71,7 +71,7 @@
/* Now allocate memory for the secure page tables */
attrs = DMA_ATTR_NO_KERNEL_MAPPING;
dev.coherent_dma_mask = DMA_BIT_MASK(sizeof(dma_addr_t) * 8);
- arch_setup_dma_ops(&dev, 0, 0, NULL, 1);
+ arch_setup_dma_ops(&dev, 0, 0, NULL, 0);
cpu_addr = dma_alloc_attrs(&dev, psize[0], &paddr, GFP_KERNEL, attrs);
if (!cpu_addr) {
pr_err("%s: Failed to allocate %d bytes for PTBL\n",
diff --git a/drivers/irqchip/qcom/mpm-8953.c b/drivers/irqchip/qcom/mpm-8953.c
index c9b15af..358f40b 100644
--- a/drivers/irqchip/qcom/mpm-8953.c
+++ b/drivers/irqchip/qcom/mpm-8953.c
@@ -22,3 +22,60 @@
{88, 222}, /* ee0_krait_hlos_spmi_periph_irq */
{-1},
};
+
+const struct mpm_pin mpm_msm8953_gpio_chip_data[] = {
+ {3, 38},
+ {4, 1},
+ {5, 5},
+ {6, 9},
+ {8, 37},
+ {9, 36},
+ {10, 13},
+ {11, 35},
+ {12, 17},
+ {13, 21},
+ {14, 54},
+ {15, 34},
+ {16, 31},
+ {17, 58},
+ {18, 28},
+ {19, 42},
+ {20, 25},
+ {21, 12},
+ {22, 43},
+ {23, 44},
+ {24, 45},
+ {25, 46},
+ {26, 48},
+ {27, 65},
+ {28, 93},
+ {29, 97},
+ {30, 63},
+ {31, 70},
+ {32, 71},
+ {33, 72},
+ {34, 81},
+ {35, 85},
+ {36, 90},
+ {50, 67},
+ {51, 73},
+ {52, 74},
+ {53, 62},
+ {59, 59},
+ {60, 60},
+ {61, 61},
+ {62, 86},
+ {63, 87},
+ {64, 91},
+ {65, 129},
+ {66, 130},
+ {67, 131},
+ {68, 132},
+ {69, 133},
+ {70, 137},
+ {71, 138},
+ {72, 139},
+ {73, 140},
+ {74, 141},
+ {-1},
+};
diff --git a/drivers/irqchip/qcom/mpm.c b/drivers/irqchip/qcom/mpm.c
index ba4cfa5..478d993 100644
--- a/drivers/irqchip/qcom/mpm.c
+++ b/drivers/irqchip/qcom/mpm.c
@@ -59,6 +59,7 @@
void __iomem *mpm_ipc_reg;
irq_hw_number_t ipc_irq;
struct irq_domain *gic_chip_domain;
+ struct irq_domain *gpio_chip_domain;
};
static int msm_pm_sleep_time_override;
@@ -200,19 +201,19 @@
}
}
-static void msm_mpm_gic_chip_mask(struct irq_data *d)
+static void msm_mpm_chip_mask(struct irq_data *d)
{
msm_mpm_enable_irq(d, false);
irq_chip_mask_parent(d);
}
-static void msm_mpm_gic_chip_unmask(struct irq_data *d)
+static void msm_mpm_chip_unmask(struct irq_data *d)
{
msm_mpm_enable_irq(d, true);
irq_chip_unmask_parent(d);
}
-static int msm_mpm_gic_chip_set_type(struct irq_data *d, unsigned int type)
+static int msm_mpm_chip_set_type(struct irq_data *d, unsigned int type)
{
msm_mpm_set_type(d, type);
return irq_chip_set_type_parent(d, type);
@@ -221,15 +222,70 @@
static struct irq_chip msm_mpm_gic_chip = {
.name = "mpm-gic",
.irq_eoi = irq_chip_eoi_parent,
- .irq_mask = msm_mpm_gic_chip_mask,
- .irq_disable = msm_mpm_gic_chip_mask,
- .irq_unmask = msm_mpm_gic_chip_unmask,
+ .irq_mask = msm_mpm_chip_mask,
+ .irq_disable = msm_mpm_chip_mask,
+ .irq_unmask = msm_mpm_chip_unmask,
.irq_retrigger = irq_chip_retrigger_hierarchy,
- .irq_set_type = msm_mpm_gic_chip_set_type,
+ .irq_set_type = msm_mpm_chip_set_type,
.flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SKIP_SET_WAKE,
-#ifdef CONFIG_SMP
.irq_set_affinity = irq_chip_set_affinity_parent,
-#endif
+};
+
+static struct irq_chip msm_mpm_gpio_chip = {
+ .name = "mpm-gpio",
+ .irq_mask = msm_mpm_chip_mask,
+ .irq_disable = msm_mpm_chip_mask,
+ .irq_unmask = msm_mpm_chip_unmask,
+ .irq_set_type = msm_mpm_chip_set_type,
+ .flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SKIP_SET_WAKE,
+ .irq_retrigger = irq_chip_retrigger_hierarchy,
+ .irq_set_vcpu_affinity = irq_chip_set_vcpu_affinity_parent,
+ .irq_eoi = irq_chip_eoi_parent,
+ .irq_set_affinity = irq_chip_set_affinity_parent,
+};
+
+static int msm_mpm_gpio_chip_translate(struct irq_domain *d,
+ struct irq_fwspec *fwspec,
+ unsigned long *hwirq,
+ unsigned int *type)
+{
+ if (is_of_node(fwspec->fwnode)) {
+ if (fwspec->param_count != 2)
+ return -EINVAL;
+ *hwirq = fwspec->param[0];
+ *type = fwspec->param[1];
+ return 0;
+ }
+ return -EINVAL;
+}
+
+static int msm_mpm_gpio_chip_alloc(struct irq_domain *domain,
+ unsigned int virq,
+ unsigned int nr_irqs,
+ void *data)
+{
+ int ret = 0;
+ struct irq_fwspec *fwspec = data;
+ struct irq_fwspec parent_fwspec;
+ irq_hw_number_t hwirq;
+ unsigned int type = IRQ_TYPE_NONE;
+
+ ret = msm_mpm_gpio_chip_translate(domain, fwspec, &hwirq, &type);
+ if (ret)
+ return ret;
+
+ irq_domain_set_hwirq_and_chip(domain, virq, hwirq,
+ &msm_mpm_gpio_chip, NULL);
+ parent_fwspec = *fwspec;
+ parent_fwspec.fwnode = domain->parent->fwnode;
+ return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs,
+ &parent_fwspec);
+}
+
+static const struct irq_domain_ops msm_mpm_gpio_chip_domain_ops = {
+ .translate = msm_mpm_gpio_chip_translate,
+ .alloc = msm_mpm_gpio_chip_alloc,
+ .free = irq_domain_free_irqs_common,
};
static int msm_mpm_gic_chip_translate(struct irq_domain *d,
@@ -296,15 +352,20 @@
irq_set_affinity(msm_mpm_dev_data.ipc_irq, cpumask);
}
-static int msm_get_mpm_pin_map(unsigned int mpm_irq)
+static int msm_get_apps_irq(unsigned int mpm_irq)
{
- struct mpm_pin *mpm_gic_pin_map = NULL;
+ struct mpm_pin *mpm_pin = NULL;
int apps_irq;
- mpm_gic_pin_map = (struct mpm_pin *)
+ mpm_pin = (struct mpm_pin *)
msm_mpm_dev_data.gic_chip_domain->host_data;
- apps_irq = msm_get_irq_pin(mpm_irq, mpm_gic_pin_map);
- return apps_irq;
+ apps_irq = msm_get_irq_pin(mpm_irq, mpm_pin);
+ if (apps_irq >= 0)
+ return apps_irq;
+
+ mpm_pin = (struct mpm_pin *)
+ msm_mpm_dev_data.gpio_chip_domain->host_data;
+ return msm_get_irq_pin(mpm_irq, mpm_pin);
}
@@ -407,7 +468,7 @@
trace_mpm_wakeup_pending_irqs(i, pending);
for_each_set_bit(k, &pending, 32) {
mpm_irq = 32 * i + k;
- apps_irq = msm_get_mpm_pin_map(mpm_irq);
+ apps_irq = msm_get_apps_irq(mpm_irq);
desc = apps_irq ?
irq_to_desc(apps_irq) : NULL;
@@ -420,7 +481,7 @@
return IRQ_HANDLED;
}
-static int msm_mpm_probe(struct device_node *node)
+static int msm_mpm_init(struct device_node *node)
{
struct msm_mpm_device_data *dev = &msm_mpm_dev_data;
int ret = 0;
@@ -485,12 +546,22 @@
MODULE_DEVICE_TABLE(of, mpm_gic_chip_data_table);
+static const struct of_device_id mpm_gpio_chip_data_table[] = {
+ {
+ .compatible = "qcom,mpm-gpio-msm8953",
+ .data = mpm_msm8953_gpio_chip_data,
+ },
+ {}
+};
+
+MODULE_DEVICE_TABLE(of, mpm_gpio_chip_data_table);
+
static int __init mpm_gic_chip_init(struct device_node *node,
struct device_node *parent)
{
struct irq_domain *parent_domain;
const struct of_device_id *id;
- struct device_node *parent_node;
+ int ret;
if (!parent) {
pr_err("%s(): no parent for mpm-gic\n", node->full_name);
@@ -507,12 +578,13 @@
mpm_to_irq = kcalloc(num_mpm_irqs, sizeof(*mpm_to_irq), GFP_KERNEL);
if (!mpm_to_irq)
- return -ENOMEM;
+ return -ENOMEM;
id = of_match_node(mpm_gic_chip_data_table, node);
if (!id) {
pr_err("can not find mpm_gic_data_table of_node\n");
- return -ENODEV;
+ ret = -ENODEV;
+ goto mpm_map_err;
}
msm_mpm_dev_data.gic_chip_domain = irq_domain_add_hierarchy(
@@ -520,13 +592,75 @@
&msm_mpm_gic_chip_domain_ops, (void *)id->data);
if (!msm_mpm_dev_data.gic_chip_domain) {
pr_err("gic domain add failed\n");
- return -ENOMEM;
+ ret = -ENOMEM;
+ goto mpm_map_err;
}
msm_mpm_dev_data.gic_chip_domain->name = "qcom,mpm-gic";
- parent_node = of_get_parent(node);
- return msm_mpm_probe(parent_node);
+ ret = msm_mpm_init(node);
+ if (!ret)
+ return ret;
+ irq_domain_remove(msm_mpm_dev_data.gic_chip_domain);
+
+mpm_map_err:
+ kfree(mpm_to_irq);
+ return ret;
}
IRQCHIP_DECLARE(mpm_gic_chip, "qcom,mpm-gic", mpm_gic_chip_init);
+
+static int mpm_gpio_chip_probe(struct platform_device *pdev)
+{
+ struct device_node *node, *parent;
+ struct irq_domain *parent_domain;
+ const struct of_device_id *id;
+
+ node = pdev->dev.of_node;
+ parent = of_irq_find_parent(node);
+ if (!parent) {
+ pr_err("%s(): no parent for mpm-gpio\n", node->full_name);
+ return -ENXIO;
+ }
+ parent_domain = irq_find_host(parent);
+ if (!parent_domain) {
+ pr_err("unable to obtain gpio parent domain defer probe\n");
+ return -EPROBE_DEFER;
+ }
+ id = of_match_node(mpm_gpio_chip_data_table, node);
+ if (!id) {
+ pr_err("match_table not found for mpm-gpio\n");
+ return -ENODEV;
+ }
+
+ msm_mpm_dev_data.gpio_chip_domain = irq_domain_add_hierarchy(
+ parent_domain, 0, num_mpm_irqs, node,
+ &msm_mpm_gpio_chip_domain_ops, (void *)id->data);
+
+ if (!msm_mpm_dev_data.gpio_chip_domain)
+ return -ENOMEM;
+
+ msm_mpm_dev_data.gpio_chip_domain->name = "qcom,mpm-gpio";
+
+ return 0;
+}
+
+static const struct of_device_id msm_mpm_dt_match[] = {
+ { .compatible = "qcom,mpm-gpio"},
+ { },
+};
+
+static struct platform_driver msm_mpm_driver = {
+ .probe = mpm_gpio_chip_probe,
+ .driver = {
+ .name = "qcom,mpm-gpio",
+ .of_match_table = msm_mpm_dt_match,
+ },
+};
+
+static int __init msm_mpm_gpio_init(void)
+{
+ return platform_driver_register(&msm_mpm_driver);
+}
+
+arch_initcall(msm_mpm_gpio_init)
diff --git a/drivers/irqchip/qcom/mpm.h b/drivers/irqchip/qcom/mpm.h
index 72185fc..d5eaa7c 100644
--- a/drivers/irqchip/qcom/mpm.h
+++ b/drivers/irqchip/qcom/mpm.h
@@ -22,5 +22,6 @@
};
extern const struct mpm_pin mpm_msm8953_gic_chip_data[];
+extern const struct mpm_pin mpm_msm8953_gpio_chip_data[];
#endif /* __QCOM_MPM_H__ */
diff --git a/drivers/leds/led-triggers.c b/drivers/leds/led-triggers.c
index 431123b..dac7a71 100644
--- a/drivers/leds/led-triggers.c
+++ b/drivers/leds/led-triggers.c
@@ -44,7 +44,8 @@
goto unlock;
}
- if (sysfs_streq(buf, "none")) {
+ if (sysfs_streq(buf, "none") &&
+ !(led_cdev->flags & LED_KEEP_TRIGGER)) {
led_trigger_remove(led_cdev);
goto unlock;
}
diff --git a/drivers/leds/leds-qti-tri-led.c b/drivers/leds/leds-qti-tri-led.c
index ab5e876..ea8ef9d 100644
--- a/drivers/leds/leds-qti-tri-led.c
+++ b/drivers/leds/leds-qti-tri-led.c
@@ -41,8 +41,6 @@
#define TRILED_NUM_MAX 3
#define PWM_PERIOD_DEFAULT_NS 1000000
-#define LED_BLINK_ON_MS 125
-#define LED_BLINK_OFF_MS 875
struct pwm_setting {
u32 pre_period_ns;
@@ -309,8 +307,7 @@
led->cdev.blink_set = qpnp_tri_led_set_blink;
led->cdev.default_trigger = led->default_trigger;
led->cdev.brightness = LED_OFF;
- led->cdev.blink_delay_on = LED_BLINK_ON_MS;
- led->cdev.blink_delay_off = LED_BLINK_OFF_MS;
+ led->cdev.flags |= LED_KEEP_TRIGGER;
rc = devm_led_classdev_register(chip->dev, &led->cdev);
if (rc < 0) {
diff --git a/drivers/md/bcache/request.c b/drivers/md/bcache/request.c
index edb8d1a..723302c 100644
--- a/drivers/md/bcache/request.c
+++ b/drivers/md/bcache/request.c
@@ -1020,7 +1020,7 @@
struct request_queue *q = bdev_get_queue(dc->bdev);
int ret = 0;
- if (bdi_congested(&q->backing_dev_info, bits))
+ if (bdi_congested(q->backing_dev_info, bits))
return 1;
if (cached_dev_get(dc)) {
@@ -1029,7 +1029,7 @@
for_each_cache(ca, d->c, i) {
q = bdev_get_queue(ca->bdev);
- ret |= bdi_congested(&q->backing_dev_info, bits);
+ ret |= bdi_congested(q->backing_dev_info, bits);
}
cached_dev_put(dc);
@@ -1043,7 +1043,7 @@
struct gendisk *g = dc->disk.disk;
g->queue->make_request_fn = cached_dev_make_request;
- g->queue->backing_dev_info.congested_fn = cached_dev_congested;
+ g->queue->backing_dev_info->congested_fn = cached_dev_congested;
dc->disk.cache_miss = cached_dev_cache_miss;
dc->disk.ioctl = cached_dev_ioctl;
}
@@ -1136,7 +1136,7 @@
for_each_cache(ca, d->c, i) {
q = bdev_get_queue(ca->bdev);
- ret |= bdi_congested(&q->backing_dev_info, bits);
+ ret |= bdi_congested(q->backing_dev_info, bits);
}
return ret;
@@ -1147,7 +1147,7 @@
struct gendisk *g = d->disk;
g->queue->make_request_fn = flash_dev_make_request;
- g->queue->backing_dev_info.congested_fn = flash_dev_congested;
+ g->queue->backing_dev_info->congested_fn = flash_dev_congested;
d->cache_miss = flash_dev_cache_miss;
d->ioctl = flash_dev_ioctl;
}
diff --git a/drivers/md/bcache/super.c b/drivers/md/bcache/super.c
index 28ce342..e44816f 100644
--- a/drivers/md/bcache/super.c
+++ b/drivers/md/bcache/super.c
@@ -804,7 +804,7 @@
blk_queue_make_request(q, NULL);
d->disk->queue = q;
q->queuedata = d;
- q->backing_dev_info.congested_data = d;
+ q->backing_dev_info->congested_data = d;
q->limits.max_hw_sectors = UINT_MAX;
q->limits.max_sectors = UINT_MAX;
q->limits.max_segment_size = UINT_MAX;
@@ -1131,9 +1131,9 @@
set_capacity(dc->disk.disk,
dc->bdev->bd_part->nr_sects - dc->sb.data_offset);
- dc->disk.disk->queue->backing_dev_info.ra_pages =
- max(dc->disk.disk->queue->backing_dev_info.ra_pages,
- q->backing_dev_info.ra_pages);
+ dc->disk.disk->queue->backing_dev_info->ra_pages =
+ max(dc->disk.disk->queue->backing_dev_info->ra_pages,
+ q->backing_dev_info->ra_pages);
bch_cached_dev_request_init(dc);
bch_cached_dev_writeback_init(dc);
diff --git a/drivers/md/dm-cache-target.c b/drivers/md/dm-cache-target.c
index c817627..bed056c 100644
--- a/drivers/md/dm-cache-target.c
+++ b/drivers/md/dm-cache-target.c
@@ -2290,7 +2290,7 @@
static int is_congested(struct dm_dev *dev, int bdi_bits)
{
struct request_queue *q = bdev_get_queue(dev->bdev);
- return bdi_congested(&q->backing_dev_info, bdi_bits);
+ return bdi_congested(q->backing_dev_info, bdi_bits);
}
static int cache_is_congested(struct dm_target_callbacks *cb, int bdi_bits)
diff --git a/drivers/md/dm-era-target.c b/drivers/md/dm-era-target.c
index 80e3df1..68d4084 100644
--- a/drivers/md/dm-era-target.c
+++ b/drivers/md/dm-era-target.c
@@ -1379,7 +1379,7 @@
static int dev_is_congested(struct dm_dev *dev, int bdi_bits)
{
struct request_queue *q = bdev_get_queue(dev->bdev);
- return bdi_congested(&q->backing_dev_info, bdi_bits);
+ return bdi_congested(q->backing_dev_info, bdi_bits);
}
static int era_is_congested(struct dm_target_callbacks *cb, int bdi_bits)
diff --git a/drivers/md/dm-table.c b/drivers/md/dm-table.c
index d837a28..b75ccef 100644
--- a/drivers/md/dm-table.c
+++ b/drivers/md/dm-table.c
@@ -1756,7 +1756,7 @@
char b[BDEVNAME_SIZE];
if (likely(q))
- r |= bdi_congested(&q->backing_dev_info, bdi_bits);
+ r |= bdi_congested(q->backing_dev_info, bdi_bits);
else
DMWARN_LIMIT("%s: any_congested: nonexistent device %s",
dm_device_name(t->md),
diff --git a/drivers/md/dm-thin.c b/drivers/md/dm-thin.c
index 0b678b5..eb419a5 100644
--- a/drivers/md/dm-thin.c
+++ b/drivers/md/dm-thin.c
@@ -2715,7 +2715,7 @@
return 1;
q = bdev_get_queue(pt->data_dev->bdev);
- return bdi_congested(&q->backing_dev_info, bdi_bits);
+ return bdi_congested(q->backing_dev_info, bdi_bits);
}
static void requeue_bios(struct pool *pool)
diff --git a/drivers/md/dm.c b/drivers/md/dm.c
index 73e7262..8658ff3 100644
--- a/drivers/md/dm.c
+++ b/drivers/md/dm.c
@@ -1380,7 +1380,7 @@
* With request-based DM we only need to check the
* top-level queue for congestion.
*/
- r = md->queue->backing_dev_info.wb.state & bdi_bits;
+ r = md->queue->backing_dev_info->wb.state & bdi_bits;
} else {
map = dm_get_live_table_fast(md);
if (map)
@@ -1463,7 +1463,7 @@
* - must do so here (in alloc_dev callchain) before queue is used
*/
md->queue->queuedata = md;
- md->queue->backing_dev_info.congested_data = md;
+ md->queue->backing_dev_info->congested_data = md;
}
void dm_init_normal_md_queue(struct mapped_device *md)
@@ -1474,7 +1474,7 @@
/*
* Initialize aspects of queue that aren't relevant for blk-mq
*/
- md->queue->backing_dev_info.congested_fn = dm_any_congested;
+ md->queue->backing_dev_info->congested_fn = dm_any_congested;
blk_queue_bounce_limit(md->queue, BLK_BOUNCE_ANY);
}
diff --git a/drivers/md/linear.c b/drivers/md/linear.c
index 12abf69..be51805 100644
--- a/drivers/md/linear.c
+++ b/drivers/md/linear.c
@@ -68,7 +68,7 @@
for (i = 0; i < conf->raid_disks && !ret ; i++) {
struct request_queue *q = bdev_get_queue(conf->disks[i].rdev->bdev);
- ret |= bdi_congested(&q->backing_dev_info, bits);
+ ret |= bdi_congested(q->backing_dev_info, bits);
}
rcu_read_unlock();
diff --git a/drivers/md/md.c b/drivers/md/md.c
index 8ebf1b9..df7d606 100644
--- a/drivers/md/md.c
+++ b/drivers/md/md.c
@@ -5312,8 +5312,8 @@
queue_flag_set_unlocked(QUEUE_FLAG_NONROT, mddev->queue);
else
queue_flag_clear_unlocked(QUEUE_FLAG_NONROT, mddev->queue);
- mddev->queue->backing_dev_info.congested_data = mddev;
- mddev->queue->backing_dev_info.congested_fn = md_congested;
+ mddev->queue->backing_dev_info->congested_data = mddev;
+ mddev->queue->backing_dev_info->congested_fn = md_congested;
}
if (pers->sync_request) {
if (mddev->kobj.sd &&
@@ -5668,7 +5668,7 @@
__md_stop_writes(mddev);
__md_stop(mddev);
- mddev->queue->backing_dev_info.congested_fn = NULL;
+ mddev->queue->backing_dev_info->congested_fn = NULL;
/* tell userspace to handle 'inactive' */
sysfs_notify_dirent_safe(mddev->sysfs_state);
diff --git a/drivers/md/multipath.c b/drivers/md/multipath.c
index 673efbd..6a7855a 100644
--- a/drivers/md/multipath.c
+++ b/drivers/md/multipath.c
@@ -169,7 +169,7 @@
if (rdev && !test_bit(Faulty, &rdev->flags)) {
struct request_queue *q = bdev_get_queue(rdev->bdev);
- ret |= bdi_congested(&q->backing_dev_info, bits);
+ ret |= bdi_congested(q->backing_dev_info, bits);
/* Just like multipath_map, we just check the
* first available device
*/
diff --git a/drivers/md/raid0.c b/drivers/md/raid0.c
index 258986a..3716dae 100644
--- a/drivers/md/raid0.c
+++ b/drivers/md/raid0.c
@@ -35,7 +35,7 @@
for (i = 0; i < raid_disks && !ret ; i++) {
struct request_queue *q = bdev_get_queue(devlist[i]->bdev);
- ret |= bdi_congested(&q->backing_dev_info, bits);
+ ret |= bdi_congested(q->backing_dev_info, bits);
}
return ret;
}
@@ -415,8 +415,8 @@
*/
int stripe = mddev->raid_disks *
(mddev->chunk_sectors << 9) / PAGE_SIZE;
- if (mddev->queue->backing_dev_info.ra_pages < 2* stripe)
- mddev->queue->backing_dev_info.ra_pages = 2* stripe;
+ if (mddev->queue->backing_dev_info->ra_pages < 2* stripe)
+ mddev->queue->backing_dev_info->ra_pages = 2* stripe;
}
dump_zones(mddev);
diff --git a/drivers/md/raid1.c b/drivers/md/raid1.c
index 81a7875..208fbf7 100644
--- a/drivers/md/raid1.c
+++ b/drivers/md/raid1.c
@@ -717,9 +717,9 @@
* non-congested targets, it can be removed
*/
if ((bits & (1 << WB_async_congested)) || 1)
- ret |= bdi_congested(&q->backing_dev_info, bits);
+ ret |= bdi_congested(q->backing_dev_info, bits);
else
- ret &= bdi_congested(&q->backing_dev_info, bits);
+ ret &= bdi_congested(q->backing_dev_info, bits);
}
}
rcu_read_unlock();
diff --git a/drivers/md/raid10.c b/drivers/md/raid10.c
index b19b551..8d40238 100644
--- a/drivers/md/raid10.c
+++ b/drivers/md/raid10.c
@@ -833,7 +833,7 @@
if (rdev && !test_bit(Faulty, &rdev->flags)) {
struct request_queue *q = bdev_get_queue(rdev->bdev);
- ret |= bdi_congested(&q->backing_dev_info, bits);
+ ret |= bdi_congested(q->backing_dev_info, bits);
}
}
rcu_read_unlock();
@@ -3754,8 +3754,8 @@
* maybe...
*/
stripe /= conf->geo.near_copies;
- if (mddev->queue->backing_dev_info.ra_pages < 2 * stripe)
- mddev->queue->backing_dev_info.ra_pages = 2 * stripe;
+ if (mddev->queue->backing_dev_info->ra_pages < 2 * stripe)
+ mddev->queue->backing_dev_info->ra_pages = 2 * stripe;
}
if (md_integrity_register(mddev))
@@ -4557,8 +4557,8 @@
int stripe = conf->geo.raid_disks *
((conf->mddev->chunk_sectors << 9) / PAGE_SIZE);
stripe /= conf->geo.near_copies;
- if (conf->mddev->queue->backing_dev_info.ra_pages < 2 * stripe)
- conf->mddev->queue->backing_dev_info.ra_pages = 2 * stripe;
+ if (conf->mddev->queue->backing_dev_info->ra_pages < 2 * stripe)
+ conf->mddev->queue->backing_dev_info->ra_pages = 2 * stripe;
}
conf->fullsync = 0;
}
diff --git a/drivers/md/raid5.c b/drivers/md/raid5.c
index 475a7a1..90d863e 100644
--- a/drivers/md/raid5.c
+++ b/drivers/md/raid5.c
@@ -6155,10 +6155,10 @@
mddev_suspend(mddev);
conf->skip_copy = new;
if (new)
- mddev->queue->backing_dev_info.capabilities |=
+ mddev->queue->backing_dev_info->capabilities |=
BDI_CAP_STABLE_WRITES;
else
- mddev->queue->backing_dev_info.capabilities &=
+ mddev->queue->backing_dev_info->capabilities &=
~BDI_CAP_STABLE_WRITES;
mddev_resume(mddev);
}
@@ -6984,8 +6984,8 @@
int data_disks = conf->previous_raid_disks - conf->max_degraded;
int stripe = data_disks *
((mddev->chunk_sectors << 9) / PAGE_SIZE);
- if (mddev->queue->backing_dev_info.ra_pages < 2 * stripe)
- mddev->queue->backing_dev_info.ra_pages = 2 * stripe;
+ if (mddev->queue->backing_dev_info->ra_pages < 2 * stripe)
+ mddev->queue->backing_dev_info->ra_pages = 2 * stripe;
chunk_size = mddev->chunk_sectors << 9;
blk_queue_io_min(mddev->queue, chunk_size);
@@ -7591,8 +7591,8 @@
int data_disks = conf->raid_disks - conf->max_degraded;
int stripe = data_disks * ((conf->chunk_sectors << 9)
/ PAGE_SIZE);
- if (conf->mddev->queue->backing_dev_info.ra_pages < 2 * stripe)
- conf->mddev->queue->backing_dev_info.ra_pages = 2 * stripe;
+ if (conf->mddev->queue->backing_dev_info->ra_pages < 2 * stripe)
+ conf->mddev->queue->backing_dev_info->ra_pages = 2 * stripe;
}
}
}
diff --git a/drivers/media/platform/msm/camera/cam_core/cam_hw_mgr_intf.h b/drivers/media/platform/msm/camera/cam_core/cam_hw_mgr_intf.h
index a90b3d9..cf1859c 100644
--- a/drivers/media/platform/msm/camera/cam_core/cam_hw_mgr_intf.h
+++ b/drivers/media/platform/msm/camera/cam_core/cam_hw_mgr_intf.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -123,10 +123,12 @@
* struct cam_hw_stop_args - Payload for stop command
*
* @ctxt_to_hw_map: HW context from the acquire
+ * @args: Arguments to pass for stop
*
*/
struct cam_hw_stop_args {
void *ctxt_to_hw_map;
+ void *args;
};
/**
diff --git a/drivers/media/platform/msm/camera/cam_cpas/cam_cpas_soc.c b/drivers/media/platform/msm/camera/cam_cpas/cam_cpas_soc.c
index b18af0a..2837f5b 100644
--- a/drivers/media/platform/msm/camera/cam_cpas/cam_cpas_soc.c
+++ b/drivers/media/platform/msm/camera/cam_cpas/cam_cpas_soc.c
@@ -140,6 +140,7 @@
irq_handler_t irq_handler, void *irq_data)
{
int rc = 0;
+ struct cam_cpas_private_soc *soc_private;
rc = cam_soc_util_get_dt_properties(soc_info);
if (rc) {
@@ -173,6 +174,12 @@
goto free_soc_private;
}
+ soc_private = soc_info->soc_private;
+ soc_private->soc_id = cam_soc_util_get_soc_id();
+ soc_private->hw_rev = cam_soc_util_get_hw_revision_node(soc_info);
+ CAM_DBG(CAM_CPAS, "soc id %d hw_rev %d",
+ soc_private->soc_id, soc_private->hw_rev);
+
return rc;
free_soc_private:
diff --git a/drivers/media/platform/msm/camera/cam_cpas/cam_cpas_soc.h b/drivers/media/platform/msm/camera/cam_cpas/cam_cpas_soc.h
index fe0187e..a93c063 100644
--- a/drivers/media/platform/msm/camera/cam_cpas/cam_cpas_soc.h
+++ b/drivers/media/platform/msm/camera/cam_cpas/cam_cpas_soc.h
@@ -17,7 +17,6 @@
#include "cam_cpas_hw.h"
#define CAM_REGULATOR_LEVEL_MAX 16
-
/**
* struct cam_cpas_vdd_ahb_mapping : Voltage to ahb level mapping
*
@@ -42,7 +41,8 @@
* @axi_port_list_node : Node representing AXI Ports list
* @num_vdd_ahb_mapping : Number of vdd to ahb level mapping supported
* @vdd_ahb : AHB level mapping info for the supported vdd levels
- *
+ * @soc_id : SOC id
+ * @hw_rev : Camera hw revision
*/
struct cam_cpas_private_soc {
const char *arch_compat;
@@ -54,6 +54,8 @@
struct device_node *axi_port_list_node;
uint32_t num_vdd_ahb_mapping;
struct cam_cpas_vdd_ahb_mapping vdd_ahb[CAM_REGULATOR_LEVEL_MAX];
+ uint32_t soc_id;
+ uint32_t hw_rev;
};
int cam_cpas_soc_init_resources(struct cam_hw_soc_info *soc_info,
diff --git a/drivers/media/platform/msm/camera/cam_cpas/cpas_top/cam_cpastop_hw.c b/drivers/media/platform/msm/camera/cam_cpas/cpas_top/cam_cpastop_hw.c
index 0533ed8..8d08079 100644
--- a/drivers/media/platform/msm/camera/cam_cpas/cpas_top/cam_cpastop_hw.c
+++ b/drivers/media/platform/msm/camera/cam_cpas/cpas_top/cam_cpastop_hw.c
@@ -114,6 +114,15 @@
return -EINVAL;
}
+ rc = cam_common_util_get_string_index(soc_info->mem_block_name,
+ soc_info->num_mem_block, "core_top_csr_tcsr", &index);
+ if ((rc == 0) && (index < num_reg_map)) {
+ regbase_index[CAM_CPAS_REG_CSR_TCSR] = index;
+ } else {
+ CAM_DBG(CAM_CPAS, "regbase not found for CAMNOC, rc=%d, %d %d",
+ rc, index, num_reg_map);
+ }
+
return 0;
}
@@ -456,6 +465,9 @@
static int cam_cpastop_poweron(struct cam_hw_info *cpas_hw)
{
int i;
+ struct cam_hw_soc_info *soc_info = &cpas_hw->soc_info;
+ struct cam_cpas *cpas_core = (struct cam_cpas *) cpas_hw->core_info;
+ struct cam_cpas_private_soc *soc_private = soc_info->soc_private;
cam_cpastop_reset_irq(cpas_hw);
@@ -478,6 +490,29 @@
}
}
+ if ((soc_private && soc_private->soc_id == SDM670_SOC_ID) &&
+ (soc_private->hw_rev == SDM670_V1_1)) {
+
+ struct cam_cpas_reg *reg_info;
+ int tcsr_index;
+ void __iomem *mem_base;
+
+ reg_info = &camnoc_info->errata_wa_list->tcsr_reg.
+ tcsr_conn_box_spare_0;
+ tcsr_index = cpas_core->regbase_index[CAM_CPAS_REG_CSR_TCSR];
+ if (tcsr_index == -1) {
+ CAM_DBG(CAM_CPAS, "index in not initialized");
+ return 0;
+ }
+ mem_base = soc_info->reg_map[tcsr_index].mem_base;
+
+ reg_info->value = TCSR_CONN_SET;
+ cam_io_w_mb(reg_info->value, mem_base + reg_info->offset);
+ CAM_DBG(CAM_CPAS, "tcsr(0x%lx) value %d",
+ (unsigned long int)mem_base + reg_info->offset,
+ cam_io_r_mb(mem_base + reg_info->offset));
+ }
+
return 0;
}
@@ -489,6 +524,8 @@
int rc = 0;
struct cam_cpas_hw_errata_wa_list *errata_wa_list =
camnoc_info->errata_wa_list;
+ struct cam_cpas_private_soc *soc_private =
+ cpas_hw->soc_info.soc_private;
if (!errata_wa_list)
return 0;
@@ -512,6 +549,28 @@
}
}
+ if ((soc_private && soc_private->soc_id == SDM670_SOC_ID) &&
+ (soc_private->hw_rev == SDM670_V1_1)) {
+
+ struct cam_cpas_reg *reg_info;
+ int tcsr_index;
+ void __iomem *mem_base;
+
+ reg_info = &camnoc_info->errata_wa_list->tcsr_reg.
+ tcsr_conn_box_spare_0;
+ reg_info->value = TCSR_CONN_RESET;
+ tcsr_index = cpas_core->regbase_index[CAM_CPAS_REG_CSR_TCSR];
+ if (tcsr_index == -1) {
+ CAM_DBG(CAM_CPAS, "index in not initialized");
+ return 0;
+ }
+ mem_base = soc_info->reg_map[tcsr_index].mem_base;
+ cam_io_w_mb(reg_info->value, mem_base + reg_info->offset);
+ CAM_DBG(CAM_CPAS, "tcsr(0x%lx) value %d",
+ (unsigned long int)mem_base + reg_info->offset,
+ cam_io_r_mb(mem_base + reg_info->offset));
+ }
+
return rc;
}
diff --git a/drivers/media/platform/msm/camera/cam_cpas/cpas_top/cam_cpastop_hw.h b/drivers/media/platform/msm/camera/cam_cpas/cpas_top/cam_cpastop_hw.h
index 73f7e9b..080f6e6 100644
--- a/drivers/media/platform/msm/camera/cam_cpas/cpas_top/cam_cpastop_hw.h
+++ b/drivers/media/platform/msm/camera/cam_cpas/cpas_top/cam_cpastop_hw.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -162,14 +162,27 @@
};
/**
+ * struct cam_camnoc_tcsr_regs : Top control Status register
+ *
+ * @tcsr_conn_box_spare_0: spare register to select PriorityLvl
+ * for IFE0 and IFE1 (HW workaround for SDM670 1.1)
+ *
+ */
+struct cam_camnoc_tcsr_regs {
+ struct cam_cpas_reg tcsr_conn_box_spare_0;
+};
+
+/**
* struct cam_cpas_hw_errata_wa_list : List of HW Errata workaround info
*
* @camnoc_flush_slave_pending_trans: Errata workaround info for flushing
* camnoc slave pending transactions before turning off CPAS_TOP gdsc
+ * @tcsr_reg: HW workaround to select PriorityLvl for IFE0 and IFE(SDM670_1.1)
*
*/
struct cam_cpas_hw_errata_wa_list {
struct cam_cpas_hw_errata_wa camnoc_flush_slave_pending_trans;
+ struct cam_camnoc_tcsr_regs tcsr_reg;
};
/**
@@ -200,6 +213,7 @@
uint32_t errlog3_high;
};
+
/**
* struct cam_camnoc_info : Overall CAMNOC settings info
*
@@ -210,7 +224,6 @@
* @irq_err_size: Array size of IRQ Error settings
* @err_logger: Pointer to CAMNOC IRQ Error logger read registers
* @errata_wa_list: HW Errata workaround info
- *
*/
struct cam_camnoc_info {
struct cam_camnoc_specific *specific;
diff --git a/drivers/media/platform/msm/camera/cam_cpas/cpas_top/cpastop_v170_110.h b/drivers/media/platform/msm/camera/cam_cpas/cpas_top/cpastop_v170_110.h
index 3c572f0..0c7c799 100644
--- a/drivers/media/platform/msm/camera/cam_cpas/cpas_top/cpastop_v170_110.h
+++ b/drivers/media/platform/msm/camera/cam_cpas/cpas_top/cpastop_v170_110.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -14,6 +14,8 @@
#define _CPASTOP_V170_110_H_
#define TEST_IRQ_ENABLE 0
+#define TCSR_CONN_RESET 0x0
+#define TCSR_CONN_SET 0x3
static struct cam_camnoc_irq_sbm cam_cpas110_irq_sbm = {
.sbm_enable = {
@@ -265,7 +267,7 @@
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x434, /* SPECIFIC_IFE02_PRIORITYLUT_HIGH */
- .value = 0x66665555,
+ .value = 0x66666666,
},
.urgency = {
.enable = true,
@@ -313,7 +315,7 @@
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x834, /* SPECIFIC_IFE13_PRIORITYLUT_HIGH */
- .value = 0x66665555,
+ .value = 0x66666666,
},
.urgency = {
.enable = true,
@@ -528,6 +530,14 @@
.value = 0, /* expected to be 0 */
},
},
+ .tcsr_reg = {
+ .tcsr_conn_box_spare_0 = {
+ .enable = true,
+ .access_type = CAM_REG_TYPE_READ_WRITE,
+ .masked_value = 0,
+ .offset = 0xB3E4,
+ },
+ },
};
static struct cam_camnoc_info cam170_cpas110_camnoc_info = {
diff --git a/drivers/media/platform/msm/camera/cam_cpas/include/cam_cpas_api.h b/drivers/media/platform/msm/camera/cam_cpas/include/cam_cpas_api.h
index c844ef7..d1492fe 100644
--- a/drivers/media/platform/msm/camera/cam_cpas/include/cam_cpas_api.h
+++ b/drivers/media/platform/msm/camera/cam_cpas/include/cam_cpas_api.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -32,6 +32,7 @@
enum cam_cpas_reg_base {
CAM_CPAS_REG_CPASTOP,
CAM_CPAS_REG_CAMNOC,
+ CAM_CPAS_REG_CSR_TCSR,
CAM_CPAS_REG_CAMSS,
CAM_CPAS_REG_MAX
};
diff --git a/drivers/media/platform/msm/camera/cam_fd/fd_hw_mgr/fd_hw/cam_fd_hw_core.c b/drivers/media/platform/msm/camera/cam_fd/fd_hw_mgr/fd_hw/cam_fd_hw_core.c
index 640c6f6..4d74dec 100644
--- a/drivers/media/platform/msm/camera/cam_fd/fd_hw_mgr/fd_hw/cam_fd_hw_core.c
+++ b/drivers/media/platform/msm/camera/cam_fd/fd_hw_mgr/fd_hw/cam_fd_hw_core.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -1092,6 +1092,7 @@
CAM_ERR(CAM_FD, "Release cdm handle failed, handle=0x%x, rc=%d",
ctx_hw_private->cdm_handle, rc);
+ kfree(ctx_hw_private->cdm_cmd);
kfree(ctx_hw_private);
release_args->ctx_hw_private = NULL;
diff --git a/drivers/media/platform/msm/camera/cam_fd/fd_hw_mgr/fd_hw/cam_fd_hw_dev.c b/drivers/media/platform/msm/camera/cam_fd/fd_hw_mgr/fd_hw/cam_fd_hw_dev.c
index 803da76..6d9d330 100644
--- a/drivers/media/platform/msm/camera/cam_fd/fd_hw_mgr/fd_hw/cam_fd_hw_dev.c
+++ b/drivers/media/platform/msm/camera/cam_fd/fd_hw_mgr/fd_hw/cam_fd_hw_dev.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -22,6 +22,7 @@
#include "cam_fd_hw_core.h"
#include "cam_fd_hw_soc.h"
#include "cam_fd_hw_v41.h"
+#include "cam_fd_hw_v501.h"
static int cam_fd_hw_dev_probe(struct platform_device *pdev)
{
@@ -193,6 +194,10 @@
.compatible = "qcom,fd41",
.data = &cam_fd_wrapper120_core410_info,
},
+ {
+ .compatible = "qcom,fd501",
+ .data = &cam_fd_wrapper200_core501_info,
+ },
{}
};
MODULE_DEVICE_TABLE(of, cam_fd_hw_dt_match);
diff --git a/drivers/media/platform/msm/camera/cam_fd/fd_hw_mgr/fd_hw/cam_fd_hw_v41.h b/drivers/media/platform/msm/camera/cam_fd/fd_hw_mgr/fd_hw/cam_fd_hw_v41.h
index 70448bb..78257a5 100644
--- a/drivers/media/platform/msm/camera/cam_fd/fd_hw_mgr/fd_hw/cam_fd_hw_v41.h
+++ b/drivers/media/platform/msm/camera/cam_fd/fd_hw_mgr/fd_hw/cam_fd_hw_v41.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -63,7 +63,7 @@
CAM_FD_IRQ_TO_MASK(CAM_FD_IRQ_RESET_DONE),
.qos_priority = 4,
.qos_priority_level = 4,
- .supported_modes = CAM_FD_MODE_FACEDETECTION | CAM_FD_MODE_PYRAMID,
+ .supported_modes = CAM_FD_MODE_FACEDETECTION,
.ro_mode_supported = true,
};
diff --git a/drivers/media/platform/msm/camera/cam_fd/fd_hw_mgr/fd_hw/cam_fd_hw_v501.h b/drivers/media/platform/msm/camera/cam_fd/fd_hw_mgr/fd_hw/cam_fd_hw_v501.h
new file mode 100644
index 0000000..44b9ab5
--- /dev/null
+++ b/drivers/media/platform/msm/camera/cam_fd/fd_hw_mgr/fd_hw/cam_fd_hw_v501.h
@@ -0,0 +1,70 @@
+/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _CAM_FD_HW_V501_H_
+#define _CAM_FD_HW_V501_H_
+
+static struct cam_fd_hw_static_info cam_fd_wrapper200_core501_info = {
+ .core_version = {
+ .major = 5,
+ .minor = 0,
+ .incr = 1,
+ },
+ .wrapper_version = {
+ .major = 2,
+ .minor = 0,
+ .incr = 0,
+ },
+ .core_regs = {
+ .version = 0x38,
+ .control = 0x0,
+ .result_cnt = 0x4,
+ .result_addr = 0x20,
+ .image_addr = 0x24,
+ .work_addr = 0x28,
+ .ro_mode = 0x34,
+ .results_reg_base = 0x400,
+ .raw_results_reg_base = 0x800,
+ },
+ .wrapper_regs = {
+ .wrapper_version = 0x0,
+ .cgc_disable = 0x4,
+ .hw_stop = 0x8,
+ .sw_reset = 0x10,
+ .vbif_req_priority = 0x20,
+ .vbif_priority_level = 0x24,
+ .vbif_done_status = 0x34,
+ .irq_mask = 0x50,
+ .irq_status = 0x54,
+ .irq_clear = 0x58,
+ },
+ .results = {
+ .max_faces = 35,
+ .per_face_entries = 4,
+ .raw_results_available = true,
+ .raw_results_entries = 512,
+ },
+ .enable_errata_wa = {
+ .single_irq_only = true,
+ .ro_mode_enable_always = true,
+ .ro_mode_results_invalid = true,
+ },
+ .irq_mask = CAM_FD_IRQ_TO_MASK(CAM_FD_IRQ_FRAME_DONE) |
+ CAM_FD_IRQ_TO_MASK(CAM_FD_IRQ_HALT_DONE) |
+ CAM_FD_IRQ_TO_MASK(CAM_FD_IRQ_RESET_DONE),
+ .qos_priority = 4,
+ .qos_priority_level = 4,
+ .supported_modes = CAM_FD_MODE_FACEDETECTION | CAM_FD_MODE_PYRAMID,
+ .ro_mode_supported = true,
+};
+
+#endif /* _CAM_FD_HW_V501_H_ */
diff --git a/drivers/media/platform/msm/camera/cam_icp/icp_hw/a5_hw/a5_core.c b/drivers/media/platform/msm/camera/cam_icp/icp_hw/a5_hw/a5_core.c
index aeec16c..4b5f22e 100644
--- a/drivers/media/platform/msm/camera/cam_icp/icp_hw/a5_hw/a5_core.c
+++ b/drivers/media/platform/msm/camera/cam_icp/icp_hw/a5_hw/a5_core.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -207,37 +207,38 @@
if (!core_info->fw_elf) {
CAM_ERR(CAM_ICP, "Invalid elf size");
- return -EINVAL;
+ rc = -EINVAL;
+ goto fw_download_failed;
}
fw_start = core_info->fw_elf->data;
rc = cam_icp_validate_fw(fw_start);
if (rc) {
CAM_ERR(CAM_ICP, "fw elf validation failed");
- return -EINVAL;
+ goto fw_download_failed;
}
rc = cam_icp_get_fw_size(fw_start, &fw_size);
if (rc) {
CAM_ERR(CAM_ICP, "unable to get fw size");
- return rc;
+ goto fw_download_failed;
}
if (core_info->fw_buf_len < fw_size) {
CAM_ERR(CAM_ICP, "mismatch in fw size: %u %llu",
fw_size, core_info->fw_buf_len);
- goto fw_alloc_failed;
+ rc = -EINVAL;
+ goto fw_download_failed;
}
rc = cam_icp_program_fw(fw_start, core_info);
if (rc) {
CAM_ERR(CAM_ICP, "fw program is failed");
- goto fw_program_failed;
+ goto fw_download_failed;
}
- return 0;
-fw_program_failed:
-fw_alloc_failed:
+fw_download_failed:
+ release_firmware(core_info->fw_elf);
return rc;
}
@@ -387,7 +388,6 @@
switch (cmd_type) {
case CAM_ICP_A5_CMD_FW_DOWNLOAD:
rc = cam_a5_download_fw(device_priv);
-
break;
case CAM_ICP_A5_CMD_SET_FW_BUF: {
struct cam_icp_a5_set_fw_buf_info *fw_buf_info = cmd_args;
diff --git a/drivers/media/platform/msm/camera/cam_icp/icp_hw/icp_hw_mgr/cam_icp_hw_mgr.c b/drivers/media/platform/msm/camera/cam_icp/icp_hw/icp_hw_mgr/cam_icp_hw_mgr.c
index 1550a48..7be00ab 100644
--- a/drivers/media/platform/msm/camera/cam_icp/icp_hw/icp_hw_mgr/cam_icp_hw_mgr.c
+++ b/drivers/media/platform/msm/camera/cam_icp/icp_hw/icp_hw_mgr/cam_icp_hw_mgr.c
@@ -271,7 +271,7 @@
for (i = 0; i < CAM_ICP_CTX_MAX; i++) {
ctx_data = &hw_mgr->ctx_data[i];
mutex_lock(&ctx_data->ctx_mutex);
- if ((ctx_data->state != CAM_ICP_CTX_STATE_FREE) &&
+ if ((ctx_data->state == CAM_ICP_CTX_STATE_ACQUIRED) &&
(ICP_DEV_TYPE_TO_CLK_TYPE(ctx_data->
icp_dev_acquire_info->dev_type) == clk_info->hw_type))
cam_icp_ctx_clk_info_init(ctx_data);
@@ -408,7 +408,7 @@
struct cam_req_mgr_timer *timer = (struct cam_req_mgr_timer *)data;
spin_lock_irqsave(&icp_hw_mgr.hw_mgr_lock, flags);
- task = cam_req_mgr_workq_get_task(icp_hw_mgr.msg_work);
+ task = cam_req_mgr_workq_get_task(icp_hw_mgr.timer_work);
if (!task) {
CAM_ERR(CAM_ICP, "no empty task");
spin_unlock_irqrestore(&icp_hw_mgr.hw_mgr_lock, flags);
@@ -432,7 +432,7 @@
struct cam_req_mgr_timer *timer = (struct cam_req_mgr_timer *)data;
spin_lock_irqsave(&icp_hw_mgr.hw_mgr_lock, flags);
- task = cam_req_mgr_workq_get_task(icp_hw_mgr.msg_work);
+ task = cam_req_mgr_workq_get_task(icp_hw_mgr.timer_work);
if (!task) {
CAM_ERR(CAM_ICP, "no empty task");
spin_unlock_irqrestore(&icp_hw_mgr.hw_mgr_lock, flags);
@@ -473,7 +473,7 @@
int rc = 0;
rc = crm_timer_init(&ctx_data->watch_dog,
- 2000, ctx_data, &cam_icp_ctx_timer_cb);
+ 200, ctx_data, &cam_icp_ctx_timer_cb);
if (rc)
CAM_ERR(CAM_ICP, "Failed to start timer");
@@ -1314,32 +1314,6 @@
return rc;
}
-static int cam_icp_mgr_process_cmd_and_free_mem(void *priv, void *data)
-{
- int rc;
- struct hfi_cmd_work_data *task_data = NULL;
- struct cam_icp_hw_mgr *hw_mgr;
-
- if (!data || !priv) {
- CAM_ERR(CAM_ICP, "Invalid params%pK %pK", data, priv);
- return -EINVAL;
- }
-
- hw_mgr = priv;
- task_data = (struct hfi_cmd_work_data *)data;
-
- if (!task_data->data) {
- CAM_ERR(CAM_ICP, "Invalid data");
- return -EINVAL;
- }
-
- rc = hfi_write_cmd(task_data->data);
-
- kfree(task_data->data);
- task_data->data = NULL;
- return rc;
-}
-
static int cam_icp_mgr_process_cmd(void *priv, void *data)
{
int rc;
@@ -2214,14 +2188,13 @@
task_data->data = (void *)abort_cmd;
task_data->request_id = 0;
task_data->type = ICP_WORKQ_TASK_CMD_TYPE;
- task->process_cb = cam_icp_mgr_process_cmd_and_free_mem;
+ task->process_cb = cam_icp_mgr_process_cmd;
rc = cam_req_mgr_workq_enqueue_task(task, &icp_hw_mgr,
CRM_TASK_PRIORITY_0);
if (rc) {
kfree(abort_cmd);
return rc;
}
- CAM_DBG(CAM_ICP, "payload data = %pK", task_data->data);
CAM_DBG(CAM_ICP, "fw_handle = %x ctx_data = %pK",
ctx_data->fw_handle, ctx_data);
rem_jiffies = wait_for_completion_timeout(&ctx_data->wait_complete,
@@ -2278,14 +2251,13 @@
task_data->data = (void *)destroy_cmd;
task_data->request_id = 0;
task_data->type = ICP_WORKQ_TASK_CMD_TYPE;
- task->process_cb = cam_icp_mgr_process_cmd_and_free_mem;
+ task->process_cb = cam_icp_mgr_process_cmd;
rc = cam_req_mgr_workq_enqueue_task(task, &icp_hw_mgr,
CRM_TASK_PRIORITY_0);
if (rc) {
kfree(destroy_cmd);
return rc;
}
- CAM_DBG(CAM_ICP, "payload data = %pK", task_data->data);
CAM_DBG(CAM_ICP, "fw_handle = %x ctx_data = %pK",
ctx_data->fw_handle, ctx_data);
rem_jiffies = wait_for_completion_timeout(&ctx_data->wait_complete,
@@ -2862,8 +2834,23 @@
packet->header.op_code & 0xff);
return -EINVAL;
}
- CAM_DBG(CAM_ICP, "number of cmd/patch info: %u %u",
- packet->num_cmd_buf, packet->num_patches);
+
+ if (packet->num_io_configs > IPE_IO_IMAGES_MAX) {
+ CAM_ERR(CAM_ICP, "Invalid number of io configs: %d %d",
+ IPE_IO_IMAGES_MAX, packet->num_io_configs);
+ return -EINVAL;
+ }
+
+ if (packet->num_cmd_buf > CAM_ICP_CTX_MAX_CMD_BUFFERS) {
+ CAM_ERR(CAM_ICP, "Invalid number of cmd buffers: %d %d",
+ CAM_ICP_CTX_MAX_CMD_BUFFERS, packet->num_cmd_buf);
+ return -EINVAL;
+ }
+
+ CAM_DBG(CAM_ICP, "number of cmd/patch info: %u %u %u %u",
+ packet->num_cmd_buf,
+ packet->num_io_configs, IPE_IO_IMAGES_MAX,
+ packet->num_patches);
return 0;
}
@@ -3560,7 +3547,7 @@
static int cam_icp_mgr_send_ping(struct cam_icp_hw_ctx_data *ctx_data)
{
- struct hfi_cmd_ping_pkt *ping_pkt;
+ struct hfi_cmd_ping_pkt ping_pkt;
struct hfi_cmd_work_data *task_data;
unsigned long rem_jiffies;
int timeout = 5000;
@@ -3573,28 +3560,20 @@
return -ENOMEM;
}
- ping_pkt = kzalloc(sizeof(struct hfi_cmd_ping_pkt), GFP_KERNEL);
- if (!ping_pkt) {
- rc = -ENOMEM;
- return rc;
- }
- ping_pkt->size = sizeof(struct hfi_cmd_ping_pkt);
- ping_pkt->pkt_type = HFI_CMD_SYS_PING;
- ping_pkt->user_data = (uint64_t)ctx_data;
+ ping_pkt.size = sizeof(struct hfi_cmd_ping_pkt);
+ ping_pkt.pkt_type = HFI_CMD_SYS_PING;
+ ping_pkt.user_data = (uint64_t)ctx_data;
init_completion(&ctx_data->wait_complete);
task_data = (struct hfi_cmd_work_data *)task->payload;
- task_data->data = (void *)ping_pkt;
+ task_data->data = (void *)&ping_pkt;
task_data->request_id = 0;
task_data->type = ICP_WORKQ_TASK_CMD_TYPE;
- task->process_cb = cam_icp_mgr_process_cmd_and_free_mem;
+ task->process_cb = cam_icp_mgr_process_cmd;
rc = cam_req_mgr_workq_enqueue_task(task, &icp_hw_mgr,
CRM_TASK_PRIORITY_0);
- if (rc) {
- kfree(ping_pkt);
+ if (rc)
return rc;
- }
- CAM_DBG(CAM_ICP, "payload data = %pK", task_data->data);
rem_jiffies = wait_for_completion_timeout(&ctx_data->wait_complete,
msecs_to_jiffies((timeout)));
@@ -3772,10 +3751,6 @@
}
}
- if (!hw_mgr->bps_ctxt_cnt || !hw_mgr->ipe_ctxt_cnt)
- cam_icp_device_timer_start(hw_mgr);
-
- cam_icp_ctx_timer_start(ctx_data);
rc = cam_icp_mgr_ipe_bps_resume(hw_mgr, ctx_data);
if (rc) {
@@ -3827,6 +3802,11 @@
(unsigned int)icp_dev_acquire_info->scratch_mem_size,
(unsigned int)ctx_data->fw_handle);
mutex_lock(&hw_mgr->hw_mgr_mutex);
+ /* Start device timer*/
+ if (((hw_mgr->bps_ctxt_cnt == 1) || (hw_mgr->ipe_ctxt_cnt == 1)))
+ cam_icp_device_timer_start(hw_mgr);
+ /* Start context timer*/
+ cam_icp_ctx_timer_start(ctx_data);
hw_mgr->ctxt_cnt++;
mutex_unlock(&hw_mgr->hw_mgr_mutex);
CAM_DBG(CAM_ICP, "Acquire Done");
@@ -3842,7 +3822,6 @@
send_ping_failed:
cam_icp_mgr_ipe_bps_power_collapse(hw_mgr, ctx_data, 0);
ipe_bps_resume_failed:
- cam_icp_ctx_timer_stop(&hw_mgr->ctx_data[ctx_id]);
ubwc_cfg_failed:
if (!hw_mgr->ctxt_cnt)
cam_icp_mgr_icp_power_collapse(hw_mgr);
@@ -4034,17 +4013,24 @@
rc = cam_req_mgr_workq_create("icp_command_queue", ICP_WORKQ_NUM_TASK,
&icp_hw_mgr.cmd_work, CRM_WORKQ_USAGE_NON_IRQ);
if (rc) {
- CAM_ERR(CAM_ICP, "unable to create a worker");
+ CAM_ERR(CAM_ICP, "unable to create a command worker");
goto cmd_work_failed;
}
rc = cam_req_mgr_workq_create("icp_message_queue", ICP_WORKQ_NUM_TASK,
&icp_hw_mgr.msg_work, CRM_WORKQ_USAGE_IRQ);
if (rc) {
- CAM_ERR(CAM_ICP, "unable to create a worker");
+ CAM_ERR(CAM_ICP, "unable to create a message worker");
goto msg_work_failed;
}
+ rc = cam_req_mgr_workq_create("icp_timer_queue", ICP_WORKQ_NUM_TASK,
+ &icp_hw_mgr.timer_work, CRM_WORKQ_USAGE_IRQ);
+ if (rc) {
+ CAM_ERR(CAM_ICP, "unable to create a timer worker");
+ goto timer_work_failed;
+ }
+
icp_hw_mgr.cmd_work_data = (struct hfi_cmd_work_data *)
kzalloc(sizeof(struct hfi_cmd_work_data) * ICP_WORKQ_NUM_TASK,
GFP_KERNEL);
@@ -4057,9 +4043,15 @@
if (!icp_hw_mgr.msg_work_data)
goto msg_work_data_failed;
+ icp_hw_mgr.timer_work_data = (struct hfi_msg_work_data *)
+ kzalloc(sizeof(struct hfi_msg_work_data) * ICP_WORKQ_NUM_TASK,
+ GFP_KERNEL);
+ if (!icp_hw_mgr.timer_work_data)
+ goto timer_work_data_failed;
+
rc = cam_icp_hw_mgr_create_debugfs_entry();
if (rc)
- goto msg_work_data_failed;
+ goto debugfs_create_failed;
for (i = 0; i < ICP_WORKQ_NUM_TASK; i++)
icp_hw_mgr.msg_work->task.pool[i].payload =
@@ -4069,10 +4061,20 @@
icp_hw_mgr.cmd_work->task.pool[i].payload =
&icp_hw_mgr.cmd_work_data[i];
+ for (i = 0; i < ICP_WORKQ_NUM_TASK; i++)
+ icp_hw_mgr.timer_work->task.pool[i].payload =
+ &icp_hw_mgr.timer_work_data[i];
return 0;
+
+debugfs_create_failed:
+ kfree(icp_hw_mgr.timer_work_data);
+timer_work_data_failed:
+ kfree(icp_hw_mgr.msg_work_data);
msg_work_data_failed:
kfree(icp_hw_mgr.cmd_work_data);
cmd_work_data_failed:
+ cam_req_mgr_workq_destroy(&icp_hw_mgr.timer_work);
+timer_work_failed:
cam_req_mgr_workq_destroy(&icp_hw_mgr.msg_work);
msg_work_failed:
cam_req_mgr_workq_destroy(&icp_hw_mgr.cmd_work);
diff --git a/drivers/media/platform/msm/camera/cam_icp/icp_hw/icp_hw_mgr/cam_icp_hw_mgr.h b/drivers/media/platform/msm/camera/cam_icp/icp_hw/icp_hw_mgr/cam_icp_hw_mgr.h
index aac4a5e..cffec2e 100644
--- a/drivers/media/platform/msm/camera/cam_icp/icp_hw/icp_hw_mgr/cam_icp_hw_mgr.h
+++ b/drivers/media/platform/msm/camera/cam_icp/icp_hw/icp_hw_mgr/cam_icp_hw_mgr.h
@@ -68,6 +68,8 @@
#define CAM_ICP_CTX_STATE_ACQUIRED 0x2
#define CAM_ICP_CTX_STATE_RELEASE 0x3
+#define CAM_ICP_CTX_MAX_CMD_BUFFERS 0x2
+
/**
* struct icp_hfi_mem_info
* @qtbl: Memory info of queue table
@@ -253,11 +255,13 @@
* @hfi_mem: Memory for hfi
* @cmd_work: Work queue for hfi commands
* @msg_work: Work queue for hfi messages
+ * @timer_work: Work queue for timer watchdog
* @msg_buf: Buffer for message data from firmware
* @dbg_buf: Buffer for debug data from firmware
* @a5_complete: Completion info
* @cmd_work_data: Pointer to command work queue task
* @msg_work_data: Pointer to message work queue task
+ * @timer_work_data: Pointer to timer work queue task
* @ctxt_cnt: Active context count
* @ipe_ctxt_cnt: IPE Active context count
* @bps_ctxt_cnt: BPS Active context count
@@ -298,11 +302,13 @@
struct icp_hfi_mem_info hfi_mem;
struct cam_req_mgr_core_workq *cmd_work;
struct cam_req_mgr_core_workq *msg_work;
+ struct cam_req_mgr_core_workq *timer_work;
uint32_t msg_buf[ICP_MSG_BUF_SIZE];
uint32_t dbg_buf[ICP_DBG_BUF_SIZE];
struct completion a5_complete;
struct hfi_cmd_work_data *cmd_work_data;
struct hfi_msg_work_data *msg_work_data;
+ struct hfi_msg_work_data *timer_work_data;
uint32_t ctxt_cnt;
uint32_t ipe_ctxt_cnt;
uint32_t bps_ctxt_cnt;
diff --git a/drivers/media/platform/msm/camera/cam_isp/cam_isp_context.c b/drivers/media/platform/msm/camera/cam_isp/cam_isp_context.c
index 6a294b2..fe42f70 100644
--- a/drivers/media/platform/msm/camera/cam_isp/cam_isp_context.c
+++ b/drivers/media/platform/msm/camera/cam_isp/cam_isp_context.c
@@ -1187,7 +1187,9 @@
req_isp->fence_map_out[i].sync_id = -1;
}
}
+ spin_lock_bh(&ctx->lock);
list_add_tail(&req->list, &ctx->free_req_list);
+ spin_unlock_bh(&ctx->lock);
}
if (flush_req->type == CAM_REQ_MGR_FLUSH_TYPE_CANCEL_REQ &&
@@ -2221,7 +2223,7 @@
}
static int __cam_isp_ctx_stop_dev_in_activated_unlock(
- struct cam_context *ctx)
+ struct cam_context *ctx, struct cam_start_stop_dev_cmd *stop_cmd)
{
int rc = 0;
uint32_t i;
@@ -2240,6 +2242,7 @@
/* stop hw first */
if (ctx_isp->hw_ctx) {
stop.ctxt_to_hw_map = ctx_isp->hw_ctx;
+ stop.args = stop_cmd;
ctx->hw_mgr_intf->hw_stop(ctx->hw_mgr_intf->hw_mgr_priv,
&stop);
}
@@ -2288,7 +2291,7 @@
{
int rc = 0;
- __cam_isp_ctx_stop_dev_in_activated_unlock(ctx);
+ __cam_isp_ctx_stop_dev_in_activated_unlock(ctx, cmd);
ctx->state = CAM_CTX_ACQUIRED;
trace_cam_context_state("ISP", ctx);
return rc;
@@ -2299,7 +2302,7 @@
{
int rc = 0;
- rc = __cam_isp_ctx_stop_dev_in_activated_unlock(ctx);
+ rc = __cam_isp_ctx_stop_dev_in_activated_unlock(ctx, NULL);
if (rc)
CAM_ERR(CAM_ISP, "Stop device failed rc=%d", rc);
@@ -2369,7 +2372,8 @@
CAM_WARN(CAM_ISP,
"Received unlink in activated state. It's unexpected");
- rc = __cam_isp_ctx_stop_dev_in_activated_unlock(ctx);
+
+ rc = __cam_isp_ctx_stop_dev_in_activated_unlock(ctx, NULL);
if (rc)
CAM_WARN(CAM_ISP, "Stop device failed rc=%d", rc);
diff --git a/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.c b/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.c
index 8c0c6d3..33dd8eb 100644
--- a/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.c
+++ b/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.c
@@ -1686,6 +1686,7 @@
struct cam_hw_stop_args *stop_args = stop_hw_args;
struct cam_ife_hw_mgr_res *hw_mgr_res;
struct cam_ife_hw_mgr_ctx *ctx;
+ enum cam_ife_csid_halt_cmd csid_halt_type;
uint32_t i, master_base_idx = 0;
if (!hw_mgr_priv || !stop_hw_args) {
@@ -1701,6 +1702,12 @@
CAM_DBG(CAM_ISP, " Enter...ctx id:%d",
ctx->ctx_index);
+ /* Set the csid halt command */
+ if (!stop_args->args)
+ csid_halt_type = CAM_CSID_HALT_IMMEDIATELY;
+ else
+ csid_halt_type = CAM_CSID_HALT_AT_FRAME_BOUNDARY;
+
/* Note:stop resource will remove the irq mask from the hardware */
if (!ctx->num_base) {
@@ -1725,7 +1732,7 @@
/* Stop the master CSID path first */
cam_ife_mgr_csid_stop_hw(ctx, &ctx->res_list_ife_csid,
- master_base_idx, CAM_CSID_HALT_AT_FRAME_BOUNDARY);
+ master_base_idx, csid_halt_type);
/* stop rest of the CSID paths */
for (i = 0; i < ctx->num_base; i++) {
@@ -1733,19 +1740,19 @@
continue;
cam_ife_mgr_csid_stop_hw(ctx, &ctx->res_list_ife_csid,
- ctx->base[i].idx, CAM_CSID_HALT_AT_FRAME_BOUNDARY);
+ ctx->base[i].idx, csid_halt_type);
}
/* Stop the master CIDs first */
cam_ife_mgr_csid_stop_hw(ctx, &ctx->res_list_ife_cid,
- master_base_idx, CAM_CSID_HALT_AT_FRAME_BOUNDARY);
+ master_base_idx, csid_halt_type);
/* stop rest of the CIDs */
for (i = 0; i < ctx->num_base; i++) {
if (i == master_base_idx)
continue;
cam_ife_mgr_csid_stop_hw(ctx, &ctx->res_list_ife_cid,
- ctx->base[i].idx, CAM_CSID_HALT_AT_FRAME_BOUNDARY);
+ ctx->base[i].idx, csid_halt_type);
}
if (cam_cdm_stream_off(ctx->cdm_handle))
diff --git a/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_core.c b/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_core.c
index ff0c91f..1359f78 100644
--- a/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_core.c
+++ b/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_core.c
@@ -1037,16 +1037,23 @@
static int cam_ife_csid_disable_hw(struct cam_ife_csid_hw *csid_hw)
{
- int rc = 0;
+ int rc = -EINVAL;
struct cam_hw_soc_info *soc_info;
struct cam_ife_csid_reg_offset *csid_reg;
+ /* Check for refcount */
+ if (!csid_hw->hw_info->open_count) {
+ CAM_WARN(CAM_ISP, "Unbalanced disable_hw");
+ return rc;
+ }
/* Decrement ref Count */
- if (csid_hw->hw_info->open_count)
- csid_hw->hw_info->open_count--;
- if (csid_hw->hw_info->open_count)
+ csid_hw->hw_info->open_count--;
+
+ if (csid_hw->hw_info->open_count) {
+ rc = 0;
return rc;
+ }
soc_info = &csid_hw->hw_info->soc_info;
csid_reg = csid_hw->csid_info->csid_reg;
@@ -2536,7 +2543,8 @@
/*wait for the path to halt */
for (i = 0; i < csid_stop->num_res; i++) {
res = csid_stop->node_res[i];
- if (csid_stop->stop_cmd == CAM_CSID_HALT_AT_FRAME_BOUNDARY)
+ if (res->res_type == CAM_ISP_RESOURCE_PIX_PATH &&
+ csid_stop->stop_cmd == CAM_CSID_HALT_AT_FRAME_BOUNDARY)
rc = cam_ife_csid_res_wait_for_halt(csid_hw, res);
else
res->res_state = CAM_ISP_RESOURCE_STATE_INIT_HW;
diff --git a/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_top_ver2.c b/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_top_ver2.c
index f4aa5c3..3f843c3 100644
--- a/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_top_ver2.c
+++ b/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_top_ver2.c
@@ -273,7 +273,8 @@
}
if (hw_info->hw_state != CAM_HW_STATE_POWER_UP) {
- CAM_DBG(CAM_ISP, "VFE:%d Not ready to set clocks yet :%d",
+ CAM_ERR_RATE_LIMIT(CAM_ISP,
+ "VFE:%d Not ready to set clocks yet :%d",
res->hw_intf->hw_idx,
hw_info->hw_state);
} else
@@ -321,7 +322,8 @@
}
if (hw_info->hw_state != CAM_HW_STATE_POWER_UP) {
- CAM_DBG(CAM_ISP, "VFE:%d Not ready to set BW yet :%d",
+ CAM_ERR_RATE_LIMIT(CAM_ISP,
+ "VFE:%d Not ready to set BW yet :%d",
res->hw_intf->hw_idx,
hw_info->hw_state);
} else
@@ -364,7 +366,8 @@
}
if (hw_info->hw_state != CAM_HW_STATE_POWER_UP) {
- CAM_DBG(CAM_ISP, "VFE:%d Not ready to set BW yet :%d",
+ CAM_ERR_RATE_LIMIT(CAM_ISP,
+ "VFE:%d Not ready to set BW yet :%d",
res->hw_intf->hw_idx,
hw_info->hw_state);
} else {
@@ -517,6 +520,7 @@
{
struct cam_vfe_top_ver2_priv *top_priv;
struct cam_isp_resource_node *mux_res;
+ struct cam_hw_info *hw_info = NULL;
int rc = 0;
if (!device_priv || !start_args) {
@@ -526,24 +530,33 @@
top_priv = (struct cam_vfe_top_ver2_priv *)device_priv;
mux_res = (struct cam_isp_resource_node *)start_args;
+ hw_info = (struct cam_hw_info *)mux_res->hw_intf->hw_priv;
- rc = cam_vfe_top_set_hw_clk_rate(top_priv);
- if (rc) {
- CAM_ERR(CAM_ISP, "set_hw_clk_rate failed, rc=%d", rc);
- return rc;
- }
+ if (hw_info->hw_state == CAM_HW_STATE_POWER_UP) {
+ rc = cam_vfe_top_set_hw_clk_rate(top_priv);
+ if (rc) {
+ CAM_ERR(CAM_ISP,
+ "set_hw_clk_rate failed, rc=%d", rc);
+ return rc;
+ }
- rc = cam_vfe_top_set_axi_bw_vote(top_priv, true);
- if (rc) {
- CAM_ERR(CAM_ISP, "set_axi_bw_vote failed, rc=%d", rc);
- return rc;
- }
+ rc = cam_vfe_top_set_axi_bw_vote(top_priv, true);
+ if (rc) {
+ CAM_ERR(CAM_ISP,
+ "set_axi_bw_vote failed, rc=%d", rc);
+ return rc;
+ }
- if (mux_res->start) {
- rc = mux_res->start(mux_res);
+ if (mux_res->start) {
+ rc = mux_res->start(mux_res);
+ } else {
+ CAM_ERR(CAM_ISP,
+ "Invalid res id:%d", mux_res->res_id);
+ rc = -EINVAL;
+ }
} else {
- CAM_ERR(CAM_ISP, "Invalid res id:%d", mux_res->res_id);
- rc = -EINVAL;
+ CAM_ERR(CAM_ISP, "VFE HW not powered up");
+ rc = -EPERM;
}
return rc;
@@ -554,6 +567,7 @@
{
struct cam_vfe_top_ver2_priv *top_priv;
struct cam_isp_resource_node *mux_res;
+ struct cam_hw_info *hw_info = NULL;
int i, rc = 0;
if (!device_priv || !stop_args) {
@@ -563,6 +577,7 @@
top_priv = (struct cam_vfe_top_ver2_priv *)device_priv;
mux_res = (struct cam_isp_resource_node *)stop_args;
+ hw_info = (struct cam_hw_info *)mux_res->hw_intf->hw_priv;
if (mux_res->res_id == CAM_ISP_HW_VFE_IN_CAMIF ||
(mux_res->res_id >= CAM_ISP_HW_VFE_IN_RDI0 &&
@@ -585,16 +600,23 @@
}
}
- rc = cam_vfe_top_set_hw_clk_rate(top_priv);
- if (rc) {
- CAM_ERR(CAM_ISP, "set_hw_clk_rate failed, rc=%d", rc);
- return rc;
- }
+ if (hw_info->hw_state == CAM_HW_STATE_POWER_UP) {
+ rc = cam_vfe_top_set_hw_clk_rate(top_priv);
+ if (rc) {
+ CAM_ERR(CAM_ISP,
+ "set_hw_clk_rate failed, rc=%d", rc);
+ return rc;
+ }
- rc = cam_vfe_top_set_axi_bw_vote(top_priv, true);
- if (rc) {
- CAM_ERR(CAM_ISP, "set_axi_bw_vote failed, rc=%d", rc);
- return rc;
+ rc = cam_vfe_top_set_axi_bw_vote(top_priv, true);
+ if (rc) {
+ CAM_ERR(CAM_ISP,
+ "set_axi_bw_vote failed, rc=%d", rc);
+ return rc;
+ }
+ } else {
+ CAM_ERR(CAM_ISP, "VFE HW not powered up");
+ rc = -EPERM;
}
}
diff --git a/drivers/media/platform/msm/camera/cam_jpeg/jpeg_hw/cam_jpeg_hw_mgr.c b/drivers/media/platform/msm/camera/cam_jpeg/jpeg_hw/cam_jpeg_hw_mgr.c
index 6e2e7e9..7bc505f 100644
--- a/drivers/media/platform/msm/camera/cam_jpeg/jpeg_hw/cam_jpeg_hw_mgr.c
+++ b/drivers/media/platform/msm/camera/cam_jpeg/jpeg_hw/cam_jpeg_hw_mgr.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -924,6 +924,7 @@
if (hw_mgr->cdm_info[dev_type][0].ref_cnt == 0) {
mutex_unlock(&hw_mgr->hw_mgr_mutex);
CAM_ERR(CAM_JPEG, "Error Unbalanced deinit");
+ kfree(ctx_data->cdm_cmd);
return -EFAULT;
}
@@ -943,9 +944,12 @@
rc = cam_jpeg_mgr_release_ctx(hw_mgr, ctx_data);
if (rc) {
mutex_unlock(&hw_mgr->hw_mgr_mutex);
+ CAM_ERR(CAM_JPEG, "JPEG release ctx failed");
+ kfree(ctx_data->cdm_cmd);
return -EINVAL;
}
+ kfree(ctx_data->cdm_cmd);
CAM_DBG(CAM_JPEG, "handle %llu", ctx_data);
return rc;
@@ -999,7 +1003,7 @@
sizeof(struct cam_cdm_bl_cmd))), GFP_KERNEL);
if (!ctx_data->cdm_cmd) {
rc = -ENOMEM;
- goto acq_cdm_hdl_failed;
+ goto jpeg_release_ctx;
}
mutex_lock(&ctx_data->ctx_mutex);
@@ -1046,20 +1050,8 @@
hw_mgr->cdm_info[dev_type][0].ref_cnt++;
}
- ctx_data->cdm_cmd_chbase =
- kzalloc(((sizeof(struct cam_cdm_bl_request)) +
- (2 * sizeof(struct cam_cdm_bl_cmd))), GFP_KERNEL);
- if (!ctx_data->cdm_cmd_chbase) {
- rc = -ENOMEM;
- goto start_cdm_hdl_failed;
- }
size = hw_mgr->cdm_info[dev_type][0].
cdm_ops->cdm_required_size_changebase();
- ctx_data->cmd_chbase_buf_addr = kzalloc(size*4, GFP_KERNEL);
- if (!ctx_data->cdm_cmd_chbase) {
- rc = -ENOMEM;
- goto start_cdm_hdl_failed;
- }
if (hw_mgr->cdm_info[dev_type][0].ref_cnt == 1)
if (cam_cdm_stream_on(
@@ -1101,6 +1093,7 @@
hw_mgr->cdm_info[dev_type][0].ref_cnt--;
acq_cdm_hdl_failed:
kfree(ctx_data->cdm_cmd);
+jpeg_release_ctx:
cam_jpeg_mgr_release_ctx(hw_mgr, ctx_data);
mutex_unlock(&hw_mgr->hw_mgr_mutex);
diff --git a/drivers/media/platform/msm/camera/cam_jpeg/jpeg_hw/cam_jpeg_hw_mgr.h b/drivers/media/platform/msm/camera/cam_jpeg/jpeg_hw/cam_jpeg_hw_mgr.h
index dce47d2..5e10167 100644
--- a/drivers/media/platform/msm/camera/cam_jpeg/jpeg_hw/cam_jpeg_hw_mgr.h
+++ b/drivers/media/platform/msm/camera/cam_jpeg/jpeg_hw/cam_jpeg_hw_mgr.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -95,8 +95,6 @@
* @in_use: Flag for context usage
* @wait_complete: Completion info
* @cdm_cmd: Cdm cmd submitted for that context.
- * @cdm_cmd_chbase: Change base cdm command from context
- * @cmd_chbase_buf_addr : Change base cmd buf address
*/
struct cam_jpeg_hw_ctx_data {
void *context_priv;
@@ -106,8 +104,6 @@
bool in_use;
struct completion wait_complete;
struct cam_cdm_bl_request *cdm_cmd;
- struct cam_cdm_bl_request *cdm_cmd_chbase;
- uint32_t *cmd_chbase_buf_addr;
};
/**
diff --git a/drivers/media/platform/msm/camera/cam_sensor_module/cam_csiphy/cam_csiphy_core.c b/drivers/media/platform/msm/camera/cam_sensor_module/cam_csiphy/cam_csiphy_core.c
index 262e49c..4f30f56 100644
--- a/drivers/media/platform/msm/camera/cam_sensor_module/cam_csiphy/cam_csiphy_core.c
+++ b/drivers/media/platform/msm/camera/cam_sensor_module/cam_csiphy/cam_csiphy_core.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -71,9 +71,9 @@
csiphy_reset_reg[i].reg_addr);
usleep_range(csiphy_dev->ctrl_reg->
- csiphy_reset_reg[i].delay * 100,
+ csiphy_reset_reg[i].delay * 1000,
csiphy_dev->ctrl_reg->
- csiphy_reset_reg[i].delay * 100 + 1000);
+ csiphy_reset_reg[i].delay * 1000 + 10);
}
}
@@ -285,6 +285,10 @@
csiphybase +
csiphy_dev->ctrl_reg->
csiphy_common_reg[i].reg_addr);
+ usleep_range(csiphy_dev->ctrl_reg->
+ csiphy_common_reg[i].delay*1000,
+ csiphy_dev->ctrl_reg->
+ csiphy_common_reg[i].delay*1000 + 10);
break;
case CSIPHY_DEFAULT_PARAMS:
cam_io_w_mb(csiphy_dev->ctrl_reg->
@@ -292,6 +296,10 @@
csiphybase +
csiphy_dev->ctrl_reg->
csiphy_common_reg[i].reg_addr);
+ usleep_range(csiphy_dev->ctrl_reg->
+ csiphy_common_reg[i].delay*1000,
+ csiphy_dev->ctrl_reg->
+ csiphy_common_reg[i].delay*1000 + 10);
break;
default:
break;
@@ -506,6 +514,13 @@
bridge_params.media_entity_flag = 0;
bridge_params.priv = csiphy_dev;
+ if (csiphy_acq_params.combo_mode >= 2) {
+ CAM_ERR(CAM_CSIPHY, "Invalid combo_mode %d",
+ csiphy_acq_params.combo_mode);
+ rc = -EINVAL;
+ goto release_mutex;
+ }
+
csiphy_acq_dev.device_handle =
cam_create_device_hdl(&bridge_params);
csiphy_dev->bridge_intf.
diff --git a/drivers/media/platform/msm/camera/cam_sensor_module/cam_csiphy/include/cam_csiphy_1_0_hwreg.h b/drivers/media/platform/msm/camera/cam_sensor_module/cam_csiphy/include/cam_csiphy_1_0_hwreg.h
index 2977834..3f743fc 100644
--- a/drivers/media/platform/msm/camera/cam_sensor_module/cam_csiphy/include/cam_csiphy_1_0_hwreg.h
+++ b/drivers/media/platform/msm/camera/cam_sensor_module/cam_csiphy/include/cam_csiphy_1_0_hwreg.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -19,8 +19,8 @@
.mipi_csiphy_interrupt_status0_addr = 0x8B0,
.mipi_csiphy_interrupt_clear0_addr = 0x858,
.mipi_csiphy_glbl_irq_cmd_addr = 0x828,
- .csiphy_common_array_size = 3,
- .csiphy_reset_array_size = 3,
+ .csiphy_common_array_size = 5,
+ .csiphy_reset_array_size = 5,
.csiphy_2ph_config_array_size = 14,
.csiphy_3ph_config_array_size = 19,
};
@@ -29,12 +29,16 @@
{0x0814, 0x00, 0x00, CSIPHY_LANE_ENABLE},
{0x0818, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x081C, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0800, 0x01, 0x01, CSIPHY_DEFAULT_PARAMS},
+ {0x0800, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
};
struct csiphy_reg_t csiphy_reset_reg_1_0[] = {
- {0x0814, 0x00, 0x50, CSIPHY_LANE_ENABLE},
+ {0x0814, 0x00, 0x05, CSIPHY_LANE_ENABLE},
{0x0818, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x081C, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0800, 0x01, 0x01, CSIPHY_DEFAULT_PARAMS},
+ {0x0800, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
};
struct csiphy_reg_t csiphy_irq_reg_1_0[] = {
@@ -148,7 +152,7 @@
{0x0008, 0x00, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
{0x0010, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0038, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
- {0x0060, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0060, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0064, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
},
{
@@ -164,7 +168,7 @@
{0x070C, 0xA5, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0710, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0738, 0x1F, 0x00, CSIPHY_DEFAULT_PARAMS},
- {0x0760, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0760, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0764, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
},
{
@@ -179,7 +183,7 @@
{0x0208, 0x00, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
{0x0210, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0238, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
- {0x0260, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0260, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0264, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
},
{
@@ -194,7 +198,7 @@
{0x0408, 0x00, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
{0x0410, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0438, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
- {0x0460, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0460, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0464, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
},
{
@@ -210,7 +214,7 @@
{0x060C, 0xA5, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0610, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0638, 0x1F, 0x00, CSIPHY_DEFAULT_PARAMS},
- {0x0660, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0660, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0664, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
},
};
diff --git a/drivers/media/platform/msm/camera/cam_sensor_module/cam_sensor/cam_sensor_core.c b/drivers/media/platform/msm/camera/cam_sensor_module/cam_sensor/cam_sensor_core.c
index d5bb1b0..9e082cd 100644
--- a/drivers/media/platform/msm/camera/cam_sensor_module/cam_sensor/cam_sensor_core.c
+++ b/drivers/media/platform/msm/camera/cam_sensor_module/cam_sensor/cam_sensor_core.c
@@ -714,6 +714,9 @@
}
s_ctrl->sensor_state = CAM_SENSOR_ACQUIRE;
+ CAM_INFO(CAM_SENSOR,
+ "CAM_ACQUIRE_DEV Success, sensor_id:0x%x",
+ s_ctrl->sensordata->slave_info.sensor_id);
}
break;
case CAM_RELEASE_DEV: {
@@ -751,6 +754,9 @@
s_ctrl->bridge_intf.session_hdl = -1;
s_ctrl->sensor_state = CAM_SENSOR_INIT;
+ CAM_INFO(CAM_SENSOR,
+ "CAM_RELEASE_DEV Success, sensor_id:0x%x",
+ s_ctrl->sensordata->slave_info.sensor_id);
}
break;
case CAM_QUERY_CAP: {
@@ -786,6 +792,9 @@
}
}
s_ctrl->sensor_state = CAM_SENSOR_START;
+ CAM_INFO(CAM_SENSOR,
+ "CAM_START_DEV Success, sensor_id:0x%x",
+ s_ctrl->sensordata->slave_info.sensor_id);
}
break;
case CAM_STOP_DEV: {
@@ -809,6 +818,9 @@
cam_sensor_release_resource(s_ctrl);
s_ctrl->sensor_state = CAM_SENSOR_ACQUIRE;
+ CAM_INFO(CAM_SENSOR,
+ "CAM_STOP_DEV Success, sensor_id:0x%x",
+ s_ctrl->sensordata->slave_info.sensor_id);
}
break;
case CAM_CONFIG_DEV: {
diff --git a/drivers/media/platform/msm/camera/cam_sensor_module/cam_sensor_io/cam_sensor_spi.c b/drivers/media/platform/msm/camera/cam_sensor_module/cam_sensor_io/cam_sensor_spi.c
index 131b0ae..07b390b 100644
--- a/drivers/media/platform/msm/camera/cam_sensor_module/cam_sensor_io/cam_sensor_spi.c
+++ b/drivers/media/platform/msm/camera/cam_sensor_module/cam_sensor_io/cam_sensor_spi.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -468,6 +468,63 @@
return rc;
}
+int32_t cam_spi_write_seq(struct camera_io_master *client,
+ uint32_t addr, uint8_t *data,
+ enum camera_sensor_i2c_type addr_type, uint32_t num_byte)
+{
+ struct cam_camera_spi_inst *pg =
+ &client->spi_client->cmd_tbl.page_program;
+ const uint32_t page_size = client->spi_client->page_size;
+ uint8_t header_len = sizeof(pg->opcode) + pg->addr_len + pg->dummy_len;
+ uint16_t len;
+ uint32_t cur_len, end;
+ char *tx, *pdata = data;
+ int rc = -EINVAL;
+
+ if ((addr_type >= CAMERA_SENSOR_I2C_TYPE_MAX) ||
+ (addr_type <= CAMERA_SENSOR_I2C_TYPE_INVALID))
+ return rc;
+ /* single page write */
+ if ((addr % page_size) + num_byte <= page_size) {
+ len = header_len + num_byte;
+ tx = kmalloc(len, GFP_KERNEL | GFP_DMA);
+ if (!tx)
+ goto NOMEM;
+ rc = cam_spi_page_program(client, addr, data, addr_type,
+ num_byte, tx);
+ if (rc < 0)
+ goto ERROR;
+ goto OUT;
+ }
+ /* multi page write */
+ len = header_len + page_size;
+ tx = kmalloc(len, GFP_KERNEL | GFP_DMA);
+ if (!tx)
+ goto NOMEM;
+ while (num_byte) {
+ end = min(page_size, (addr % page_size) + num_byte);
+ cur_len = end - (addr % page_size);
+ CAM_ERR(CAM_SENSOR, "Addr: 0x%x curr_len: 0x%x pgSize: %d",
+ addr, cur_len, page_size);
+ rc = cam_spi_page_program(client, addr, pdata, addr_type,
+ cur_len, tx);
+ if (rc < 0)
+ goto ERROR;
+ addr += cur_len;
+ pdata += cur_len;
+ num_byte -= cur_len;
+ }
+ goto OUT;
+NOMEM:
+ pr_err("%s: memory allocation failed\n", __func__);
+ return -ENOMEM;
+ERROR:
+ pr_err("%s: error write\n", __func__);
+OUT:
+ kfree(tx);
+ return rc;
+}
+
int cam_spi_write_table(struct camera_io_master *client,
struct cam_sensor_i2c_reg_setting *write_setting)
{
@@ -508,3 +565,35 @@
addr_type = client_addr_type;
return rc;
}
+
+int cam_spi_erase(struct camera_io_master *client,
+ uint32_t addr, enum camera_sensor_i2c_type addr_type,
+ uint32_t size) {
+ struct cam_camera_spi_inst *se = &client->spi_client->cmd_tbl.erase;
+ int rc = 0;
+ uint32_t cur;
+ uint32_t end = addr + size;
+ uint32_t erase_size = client->spi_client->erase_size;
+
+ end = addr + size;
+ for (cur = rounddown(addr, erase_size); cur < end; cur += erase_size) {
+ CAM_ERR(CAM_SENSOR, "%s: erasing 0x%x size: %d\n",
+ __func__, cur, erase_size);
+ rc = cam_spi_write_enable(client, addr_type);
+ if (rc < 0)
+ return rc;
+ rc = cam_spi_tx_helper(client, se, cur, NULL, addr_type, 0,
+ NULL, NULL);
+ if (rc < 0) {
+ CAM_ERR(CAM_SENSOR, "%s: erase failed\n", __func__);
+ return rc;
+ }
+ rc = cam_spi_wait(client, se, addr_type);
+ if (rc < 0) {
+ CAM_ERR(CAM_SENSOR, "%s: erase timedout\n", __func__);
+ return rc;
+ }
+ }
+
+ return rc;
+}
diff --git a/drivers/media/platform/msm/camera/cam_sensor_module/cam_sensor_io/cam_sensor_spi.h b/drivers/media/platform/msm/camera/cam_sensor_module/cam_sensor_io/cam_sensor_spi.h
index ec1bede..a63bff2 100644
--- a/drivers/media/platform/msm/camera/cam_sensor_module/cam_sensor_io/cam_sensor_spi.h
+++ b/drivers/media/platform/msm/camera/cam_sensor_module/cam_sensor_io/cam_sensor_spi.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -99,4 +99,12 @@
int cam_spi_write_table(struct camera_io_master *client,
struct cam_sensor_i2c_reg_setting *write_setting);
+int cam_spi_erase(struct camera_io_master *client,
+ uint32_t addr, enum camera_sensor_i2c_type addr_type,
+ uint32_t size);
+
+int32_t cam_spi_write_seq(struct camera_io_master *client,
+ uint32_t addr, uint8_t *data,
+ enum camera_sensor_i2c_type addr_type, uint32_t num_byte);
+
#endif
diff --git a/drivers/media/platform/msm/camera/cam_utils/cam_soc_util.c b/drivers/media/platform/msm/camera/cam_utils/cam_soc_util.c
index 0b1896f..d0a13ab 100644
--- a/drivers/media/platform/msm/camera/cam_utils/cam_soc_util.c
+++ b/drivers/media/platform/msm/camera/cam_utils/cam_soc_util.c
@@ -15,8 +15,62 @@
#include <linux/slab.h>
#include <linux/gpio.h>
#include <linux/of_gpio.h>
+#include <soc/qcom/socinfo.h>
#include "cam_soc_util.h"
#include "cam_debug_util.h"
+#include <linux/nvmem-consumer.h>
+
+uint32_t cam_soc_util_get_soc_id(void)
+{
+ return socinfo_get_id();
+}
+#if defined(CONFIG_NVMEM) && defined(CONFIG_QCOM_QFPROM)
+uint32_t cam_soc_util_get_hw_revision_node(struct cam_hw_soc_info *soc_info)
+{
+ struct nvmem_cell *cell;
+ ssize_t len;
+ uint32_t *buf, hw_rev;
+ struct platform_device *pdev;
+
+ pdev = soc_info->pdev;
+ /* read the soc hw revision and select revision node */
+ cell = nvmem_cell_get(&pdev->dev, "minor_rev");
+ if (IS_ERR_OR_NULL(cell)) {
+ if (PTR_ERR(cell) == -EPROBE_DEFER) {
+ CAM_ERR(CAM_UTIL, "Err to get nvmem cell: ret=%ld",
+ PTR_ERR(cell));
+ return -EINVAL;
+ }
+ CAM_ERR(CAM_UTIL, "No DTS entry");
+ return 0;
+ }
+
+ if (PTR_ERR(cell) == -ENOENT) {
+ CAM_DBG(CAM_UTIL, "nvme cell not found");
+ return 0;
+ }
+
+ buf = nvmem_cell_read(cell, &len);
+ nvmem_cell_put(cell);
+
+ if (IS_ERR_OR_NULL(buf)) {
+ CAM_ERR(CAM_UTIL, "Unable to read nvmem cell: ret=%ld",
+ PTR_ERR(buf));
+ return -EINVAL;
+ }
+
+ CAM_DBG(CAM_UTIL, "hw_rev = %u", *buf);
+ hw_rev = (*buf >> 28) & 0x3;
+ kfree(buf);
+
+ return hw_rev;
+}
+#else
+uint32_t cam_soc_util_get_hw_revision_node(struct cam_hw_soc_info *soc_info)
+{
+ return 0;
+}
+#endif
int cam_soc_util_get_level_from_string(const char *string,
enum cam_vote_level *level)
diff --git a/drivers/media/platform/msm/camera/cam_utils/cam_soc_util.h b/drivers/media/platform/msm/camera/cam_utils/cam_soc_util.h
index 4b57d54..1f2d46d 100644
--- a/drivers/media/platform/msm/camera/cam_utils/cam_soc_util.h
+++ b/drivers/media/platform/msm/camera/cam_utils/cam_soc_util.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -40,6 +40,11 @@
/* maximum number of device clock */
#define CAM_SOC_MAX_CLK 32
+/* soc id */
+#define SDM670_SOC_ID 336
+
+/* Minor Version */
+#define SDM670_V1_1 0x1
/**
* enum cam_vote_level - Enum for voting level
*
@@ -615,5 +620,23 @@
int cam_soc_util_clk_enable_default(struct cam_hw_soc_info *soc_info,
enum cam_vote_level clk_level);
+/**
+ * cam_soc_util_get_soc_id()
+ *
+ * @brief: Read soc id
+ *
+ * @return SOC id
+ */
+uint32_t cam_soc_util_get_soc_id(void);
+/**
+ * cam_soc_util_get_hw_revision_node()
+ *
+ * @brief: Camera HW ID
+ *
+ * @soc_info: Device soc information
+ *
+ * @return HW id
+ */
+uint32_t cam_soc_util_get_hw_revision_node(struct cam_hw_soc_info *soc_info);
#endif /* _CAM_SOC_UTIL_H_ */
diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp_axi_util.c b/drivers/media/platform/msm/camera_v2/isp/msm_isp_axi_util.c
index fab2623f..58bd744 100644
--- a/drivers/media/platform/msm/camera_v2/isp/msm_isp_axi_util.c
+++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp_axi_util.c
@@ -4115,12 +4115,7 @@
return;
}
- if (vfe_dev->vt_enable) {
- msm_isp_get_avtimer_ts(ts);
- time_stamp = &ts->vt_time;
- } else {
- time_stamp = &ts->buf_time;
- }
+ time_stamp = &ts->buf_time;
frame_id = vfe_dev->axi_data.
src_info[SRC_TO_INTF(stream_info->stream_src)].frame_id;
diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.c b/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.c
index 9959f70..643de59 100644
--- a/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.c
+++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.c
@@ -207,15 +207,11 @@
struct timespec ts;
do_gettimeofday(&(time_stamp->event_time));
- if (vfe_dev->vt_enable) {
- msm_isp_get_avtimer_ts(time_stamp);
- time_stamp->buf_time.tv_sec = time_stamp->vt_time.tv_sec;
- time_stamp->buf_time.tv_usec = time_stamp->vt_time.tv_usec;
- } else {
- get_monotonic_boottime(&ts);
- time_stamp->buf_time.tv_sec = ts.tv_sec;
- time_stamp->buf_time.tv_usec = ts.tv_nsec/1000;
- }
+
+ get_monotonic_boottime(&ts);
+ time_stamp->buf_time.tv_sec = ts.tv_sec;
+ time_stamp->buf_time.tv_usec = ts.tv_nsec/1000;
+
}
static inline u32 msm_isp_evt_mask_to_isp_event(u32 evt_mask)
diff --git a/drivers/media/platform/msm/vidc/msm_vidc_clocks.c b/drivers/media/platform/msm/vidc/msm_vidc_clocks.c
index 4be087f..0f74c7c 100644
--- a/drivers/media/platform/msm/vidc/msm_vidc_clocks.c
+++ b/drivers/media/platform/msm/vidc/msm_vidc_clocks.c
@@ -1018,9 +1018,10 @@
rc_mode = msm_comm_g_ctrl_for_id(inst,
V4L2_CID_MPEG_VIDC_VIDEO_RATE_CONTROL);
if (rc_mode == V4L2_CID_MPEG_VIDC_VIDEO_RATE_CONTROL_VBR_VFR ||
- rc_mode ==
- V4L2_CID_MPEG_VIDC_VIDEO_RATE_CONTROL_VBR_CFR)
- pdata.video_work_mode = VIDC_WORK_MODE_2;
+ rc_mode == V4L2_CID_MPEG_VIDC_VIDEO_RATE_CONTROL_VBR_CFR ||
+ rc_mode == V4L2_CID_MPEG_VIDC_VIDEO_RATE_CONTROL_MBR_CFR ||
+ rc_mode == V4L2_CID_MPEG_VIDC_VIDEO_RATE_CONTROL_MBR_VFR)
+ pdata.video_work_mode = VIDC_WORK_MODE_2;
} else {
return -EINVAL;
}
diff --git a/drivers/of/base.c b/drivers/of/base.c
index a0bccb5..23a6d36 100644
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -20,9 +20,11 @@
#define pr_fmt(fmt) "OF: " fmt
+#include <linux/bootmem.h>
#include <linux/console.h>
#include <linux/ctype.h>
#include <linux/cpu.h>
+#include <linux/memblock.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_graph.h>
@@ -198,9 +200,100 @@
return 0;
}
+static struct device_node **phandle_cache;
+static u32 phandle_cache_mask;
+
+/*
+ * Assumptions behind phandle_cache implementation:
+ * - phandle property values are in a contiguous range of 1..n
+ *
+ * If the assumptions do not hold, then
+ * - the phandle lookup overhead reduction provided by the cache
+ * will likely be less
+ */
+static void of_populate_phandle_cache(void)
+{
+ unsigned long flags;
+ u32 cache_entries;
+ struct device_node *np;
+ u32 phandles = 0;
+
+ raw_spin_lock_irqsave(&devtree_lock, flags);
+
+ kfree(phandle_cache);
+ phandle_cache = NULL;
+
+ for_each_of_allnodes(np)
+ if (np->phandle && np->phandle != OF_PHANDLE_ILLEGAL)
+ phandles++;
+
+ cache_entries = roundup_pow_of_two(phandles);
+ phandle_cache_mask = cache_entries - 1;
+
+ phandle_cache = kcalloc(cache_entries, sizeof(*phandle_cache),
+ GFP_ATOMIC);
+
+ if (phandle_cache)
+ for_each_of_allnodes(np)
+ if (np->phandle && np->phandle != OF_PHANDLE_ILLEGAL)
+ phandle_cache[np->phandle & phandle_cache_mask] = np;
+
+ raw_spin_unlock_irqrestore(&devtree_lock, flags);
+}
+
+void __init of_populate_phandle_cache_early(void)
+{
+ u32 cache_entries;
+ struct device_node *np;
+ u32 phandles = 0;
+ size_t size;
+
+ for_each_of_allnodes(np)
+ if (np->phandle && np->phandle != OF_PHANDLE_ILLEGAL)
+ phandles++;
+
+ cache_entries = roundup_pow_of_two(phandles);
+ phandle_cache_mask = cache_entries - 1;
+
+ size = cache_entries * sizeof(*phandle_cache);
+ phandle_cache = memblock_virt_alloc(size, 4);
+ memset(phandle_cache, 0, size);
+
+ for_each_of_allnodes(np)
+ if (np->phandle && np->phandle != OF_PHANDLE_ILLEGAL)
+ phandle_cache[np->phandle & phandle_cache_mask] = np;
+}
+
+#ifndef CONFIG_MODULES
+static int __init of_free_phandle_cache(void)
+{
+ unsigned long flags;
+
+ raw_spin_lock_irqsave(&devtree_lock, flags);
+
+ kfree(phandle_cache);
+ phandle_cache = NULL;
+
+ raw_spin_unlock_irqrestore(&devtree_lock, flags);
+
+ return 0;
+}
+late_initcall_sync(of_free_phandle_cache);
+#endif
+
void __init of_core_init(void)
{
+ unsigned long flags;
struct device_node *np;
+ phys_addr_t size;
+
+ raw_spin_lock_irqsave(&devtree_lock, flags);
+ size = (phandle_cache_mask + 1) * sizeof(*phandle_cache);
+ memblock_free(__pa(phandle_cache), size);
+ phandle_cache = NULL;
+ raw_spin_unlock_irqrestore(&devtree_lock, flags);
+
+ of_populate_phandle_cache();
/* Create the kset, and register existing nodes */
mutex_lock(&of_mutex);
@@ -1093,16 +1186,32 @@
*/
struct device_node *of_find_node_by_phandle(phandle handle)
{
- struct device_node *np;
+ struct device_node *np = NULL;
unsigned long flags;
+ phandle masked_handle;
if (!handle)
return NULL;
raw_spin_lock_irqsave(&devtree_lock, flags);
- for_each_of_allnodes(np)
- if (np->phandle == handle)
- break;
+
+ masked_handle = handle & phandle_cache_mask;
+
+ if (phandle_cache) {
+ if (phandle_cache[masked_handle] &&
+ handle == phandle_cache[masked_handle]->phandle)
+ np = phandle_cache[masked_handle];
+ }
+
+ if (!np) {
+ for_each_of_allnodes(np)
+ if (np->phandle == handle) {
+ if (phandle_cache)
+ phandle_cache[masked_handle] = np;
+ break;
+ }
+ }
+
of_node_get(np);
raw_spin_unlock_irqrestore(&devtree_lock, flags);
return np;
diff --git a/drivers/of/fdt.c b/drivers/of/fdt.c
index c0914fb..755b386 100644
--- a/drivers/of/fdt.c
+++ b/drivers/of/fdt.c
@@ -31,6 +31,8 @@
#include <asm/setup.h> /* for COMMAND_LINE_SIZE */
#include <asm/page.h>
+#include "of_private.h"
+
/*
* of_fdt_limit_memory - limit the number of regions in the /memory node
* @limit: maximum entries
@@ -1269,6 +1271,8 @@
/* Get pointer to "/chosen" and "/aliases" nodes for use everywhere */
of_alias_scan(early_init_dt_alloc_memory_arch);
+
+ of_populate_phandle_cache_early();
}
/**
diff --git a/drivers/of/of_private.h b/drivers/of/of_private.h
index 18bbb451..c4d7fdc 100644
--- a/drivers/of/of_private.h
+++ b/drivers/of/of_private.h
@@ -86,6 +86,11 @@
extern void __of_sysfs_remove_bin_file(struct device_node *np,
struct property *prop);
+/* illegal phandle value (set when unresolved) */
+#define OF_PHANDLE_ILLEGAL 0xdeadbeef
+
+extern void __init of_populate_phandle_cache_early(void);
+
/* iterators for transactions, used for overlays */
/* forward iterator */
#define for_each_transaction_entry(_oft, _te) \
diff --git a/drivers/of/resolver.c b/drivers/of/resolver.c
index 46325d6..67b1d72 100644
--- a/drivers/of/resolver.c
+++ b/drivers/of/resolver.c
@@ -21,9 +21,6 @@
#include <linux/string.h>
#include <linux/slab.h>
-/* illegal phandle value (set when unresolved) */
-#define OF_PHANDLE_ILLEGAL 0xdeadbeef
-
/**
* Find a node with the give full name by recursively following any of
* the child node links.
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c
index 1441678..d57879b 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm.c
@@ -25,6 +25,7 @@
#include <linux/pinctrl/pinmux.h>
#include <linux/pinctrl/pinconf.h>
#include <linux/pinctrl/pinconf-generic.h>
+#include <linux/of_irq.h>
#include <linux/slab.h>
#include <linux/gpio.h>
#include <linux/interrupt.h>
@@ -768,6 +769,29 @@
return 0;
}
+static int msm_gpiochip_irq_reqres(struct irq_data *d)
+{
+ struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
+
+ if (!try_module_get(chip->owner))
+ return -ENODEV;
+
+ if (gpiochip_lock_as_irq(chip, d->hwirq)) {
+ pr_err("unable to lock HW IRQ %lu for IRQ\n", d->hwirq);
+ module_put(chip->owner);
+ return -EINVAL;
+ }
+ return 0;
+}
+
+static void msm_gpiochip_irq_relres(struct irq_data *d)
+{
+ struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
+
+ gpiochip_unlock_as_irq(chip, d->hwirq);
+ module_put(chip->owner);
+}
+
static struct irq_chip msm_gpio_irq_chip = {
.name = "msmgpio",
.irq_enable = msm_gpio_irq_enable,
@@ -776,6 +800,61 @@
.irq_ack = msm_gpio_irq_ack,
.irq_set_type = msm_gpio_irq_set_type,
.irq_set_wake = msm_gpio_irq_set_wake,
+ .irq_request_resources = msm_gpiochip_irq_reqres,
+ .irq_release_resources = msm_gpiochip_irq_relres,
+ .flags = IRQCHIP_MASK_ON_SUSPEND |
+ IRQCHIP_SKIP_SET_WAKE,
+};
+
+static void msm_gpio_domain_set_info(struct irq_domain *d, unsigned int irq,
+ irq_hw_number_t hwirq)
+{
+ struct gpio_chip *gc = d->host_data;
+
+ irq_domain_set_info(d, irq, hwirq, gc->irqchip, d->host_data,
+ gc->irq_handler, NULL, NULL);
+
+ if (gc->can_sleep && !gc->irq_not_threaded)
+ irq_set_nested_thread(irq, 1);
+
+ irq_set_noprobe(irq);
+}
+
+static int msm_gpio_domain_translate(struct irq_domain *d,
+ struct irq_fwspec *fwspec, unsigned long *hwirq, unsigned int *type)
+{
+ if (is_of_node(fwspec->fwnode)) {
+ if (fwspec->param_count < 2)
+ return -EINVAL;
+ if (hwirq)
+ *hwirq = fwspec->param[0];
+ if (type)
+ *type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK;
+ return 0;
+ }
+
+ return -EINVAL;
+}
+
+static int msm_gpio_domain_alloc(struct irq_domain *domain, unsigned int virq,
+ unsigned int nr_irqs, void *arg)
+{
+ int ret;
+ irq_hw_number_t hwirq;
+ struct irq_fwspec *fwspec = arg;
+
+ ret = msm_gpio_domain_translate(domain, fwspec, &hwirq, NULL);
+ if (ret)
+ return ret;
+
+ msm_gpio_domain_set_info(domain, virq, hwirq);
+ return ret;
+}
+
+static const struct irq_domain_ops msm_gpio_domain_ops = {
+ .translate = msm_gpio_domain_translate,
+ .alloc = msm_gpio_domain_alloc,
+ .free = irq_domain_free_irqs_top,
};
static struct irq_chip msm_dirconn_irq_chip;
@@ -794,9 +873,16 @@
unsigned int parent_irq, unsigned int gpio)
{
int irq;
+ struct irq_fwspec fwspec;
+
+ fwspec.fwnode = domain->fwnode;
+ fwspec.param[0] = gpio;
+ fwspec.param[1] = IRQ_TYPE_NONE;
+ fwspec.param_count = 2;
+
if (gpio != 0) {
- irq = irq_find_mapping(domain, gpio);
+ irq = irq_create_fwspec_mapping(&fwspec);
irq_set_parent(irq, parent_irq);
irq_set_chip(irq, &msm_dirconn_irq_chip);
irq_set_handler_data(parent_irq, irq_get_irq_data(irq));
@@ -1299,11 +1385,17 @@
}
}
+static int msm_gpiochip_to_irq(struct gpio_chip *chip, unsigned int offset)
+{
+ return irq_find_mapping(chip->irqdomain, offset);
+}
+
static int msm_gpio_init(struct msm_pinctrl *pctrl)
{
struct gpio_chip *chip;
int ret;
unsigned ngpio = pctrl->soc->ngpios;
+ struct irq_domain *domain_parent;
if (WARN_ON(ngpio > MAX_NR_GPIO))
return -EINVAL;
@@ -1315,6 +1407,11 @@
chip->parent = pctrl->dev;
chip->owner = THIS_MODULE;
chip->of_node = pctrl->dev->of_node;
+ chip->irqchip = &msm_gpio_irq_chip;
+ chip->irq_handler = handle_fasteoi_irq;
+ chip->irq_default_type = IRQ_TYPE_NONE;
+ chip->to_irq = msm_gpiochip_to_irq;
+ chip->lock_key = NULL;
ret = gpiochip_add_data(&pctrl->chip, pctrl);
if (ret) {
@@ -1329,19 +1426,27 @@
return ret;
}
- ret = gpiochip_irqchip_add(chip,
- &msm_gpio_irq_chip,
- 0,
- handle_fasteoi_irq,
- IRQ_TYPE_NONE);
- if (ret) {
+ domain_parent = irq_find_host(of_irq_find_parent(chip->of_node));
+ if (!domain_parent) {
+ pr_err("unable to find parent domain\n");
+ gpiochip_remove(&pctrl->chip);
+ return -ENXIO;
+ }
+
+ chip->irqdomain = irq_domain_add_hierarchy(domain_parent, 0,
+ chip->ngpio,
+ chip->of_node,
+ &msm_gpio_domain_ops,
+ chip);
+ if (!chip->irqdomain) {
dev_err(pctrl->dev, "Failed to add irqchip to gpiochip\n");
+ chip->irqchip = NULL;
gpiochip_remove(&pctrl->chip);
return -ENOSYS;
}
- gpiochip_set_chained_irqchip(chip, &msm_gpio_irq_chip, pctrl->irq,
- msm_gpio_irq_handler);
+ gpiochip_set_chained_irqchip(chip, &msm_gpio_irq_chip,
+ pctrl->irq, msm_gpio_irq_handler);
msm_gpio_setup_dir_connects(pctrl);
return 0;
diff --git a/drivers/platform/msm/Kconfig b/drivers/platform/msm/Kconfig
index 4abd8f1..782ce62 100644
--- a/drivers/platform/msm/Kconfig
+++ b/drivers/platform/msm/Kconfig
@@ -163,7 +163,7 @@
config MSM_MHI_DEV
tristate "Modem Device Interface Driver"
- depends on EP_PCIE && IPA
+ depends on EP_PCIE && IPA3
help
This kernel module is used to interact with PCIe Root complex
supporting MHI protocol. MHI is a data transmission protocol
diff --git a/drivers/platform/msm/ipa/ipa_clients/ecm_ipa.c b/drivers/platform/msm/ipa/ipa_clients/ecm_ipa.c
index eadd58b..9f8bfbe 100644
--- a/drivers/platform/msm/ipa/ipa_clients/ecm_ipa.c
+++ b/drivers/platform/msm/ipa/ipa_clients/ecm_ipa.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013-2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -619,8 +619,10 @@
}
if (ecm_ipa_ctx->is_vlan_mode)
- if (unlikely(skb->protocol != ETH_P_8021Q))
- ECM_IPA_DEBUG("ether_type != ETH_P_8021Q && vlan\n");
+ if (unlikely(skb->protocol != htons(ETH_P_8021Q)))
+ ECM_IPA_DEBUG(
+ "ether_type != ETH_P_8021Q && vlan, prot = 0x%X\n"
+ , skb->protocol);
ret = ipa_tx_dp(ecm_ipa_ctx->ipa_to_usb_client, skb, NULL);
if (ret) {
diff --git a/drivers/platform/msm/ipa/ipa_clients/rndis_ipa.c b/drivers/platform/msm/ipa/ipa_clients/rndis_ipa.c
index ad23d82..4980167 100644
--- a/drivers/platform/msm/ipa/ipa_clients/rndis_ipa.c
+++ b/drivers/platform/msm/ipa/ipa_clients/rndis_ipa.c
@@ -2026,8 +2026,10 @@
}
if (rndis_ipa_ctx->is_vlan_mode)
- if (unlikely(skb->protocol != ETH_P_8021Q))
- RNDIS_IPA_DEBUG("ether_type != ETH_P_8021Q && vlan\n");
+ if (unlikely(skb->protocol != htons(ETH_P_8021Q)))
+ RNDIS_IPA_DEBUG(
+ "ether_type != ETH_P_8021Q && vlan, prot = 0x%X\n"
+ , skb->protocol);
/* make room at the head of the SKB to put the RNDIS header */
rndis_hdr = (struct rndis_pkt_hdr *)skb_push(skb,
diff --git a/drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_reg.c b/drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_reg.c
index 48e7d7c..c3422d1 100644
--- a/drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_reg.c
+++ b/drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_reg.c
@@ -2129,11 +2129,11 @@
return;
}
- valmask->val = (1 << IPA_ENDP_INIT_AGGR_n_AGGR_FORCE_CLOSE_SHFT) &&
+ valmask->val = (1 << IPA_ENDP_INIT_AGGR_n_AGGR_FORCE_CLOSE_SHFT) &
IPA_ENDP_INIT_AGGR_n_AGGR_FORCE_CLOSE_BMSK;
valmask->mask = IPA_ENDP_INIT_AGGR_n_AGGR_FORCE_CLOSE_BMSK;
- valmask->val |= ((0 << IPA_ENDP_INIT_AGGR_n_AGGR_EN_SHFT) &&
+ valmask->val |= ((0 << IPA_ENDP_INIT_AGGR_n_AGGR_EN_SHFT) &
IPA_ENDP_INIT_AGGR_n_AGGR_EN_BMSK);
valmask->mask |= IPA_ENDP_INIT_AGGR_n_AGGR_EN_BMSK;
}
diff --git a/drivers/platform/msm/mhi_dev/Makefile b/drivers/platform/msm/mhi_dev/Makefile
index c1969e2..53ef716 100644
--- a/drivers/platform/msm/mhi_dev/Makefile
+++ b/drivers/platform/msm/mhi_dev/Makefile
@@ -4,3 +4,4 @@
obj-y += mhi_ring.o
obj-y += mhi_uci.o
obj-y += mhi_sm.o
+obj-y += mhi_dev_net.o
diff --git a/drivers/platform/msm/mhi_dev/mhi.c b/drivers/platform/msm/mhi_dev/mhi.c
index 7179fcd..c2187c6 100644
--- a/drivers/platform/msm/mhi_dev/mhi.c
+++ b/drivers/platform/msm/mhi_dev/mhi.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -34,13 +34,10 @@
#include "mhi_sm.h"
/* Wait time on the device for Host to set M0 state */
-#define MHI_M0_WAIT_MIN_USLEEP 20000000
-#define MHI_M0_WAIT_MAX_USLEEP 25000000
#define MHI_DEV_M0_MAX_CNT 30
/* Wait time before suspend/resume is complete */
-#define MHI_SUSPEND_WAIT_MIN 3100
-#define MHI_SUSPEND_WAIT_MAX 3200
-#define MHI_SUSPEND_WAIT_TIMEOUT 500
+#define MHI_SUSPEND_MIN 100
+#define MHI_SUSPEND_TIMEOUT 600
#define MHI_MASK_CH_EV_LEN 32
#define MHI_RING_CMD_ID 0
#define MHI_RING_PRIMARY_EVT_ID 1
@@ -59,6 +56,13 @@
#define HOST_ADDR_MSB(addr) ((addr >> 32) & 0xFFFFFFFF)
#define MHI_IPC_LOG_PAGES (100)
+#define MHI_REGLEN 0x100
+#define MHI_INIT 0
+#define MHI_REINIT 1
+
+#define TR_RING_ELEMENT_SZ sizeof(struct mhi_dev_transfer_ring_element)
+#define RING_ELEMENT_TYPE_SZ sizeof(union mhi_dev_ring_element_type)
+
enum mhi_msg_level mhi_msg_lvl = MHI_MSG_ERROR;
enum mhi_msg_level mhi_ipc_msg_lvl = MHI_MSG_VERBOSE;
void *mhi_ipc_log;
@@ -67,106 +71,213 @@
static void mhi_hwc_cb(void *priv, enum ipa_mhi_event_type event,
unsigned long data);
static void mhi_ring_init_cb(void *user_data);
+static void mhi_update_state_info(uint32_t info);
+static int mhi_deinit(struct mhi_dev *mhi);
+static void mhi_dev_resume_init_with_link_up(struct ep_pcie_notify *notify);
+static int mhi_dev_pcie_notify_event;
+static void mhi_dev_transfer_completion_cb(void *mreq);
-void mhi_dev_read_from_host(struct mhi_addr *host, dma_addr_t dev, size_t size)
+/*
+ * mhi_dev_ring_cache_completion_cb () - Call back function called
+ * by IPA driver when ring element cache is done
+ *
+ * @req : ring cache request
+ */
+static void mhi_dev_ring_cache_completion_cb(void *req)
{
- int rc = 0;
- uint64_t bit_40 = ((u64) 1) << 40, host_addr_pa = 0;
+ struct ring_cache_req *ring_req = NULL;
- host_addr_pa = ((u64) host->host_pa) | bit_40;
-
- mhi_log(MHI_MSG_ERROR, "device 0x%x <<-- host 0x%llx, size %d\n",
- dev, host_addr_pa, size);
-
- rc = ipa_dma_sync_memcpy((u64) dev, host_addr_pa, (int) size);
- if (rc)
- pr_err("error while reading from host:%d\n", rc);
+ if (req)
+ ring_req = (struct ring_cache_req *)req;
+ else {
+ pr_err("%s():ring cache req data is NULL\n", __func__);
+ return;
+ }
+ complete(ring_req->done);
}
-EXPORT_SYMBOL(mhi_dev_read_from_host);
-void mhi_dev_write_to_host(struct mhi_addr *host, void *dev, size_t size,
- struct mhi_dev *mhi)
+void mhi_dev_read_from_host(struct mhi_dev *mhi, struct mhi_addr *transfer)
{
int rc = 0;
- uint64_t bit_40 = ((u64) 1) << 40, host_addr_pa = 0;
+ uint64_t bit_40 = ((u64) 1) << 40, host_addr_pa = 0, offset = 0;
+ struct ring_cache_req ring_req;
+
+ DECLARE_COMPLETION(done);
+
+ ring_req.done = &done;
if (!mhi) {
pr_err("invalid MHI ctx\n");
return;
}
- host_addr_pa = ((u64) host->host_pa) | bit_40;
- /* Copy the device content to a local device physical address */
- memcpy(mhi->dma_cache, dev, size);
- mhi_log(MHI_MSG_ERROR, "device 0x%llx --> host 0x%llx, size %d\n",
- (uint64_t) mhi->cache_dma_handle, host_addr_pa, (int) size);
+ if (mhi->config_iatu) {
+ offset = (uint64_t) transfer->host_pa - mhi->ctrl_base.host_pa;
+ /* Mapping the translated physical address on the device */
+ host_addr_pa = (uint64_t) mhi->ctrl_base.device_pa + offset;
+ } else {
+ host_addr_pa = transfer->host_pa | bit_40;
+ }
- rc = ipa_dma_sync_memcpy(host_addr_pa, (u64) mhi->cache_dma_handle,
- (int) size);
+ mhi_log(MHI_MSG_VERBOSE,
+ "device 0x%x <<-- host 0x%llx, size %d\n",
+ transfer->phy_addr, host_addr_pa,
+ (int) transfer->size);
+ rc = ipa_dma_async_memcpy((u64)transfer->phy_addr, host_addr_pa,
+ (int)transfer->size,
+ mhi_dev_ring_cache_completion_cb, &ring_req);
if (rc)
pr_err("error while reading from host:%d\n", rc);
+
+ wait_for_completion(&done);
+}
+EXPORT_SYMBOL(mhi_dev_read_from_host);
+
+void mhi_dev_write_to_host(struct mhi_dev *mhi, struct mhi_addr *transfer,
+ struct event_req *ereq, enum mhi_dev_transfer_type tr_type)
+{
+ int rc = 0;
+ uint64_t bit_40 = ((u64) 1) << 40, host_addr_pa = 0, offset = 0;
+ dma_addr_t dma;
+
+ if (!mhi) {
+ pr_err("invalid MHI ctx\n");
+ return;
+ }
+ if (mhi->config_iatu) {
+ offset = (uint64_t) transfer->host_pa - mhi->ctrl_base.host_pa;
+ /* Mapping the translated physical address on the device */
+ host_addr_pa = (uint64_t) mhi->ctrl_base.device_pa + offset;
+ } else {
+ host_addr_pa = transfer->host_pa | bit_40;
+ }
+
+ mhi_log(MHI_MSG_VERBOSE,
+ "device 0x%llx --> host 0x%llx, size %d\n",
+ (uint64_t) mhi->cache_dma_handle, host_addr_pa,
+ (int) transfer->size);
+ if (tr_type == MHI_DEV_DMA_ASYNC) {
+ dma = dma_map_single(&mhi->pdev->dev,
+ transfer->virt_addr, transfer->size,
+ DMA_TO_DEVICE);
+ if (ereq->event_type == SEND_EVENT_BUFFER) {
+ ereq->dma = dma;
+ ereq->dma_len = transfer->size;
+ } else if (ereq->event_type == SEND_EVENT_RD_OFFSET) {
+ ereq->event_rd_dma = dma;
+ }
+ rc = ipa_dma_async_memcpy(host_addr_pa, (uint64_t) dma,
+ (int)transfer->size,
+ ereq->client_cb, ereq);
+ if (rc)
+ pr_err("error while writing to host:%d\n", rc);
+ } else if (tr_type == MHI_DEV_DMA_SYNC) {
+ /* Copy the device content to a local device
+ * physical address.
+ */
+ memcpy(mhi->dma_cache, transfer->virt_addr,
+ transfer->size);
+ rc = ipa_dma_sync_memcpy(host_addr_pa,
+ (u64) mhi->cache_dma_handle,
+ (int) transfer->size);
+ if (rc)
+ pr_err("error while writing to host:%d\n", rc);
+ }
}
EXPORT_SYMBOL(mhi_dev_write_to_host);
int mhi_transfer_host_to_device(void *dev, uint64_t host_pa, uint32_t len,
- struct mhi_dev *mhi)
+ struct mhi_dev *mhi, struct mhi_req *mreq)
{
int rc = 0;
- uint64_t bit_40 = ((u64) 1) << 40, host_addr_pa = 0;
+ uint64_t bit_40 = ((u64) 1) << 40, host_addr_pa = 0, offset = 0;
+ struct mhi_dev_ring *ring = NULL;
- if (!mhi) {
- pr_err("Invalid mhi device\n");
+
+ if (!mhi || !dev || !host_pa || !mreq) {
+ pr_err("%s():Invalid parameters\n", __func__);
return -EINVAL;
}
- if (!dev) {
- pr_err("Invalid virt device\n");
- return -EINVAL;
+ if (mhi->config_iatu) {
+ offset = (uint64_t)host_pa - mhi->data_base.host_pa;
+ /* Mapping the translated physical address on the device */
+ host_addr_pa = (uint64_t) mhi->data_base.device_pa + offset;
+ } else {
+ host_addr_pa = host_pa | bit_40;
}
- if (!host_pa) {
- pr_err("Invalid host pa device\n");
- return -EINVAL;
- }
-
- host_addr_pa = host_pa | bit_40;
- mhi_log(MHI_MSG_ERROR, "device 0x%llx <-- host 0x%llx, size %d\n",
+ mhi_log(MHI_MSG_VERBOSE, "device 0x%llx <-- host 0x%llx, size %d\n",
(uint64_t) mhi->read_dma_handle, host_addr_pa, (int) len);
- rc = ipa_dma_sync_memcpy((u64) mhi->read_dma_handle,
- host_addr_pa, (int) len);
- if (rc) {
- pr_err("error while reading from host:%d\n", rc);
- return rc;
+
+ if (mreq->mode == IPA_DMA_SYNC) {
+ rc = ipa_dma_sync_memcpy((u64) mhi->read_dma_handle,
+ host_addr_pa, (int) len);
+ if (rc) {
+ pr_err("error while reading chan using sync:%d\n", rc);
+ return rc;
+ }
+ memcpy(dev, mhi->read_handle, len);
+ } else if (mreq->mode == IPA_DMA_ASYNC) {
+ ring = mreq->client->channel->ring;
+ mreq->dma = dma_map_single(&mhi->pdev->dev, dev, len,
+ DMA_FROM_DEVICE);
+ mhi_dev_ring_inc_index(ring, ring->rd_offset);
+
+ if (ring->rd_offset == ring->wr_offset)
+ mreq->snd_cmpl = 1;
+ else
+ mreq->snd_cmpl = 0;
+ rc = ipa_dma_async_memcpy(mreq->dma, host_addr_pa,
+ (int) len, mhi_dev_transfer_completion_cb,
+ mreq);
+ if (rc) {
+ pr_err("error while reading chan using async:%d\n", rc);
+ return rc;
+ }
}
-
- memcpy(dev, mhi->read_handle, len);
-
return rc;
}
EXPORT_SYMBOL(mhi_transfer_host_to_device);
int mhi_transfer_device_to_host(uint64_t host_addr, void *dev, uint32_t len,
- struct mhi_dev *mhi)
+ struct mhi_dev *mhi, struct mhi_req *req)
{
int rc = 0;
- uint64_t bit_40 = ((u64) 1) << 40, host_addr_pa = 0;
+ uint64_t bit_40 = ((u64) 1) << 40, host_addr_pa = 0, offset = 0;
+ struct mhi_dev_ring *ring = NULL;
- if (!mhi || !dev || !host_addr) {
+ if (!mhi || !dev || !req || !host_addr) {
pr_err("%sInvalid parameters\n", __func__);
return -EINVAL;
}
- host_addr_pa = host_addr | bit_40;
- memcpy(mhi->write_handle, dev, len);
+ if (mhi->config_iatu) {
+ offset = (uint64_t)host_addr - mhi->data_base.host_pa;
+ /* Mapping the translated physical address on the device */
+ host_addr_pa = (uint64_t) mhi->data_base.device_pa + offset;
+ } else {
+ host_addr_pa = host_addr | bit_40;
+ }
+ mhi_log(MHI_MSG_VERBOSE, "device 0x%llx ---> host 0x%llx, size %d\n",
+ (uint64_t) mhi->write_dma_handle,
+ host_addr_pa, (int) len);
- mhi_log(MHI_MSG_ERROR, "device 0x%llx ---> host 0x%llx, size %d\n",
- (uint64_t) mhi->write_dma_handle, host_addr_pa, (int) len);
- rc = ipa_dma_sync_memcpy(host_addr_pa,
- (u64) mhi->write_dma_handle,
- (int) len);
- if (rc)
- pr_err("error while reading from host:%d\n", rc);
-
+ if (req->mode == IPA_DMA_SYNC) {
+ memcpy(mhi->write_handle, dev, len);
+ rc = ipa_dma_sync_memcpy(host_addr_pa,
+ (u64) mhi->write_dma_handle, (int) len);
+ } else if (req->mode == IPA_DMA_ASYNC) {
+ req->dma = dma_map_single(&mhi->pdev->dev, req->buf,
+ req->len, DMA_TO_DEVICE);
+ ring = req->client->channel->ring;
+ mhi_dev_ring_inc_index(ring, ring->rd_offset);
+ if (ring->rd_offset == ring->wr_offset)
+ req->snd_cmpl = 1;
+ rc = ipa_dma_async_memcpy(host_addr_pa,
+ (uint64_t) req->dma, (int) len,
+ mhi_dev_transfer_completion_cb, req);
+ }
return rc;
}
EXPORT_SYMBOL(mhi_transfer_device_to_host);
@@ -216,7 +327,7 @@
mhi_dev_get_erdb_db_cfg(mhi, &erdb_cfg);
- mhi_log(MHI_MSG_ERROR,
+ mhi_log(MHI_MSG_VERBOSE,
"Event rings 0x%x => er_base 0x%x, er_end %d\n",
mhi->cfg.event_rings, erdb_cfg.base, erdb_cfg.end);
erdb_cfg.tgt_addr = (uint32_t) mhi->ipa_uc_mbox_erdb;
@@ -247,7 +358,7 @@
}
mhi_dev_get_erdb_db_cfg(mhi, &erdb_cfg);
- mhi_log(MHI_MSG_ERROR,
+ mhi_log(MHI_MSG_VERBOSE,
"Event rings 0x%x => er_base 0x%x, er_end %d\n",
mhi->cfg.event_rings, erdb_cfg.base, erdb_cfg.end);
@@ -259,10 +370,18 @@
ipa_init_params.msi.mask = ((1 << cfg.msg_num) - 1);
ipa_init_params.first_er_idx = erdb_cfg.base;
ipa_init_params.first_ch_idx = HW_CHANNEL_BASE;
- ipa_init_params.mmio_addr = ((uint32_t) mhi_ctx->mmio_base_pa_addr);
- ipa_init_params.assert_bit40 = true;
- mhi_log(MHI_MSG_ERROR,
+ if (mhi_ctx->config_iatu)
+ ipa_init_params.mmio_addr =
+ ((uint32_t) mhi_ctx->mmio_base_pa_addr) + MHI_REGLEN;
+ else
+ ipa_init_params.mmio_addr =
+ ((uint32_t) mhi_ctx->mmio_base_pa_addr);
+
+ if (!mhi_ctx->config_iatu)
+ ipa_init_params.assert_bit40 = true;
+
+ mhi_log(MHI_MSG_VERBOSE,
"MMIO Addr 0x%x, MSI config: U:0x%x L: 0x%x D: 0x%x\n",
ipa_init_params.mmio_addr, cfg.upper, cfg.lower, cfg.data);
ipa_init_params.notify = mhi_hwc_cb;
@@ -284,10 +403,15 @@
memset(&ipa_start_params, 0, sizeof(ipa_start_params));
- ipa_start_params.channel_context_array_addr =
+ if (mhi->config_iatu) {
+ ipa_start_params.host_ctrl_addr = mhi->ctrl_base.device_pa;
+ ipa_start_params.host_data_addr = mhi->data_base.device_pa;
+ } else {
+ ipa_start_params.channel_context_array_addr =
mhi->ch_ctx_shadow.host_pa;
- ipa_start_params.event_context_array_addr =
+ ipa_start_params.event_context_array_addr =
mhi->ev_ctx_shadow.host_pa;
+ }
rc = ipa_mhi_start(&ipa_start_params);
if (rc)
@@ -303,7 +427,7 @@
switch (event) {
case IPA_MHI_EVENT_READY:
- mhi_log(MHI_MSG_ERROR,
+ mhi_log(MHI_MSG_INFO,
"HW Channel uC is ready event=0x%X\n", event);
rc = mhi_hwc_start(mhi_ctx);
if (rc) {
@@ -329,6 +453,11 @@
pr_err("Failed to enable command db\n");
return;
}
+
+ mhi_update_state_info(MHI_STATE_CONNECTED);
+
+ ep_pcie_mask_irq_event(mhi_ctx->phandle,
+ EP_PCIE_INT_EVT_MHI_A7, true);
break;
case IPA_MHI_EVENT_DATA_AVAILABLE:
rc = mhi_dev_notify_sm_event(MHI_DEV_EVENT_HW_ACC_WAKEUP);
@@ -352,6 +481,7 @@
memset(&connect_params, 0, sizeof(connect_params));
switch (type) {
+ case MHI_DEV_RING_EL_RESET:
case MHI_DEV_RING_EL_STOP:
rc = ipa_mhi_disconnect_pipe(
mhi->ipa_clnt_hndl[chid-HW_CHANNEL_BASE]);
@@ -402,15 +532,18 @@
static void mhi_dev_fetch_ch_ctx(struct mhi_dev *mhi, uint32_t ch_id)
{
- struct mhi_addr addr;
+ struct mhi_addr data_transfer;
- addr.host_pa = mhi->ch_ctx_shadow.host_pa +
+ if (mhi->use_ipa) {
+ data_transfer.host_pa = mhi->ch_ctx_shadow.host_pa +
sizeof(struct mhi_dev_ch_ctx) * ch_id;
- addr.size = sizeof(struct mhi_dev_ch_ctx);
+ data_transfer.phy_addr = mhi->ch_ctx_cache_dma_handle +
+ sizeof(struct mhi_dev_ch_ctx) * ch_id;
+ }
+
+ data_transfer.size = sizeof(struct mhi_dev_ch_ctx);
/* Fetch the channel ctx (*dst, *src, size) */
- mhi_dev_read_from_host(&addr, mhi->ch_ctx_cache_dma_handle +
- (sizeof(struct mhi_dev_ch_ctx) * ch_id),
- sizeof(struct mhi_dev_ch_ctx));
+ mhi_dev_read_from_host(mhi, &data_transfer);
}
int mhi_dev_syserr(struct mhi_dev *mhi)
@@ -436,24 +569,21 @@
struct mhi_dev_ring *ring = &mhi->ring[evnt_ring_idx];
union mhi_dev_ring_ctx *ctx;
struct ep_pcie_msi_config cfg;
- struct mhi_addr msi_addr;
- uint32_t msi = 0;
- struct mhi_addr host_rp_addr;
+ struct mhi_addr transfer_addr;
- rc = ep_pcie_get_msi_config(mhi->phandle,
- &cfg);
- if (rc) {
- pr_err("Error retrieving pcie msi logic\n");
- return rc;
- }
+ rc = ep_pcie_get_msi_config(mhi->phandle, &cfg);
+ if (rc) {
+ pr_err("Error retrieving pcie msi logic\n");
+ return rc;
+ }
if (evnt_ring_idx > mhi->cfg.event_rings) {
pr_err("Invalid event ring idx: %lld\n", evnt_ring_idx);
return -EINVAL;
}
+ ctx = (union mhi_dev_ring_ctx *)&mhi->ev_ctx_cache[evnt_ring];
if (mhi_ring_get_state(ring) == RING_STATE_UINT) {
- ctx = (union mhi_dev_ring_ctx *)&mhi->ev_ctx_cache[evnt_ring];
rc = mhi_ring_start(ring, ctx, mhi);
if (rc) {
mhi_log(MHI_MSG_ERROR,
@@ -464,23 +594,30 @@
mutex_lock(&mhi->mhi_event_lock);
/* add the ring element */
- mhi_dev_add_element(ring, el);
+ mhi_dev_add_element(ring, el, NULL, 0);
ring->ring_ctx_shadow->ev.rp = (ring->rd_offset *
sizeof(union mhi_dev_ring_element_type)) +
ring->ring_ctx->generic.rbase;
- mhi_log(MHI_MSG_ERROR, "ev.rp = %llx for %lld\n",
+ mhi_log(MHI_MSG_VERBOSE, "ev.rp = %llx for %lld\n",
ring->ring_ctx_shadow->ev.rp, evnt_ring_idx);
- host_rp_addr.host_pa = (mhi->ev_ctx_shadow.host_pa +
+ if (mhi->use_ipa)
+ transfer_addr.host_pa = (mhi->ev_ctx_shadow.host_pa +
sizeof(struct mhi_dev_ev_ctx) *
evnt_ring) + (uint32_t) &ring->ring_ctx->ev.rp -
(uint32_t) ring->ring_ctx;
- mhi_dev_write_to_host(&host_rp_addr, &ring->ring_ctx_shadow->ev.rp,
- sizeof(uint64_t),
- mhi);
+ else
+ transfer_addr.device_va = (mhi->ev_ctx_shadow.device_va +
+ sizeof(struct mhi_dev_ev_ctx) *
+ evnt_ring) + (uint32_t) &ring->ring_ctx->ev.rp -
+ (uint32_t) ring->ring_ctx;
+ transfer_addr.virt_addr = &ring->ring_ctx_shadow->ev.rp;
+ transfer_addr.size = sizeof(uint64_t);
+
+ mhi_dev_write_to_host(mhi, &transfer_addr, NULL, MHI_DEV_DMA_SYNC);
/*
* rp update in host memory should be flushed
* before sending a MSI to the host
@@ -488,20 +625,141 @@
wmb();
mutex_unlock(&mhi->mhi_event_lock);
- mhi_log(MHI_MSG_ERROR, "event sent:\n");
- mhi_log(MHI_MSG_ERROR, "evnt ptr : 0x%llx\n", el->evt_tr_comp.ptr);
- mhi_log(MHI_MSG_ERROR, "evnt len : 0x%x\n", el->evt_tr_comp.len);
- mhi_log(MHI_MSG_ERROR, "evnt code :0x%x\n", el->evt_tr_comp.code);
- mhi_log(MHI_MSG_ERROR, "evnt type :0x%x\n", el->evt_tr_comp.type);
- mhi_log(MHI_MSG_ERROR, "evnt chid :0x%x\n", el->evt_tr_comp.chid);
+ mhi_log(MHI_MSG_VERBOSE, "event sent:\n");
+ mhi_log(MHI_MSG_VERBOSE, "evnt ptr : 0x%llx\n", el->evt_tr_comp.ptr);
+ mhi_log(MHI_MSG_VERBOSE, "evnt len : 0x%x\n", el->evt_tr_comp.len);
+ mhi_log(MHI_MSG_VERBOSE, "evnt code :0x%x\n", el->evt_tr_comp.code);
+ mhi_log(MHI_MSG_VERBOSE, "evnt type :0x%x\n", el->evt_tr_comp.type);
+ mhi_log(MHI_MSG_VERBOSE, "evnt chid :0x%x\n", el->evt_tr_comp.chid);
+ rc = ep_pcie_trigger_msi(mhi_ctx->phandle, ctx->ev.msivec);
+ if (rc) {
+ pr_err("%s: error sending msi\n", __func__);
+ return rc;
+ }
+ return rc;
+}
- msi_addr.host_pa = (uint64_t)((uint64_t)cfg.upper << 32) |
- (uint64_t)cfg.lower;
- msi = cfg.data + mhi_ctx->mhi_ep_msi_num;
- mhi_log(MHI_MSG_ERROR, "Sending MSI %d to 0x%llx as data = 0x%x\n",
- mhi_ctx->mhi_ep_msi_num, msi_addr.host_pa, msi);
- mhi_dev_write_to_host(&msi_addr, &msi, 4, mhi);
+/*
+ * mhi_dev_event_buf_completion_cb() -Cb function called by IPA driver
+ * when transfer completion event buffer copy is done.
+ *
+ * @req - event_req structure
+ */
+static void mhi_dev_event_buf_completion_cb(void *req)
+{
+ struct event_req *ereq = NULL;
+
+ if (req) {
+ ereq = (struct event_req *)req;
+ } else {
+ pr_err("%s():event req data is invalid\n", __func__);
+ return;
+ }
+ dma_unmap_single(&mhi_ctx->pdev->dev, ereq->dma,
+ ereq->dma_len, DMA_TO_DEVICE);
+}
+
+/**
+ * mhi_dev_event_rd_offset_completion_cb() -CB function called by IPA driver
+ * when event rd_offset transfer is done.
+ *
+ * @req - event_req structure
+ */
+
+static void mhi_dev_event_rd_offset_completion_cb(void *req)
+{
+ union mhi_dev_ring_ctx *ctx;
+ int rc = 0;
+ struct event_req *ereq = (struct event_req *)req;
+ struct mhi_dev_channel *ch = ereq->context;
+ struct mhi_dev *mhi = ch->ring->mhi_dev;
+ unsigned long flags;
+
+ dma_unmap_single(&mhi_ctx->pdev->dev, ereq->event_rd_dma,
+ sizeof(uint64_t), DMA_TO_DEVICE);
+ ctx = (union mhi_dev_ring_ctx *)&mhi->ev_ctx_cache[ereq->event_ring];
+ rc = ep_pcie_trigger_msi(mhi_ctx->phandle, ctx->ev.msivec);
+ if (rc)
+ pr_err("%s: error sending in msi\n", __func__);
+
+ /* return the event req to pre allocated pooled list */
+ spin_lock_irqsave(&mhi->lock, flags);
+ list_add_tail(&ereq->list, &ch->event_req_buffers);
+ spin_unlock_irqrestore(&mhi->lock, flags);
+}
+
+static int mhi_dev_send_multiple_tr_events(struct mhi_dev *mhi, int evnt_ring,
+ struct event_req *ereq, uint32_t evt_len)
+{
+ int rc = 0;
+ uint64_t evnt_ring_idx = mhi->ev_ring_start + evnt_ring;
+ struct mhi_dev_ring *ring = &mhi->ring[evnt_ring_idx];
+ union mhi_dev_ring_ctx *ctx;
+ struct mhi_addr transfer_addr;
+ static int count;
+
+ if (!ereq) {
+ pr_err("%s(): invalid event req\n", __func__);
+ return -EINVAL;
+ }
+
+ if (count == 0) {
+ rc = ep_pcie_get_msi_config(mhi->phandle, &mhi->msi_cfg);
+ if (rc) {
+ pr_err("Error retrieving pcie msi logic\n");
+ return rc;
+ }
+ count++;
+ }
+
+ if (evnt_ring_idx > mhi->cfg.event_rings) {
+ pr_err("Invalid event ring idx: %lld\n", evnt_ring_idx);
+ return -EINVAL;
+ }
+
+ ctx = (union mhi_dev_ring_ctx *)&mhi->ev_ctx_cache[evnt_ring];
+ if (mhi_ring_get_state(ring) == RING_STATE_UINT) {
+ rc = mhi_ring_start(ring, ctx, mhi);
+ if (rc) {
+ mhi_log(MHI_MSG_ERROR,
+ "error starting event ring %d\n", evnt_ring);
+ return rc;
+ }
+ }
+
+ /* add the ring element */
+ ereq->client_cb = mhi_dev_event_buf_completion_cb;
+ ereq->event_type = SEND_EVENT_BUFFER;
+ rc = mhi_dev_add_element(ring, ereq->tr_events, ereq, evt_len);
+ if (rc) {
+ pr_err("%s(): error in adding element rc %d\n", __func__, rc);
+ return rc;
+ }
+ ring->ring_ctx_shadow->ev.rp = (ring->rd_offset *
+ sizeof(union mhi_dev_ring_element_type)) +
+ ring->ring_ctx->generic.rbase;
+
+ mhi_log(MHI_MSG_VERBOSE, "ev.rp = %llx for %lld\n",
+ ring->ring_ctx_shadow->ev.rp, evnt_ring_idx);
+
+ if (mhi->use_ipa)
+ transfer_addr.host_pa = (mhi->ev_ctx_shadow.host_pa +
+ sizeof(struct mhi_dev_ev_ctx) *
+ evnt_ring) + (uint32_t)&ring->ring_ctx->ev.rp -
+ (uint32_t)ring->ring_ctx;
+ else
+ transfer_addr.device_va = (mhi->ev_ctx_shadow.device_va +
+ sizeof(struct mhi_dev_ev_ctx) *
+ evnt_ring) + (uint32_t)&ring->ring_ctx->ev.rp -
+ (uint32_t)ring->ring_ctx;
+
+ transfer_addr.virt_addr = &ring->ring_ctx_shadow->ev.rp;
+ transfer_addr.size = sizeof(uint64_t);
+ ereq->event_type = SEND_EVENT_RD_OFFSET;
+ ereq->client_cb = mhi_dev_event_rd_offset_completion_cb;
+ ereq->event_ring = evnt_ring;
+ mhi_dev_write_to_host(mhi, &transfer_addr, ereq, MHI_DEV_DMA_ASYNC);
return rc;
}
@@ -564,6 +822,21 @@
}
EXPORT_SYMBOL(mhi_dev_send_ee_event);
+static void mhi_dev_trigger_cb(void)
+{
+ struct mhi_dev_ready_cb_info *info;
+ uint32_t state_data;
+
+ mutex_lock(&mhi_ctx->mhi_lock);
+ list_for_each_entry(info, &mhi_ctx->client_cb_list, list)
+ if (info->cb) {
+ mhi_ctrl_state_info(&state_data);
+ info->cb_data.ctrl_info = state_data;
+ info->cb(&info->cb_data);
+ }
+ mutex_unlock(&mhi_ctx->mhi_lock);
+}
+
int mhi_dev_trigger_hw_acc_wakeup(struct mhi_dev *mhi)
{
int rc = 0;
@@ -591,7 +864,7 @@
event.evt_cmd_comp.ptr = mhi->cmd_ctx_cache->rbase
+ (mhi->ring[MHI_RING_CMD_ID].rd_offset *
(sizeof(union mhi_dev_ring_element_type)));
- mhi_log(MHI_MSG_ERROR, "evt cmd comp ptr :%d\n",
+ mhi_log(MHI_MSG_VERBOSE, "evt cmd comp ptr :%d\n",
(uint32_t) event.evt_cmd_comp.ptr);
event.evt_cmd_comp.type = MHI_DEV_RING_EL_CMD_COMPLETION_EVT;
event.evt_cmd_comp.code = MHI_CMD_COMPL_CODE_SUCCESS;
@@ -607,27 +880,38 @@
struct mhi_dev *mhi)
{
int rc = 0;
- struct mhi_addr host_addr;
+ struct mhi_addr data_transfer;
if (ring->rd_offset != ring->wr_offset &&
mhi->ch_ctx_cache[ch_id].ch_type ==
MHI_DEV_CH_TYPE_OUTBOUND_CHANNEL) {
- mhi_log(MHI_MSG_INFO, "Pending transaction to be processed\n");
+ mhi_log(MHI_MSG_INFO, "Pending outbound transaction\n");
return 0;
} else if (mhi->ch_ctx_cache[ch_id].ch_type ==
MHI_DEV_CH_TYPE_INBOUND_CHANNEL &&
mhi->ch[ch_id].wr_request_active) {
+ mhi_log(MHI_MSG_INFO, "Pending inbound transaction\n");
return 0;
}
/* set the channel to stop */
mhi->ch_ctx_cache[ch_id].ch_state = MHI_DEV_CH_STATE_STOP;
+ mhi->ch[ch_id].state = MHI_DEV_CH_STOPPED;
- host_addr.host_pa = mhi->ch_ctx_shadow.host_pa +
+ if (mhi->use_ipa) {
+ data_transfer.host_pa = mhi->ch_ctx_shadow.host_pa +
sizeof(struct mhi_dev_ch_ctx) * ch_id;
+ } else {
+ data_transfer.device_va = mhi->ch_ctx_shadow.device_va +
+ sizeof(struct mhi_dev_ch_ctx) * ch_id;
+ data_transfer.device_pa = mhi->ch_ctx_shadow.device_pa +
+ sizeof(struct mhi_dev_ch_ctx) * ch_id;
+ }
+ data_transfer.size = sizeof(enum mhi_dev_ch_ctx_state);
+ data_transfer.virt_addr = &mhi->ch_ctx_cache[ch_id].ch_state;
+
/* update the channel state in the host */
- mhi_dev_write_to_host(&host_addr, &mhi->ch_ctx_cache[ch_id].ch_state,
- sizeof(enum mhi_dev_ch_ctx_state), mhi);
+ mhi_dev_write_to_host(mhi, &data_transfer, NULL, MHI_DEV_DMA_SYNC);
/* send the completion event to the host */
rc = mhi_dev_send_cmd_comp_event(mhi);
@@ -644,14 +928,16 @@
uint32_t ch_id = 0;
union mhi_dev_ring_element_type event;
struct mhi_addr host_addr;
+ struct mhi_dev_channel *ch;
+ struct mhi_dev_ring *ring;
- mhi_log(MHI_MSG_ERROR, "for channel:%d and cmd:%d\n",
- ch_id, el->generic.type);
ch_id = el->generic.chid;
+ mhi_log(MHI_MSG_VERBOSE, "for channel:%d and cmd:%d\n",
+ ch_id, el->generic.type);
switch (el->generic.type) {
case MHI_DEV_RING_EL_START:
- mhi_log(MHI_MSG_ERROR, "recived start cmd for channel %d\n",
+ mhi_log(MHI_MSG_VERBOSE, "recived start cmd for channel %d\n",
ch_id);
if (ch_id >= (HW_CHANNEL_BASE)) {
rc = mhi_hwc_chcmd(mhi, ch_id, el->generic.type);
@@ -680,6 +966,7 @@
/* set the channel to running */
mhi->ch_ctx_cache[ch_id].ch_state = MHI_DEV_CH_STATE_RUNNING;
+ mhi->ch[ch_id].state = MHI_DEV_CH_STARTED;
mhi->ch[ch_id].ch_id = ch_id;
mhi->ch[ch_id].ring = &mhi->ring[mhi->ch_ring_start + ch_id];
mhi->ch[ch_id].ch_type = mhi->ch_ctx_cache[ch_id].ch_type;
@@ -691,17 +978,26 @@
return;
}
- host_addr.host_pa = mhi->ch_ctx_shadow.host_pa +
+ if (mhi->use_ipa)
+ host_addr.host_pa = mhi->ch_ctx_shadow.host_pa +
sizeof(struct mhi_dev_ch_ctx) * ch_id;
- mhi_dev_write_to_host(&host_addr,
- &mhi->ch_ctx_cache[ch_id].ch_state,
- sizeof(enum mhi_dev_ch_ctx_state), mhi);
+ else
+ host_addr.device_va = mhi->ch_ctx_shadow.device_va +
+ sizeof(struct mhi_dev_ch_ctx) * ch_id;
+
+ host_addr.virt_addr = &mhi->ch_ctx_cache[ch_id].ch_state;
+ host_addr.size = sizeof(enum mhi_dev_ch_ctx_state);
+
+ mhi_dev_write_to_host(mhi, &host_addr, NULL, MHI_DEV_DMA_SYNC);
send_start_completion_event:
rc = mhi_dev_send_cmd_comp_event(mhi);
if (rc)
pr_err("Error sending command completion event\n");
+ /* Trigger callback to clients */
+ mhi_dev_trigger_cb();
+
break;
case MHI_DEV_RING_EL_STOP:
if (ch_id >= HW_CHANNEL_BASE) {
@@ -738,32 +1034,99 @@
* channel command to check if one can suspend the
* command.
*/
+ ring = &mhi->ring[ch_id + mhi->ch_ring_start];
+ if (ring->state == RING_STATE_UINT) {
+ pr_err("Channel not opened for %d\n", ch_id);
+ return;
+ }
+
+ ch = &mhi->ch[ch_id];
+
+ mutex_lock(&ch->ch_lock);
+
mhi->ch[ch_id].state = MHI_DEV_CH_PENDING_STOP;
rc = mhi_dev_process_stop_cmd(
&mhi->ring[mhi->ch_ring_start + ch_id],
ch_id, mhi);
+ if (rc)
+ pr_err("stop event send failed\n");
+
+ mutex_unlock(&ch->ch_lock);
+ }
+ break;
+ case MHI_DEV_RING_EL_RESET:
+ mhi_log(MHI_MSG_VERBOSE,
+ "received reset cmd for channel %d\n", ch_id);
+ if (ch_id >= HW_CHANNEL_BASE) {
+ rc = mhi_hwc_chcmd(mhi, ch_id, el->generic.type);
+ if (rc) {
+ mhi_log(MHI_MSG_ERROR,
+ "send channel stop cmd event failed\n");
+ return;
+ }
+
+ /* send the completion event to the host */
+ event.evt_cmd_comp.ptr = mhi->cmd_ctx_cache->rbase +
+ (mhi->ring[MHI_RING_CMD_ID].rd_offset *
+ (sizeof(union mhi_dev_ring_element_type)));
+ event.evt_cmd_comp.type =
+ MHI_DEV_RING_EL_CMD_COMPLETION_EVT;
+ if (rc == 0)
+ event.evt_cmd_comp.code =
+ MHI_CMD_COMPL_CODE_SUCCESS;
+ else
+ event.evt_cmd_comp.code =
+ MHI_CMD_COMPL_CODE_UNDEFINED;
+
+ rc = mhi_dev_send_event(mhi, 0, &event);
if (rc) {
pr_err("stop event send failed\n");
return;
}
+ } else {
+
+ mhi_log(MHI_MSG_VERBOSE,
+ "received reset cmd for channel %d\n",
+ ch_id);
+
+ ring = &mhi->ring[ch_id + mhi->ch_ring_start];
+ if (ring->state == RING_STATE_UINT) {
+ pr_err("Channel not opened for %d\n", ch_id);
+ return;
+ }
+
+ ch = &mhi->ch[ch_id];
+
+ mutex_lock(&ch->ch_lock);
+
+ /* hard stop and set the channel to stop */
+ mhi->ch_ctx_cache[ch_id].ch_state =
+ MHI_DEV_CH_STATE_DISABLED;
+ mhi->ch[ch_id].state = MHI_DEV_CH_STOPPED;
+ if (mhi->use_ipa)
+ host_addr.host_pa =
+ mhi->ch_ctx_shadow.host_pa +
+ (sizeof(struct mhi_dev_ch_ctx) * ch_id);
+ else
+ host_addr.device_va =
+ mhi->ch_ctx_shadow.device_va +
+ (sizeof(struct mhi_dev_ch_ctx) * ch_id);
+
+ host_addr.virt_addr =
+ &mhi->ch_ctx_cache[ch_id].ch_state;
+ host_addr.size = sizeof(enum mhi_dev_ch_ctx_state);
+
+ /* update the channel state in the host */
+ mhi_dev_write_to_host(mhi, &host_addr, NULL,
+ MHI_DEV_DMA_SYNC);
+
+ /* send the completion event to the host */
+ rc = mhi_dev_send_cmd_comp_event(mhi);
+ if (rc)
+ pr_err("Error sending command completion event\n");
+ mutex_unlock(&ch->ch_lock);
}
break;
- case MHI_DEV_RING_EL_RESET:
- /* hard stop and set the channel to stop */
- mhi->ch_ctx_cache[ch_id].ch_state = MHI_DEV_CH_STATE_STOP;
- host_addr.host_pa = mhi->ch_ctx_shadow.host_pa +
- sizeof(struct mhi_dev_ch_ctx) * ch_id;
-
- /* update the channel state in the host */
- mhi_dev_write_to_host(&host_addr,
- &mhi->ch_ctx_cache[ch_id].ch_state,
- sizeof(enum mhi_dev_ch_ctx_state), mhi);
-
- /* send the completion event to the host */
- rc = mhi_dev_send_cmd_comp_event(mhi);
- if (rc)
- pr_err("Error sending command completion event\n");
- break;
default:
pr_err("%s: Invalid command:%d\n", __func__, el->generic.type);
break;
@@ -778,7 +1141,7 @@
struct mhi_dev_client_cb_reason reason;
if (ring->id < mhi->ch_ring_start) {
- mhi_log(MHI_MSG_ERROR,
+ mhi_log(MHI_MSG_VERBOSE,
"invalid channel ring id (%d), should be < %d\n",
ring->id, mhi->ch_ring_start);
return;
@@ -816,7 +1179,7 @@
list_for_each_safe(cp, q, &mhi->process_ring_list) {
ring = list_entry(cp, struct mhi_dev_ring, list);
list_del(cp);
- mhi_log(MHI_MSG_ERROR, "processing ring %d\n", ring->id);
+ mhi_log(MHI_MSG_VERBOSE, "processing ring %d\n", ring->id);
rc = mhi_dev_process_ring(ring);
if (rc) {
mhi_log(MHI_MSG_ERROR,
@@ -879,7 +1242,7 @@
if (chintr_value & 1) {
ring = &mhi->ring[ch_num + mhi->ch_ring_start];
if (ring->state == RING_STATE_UINT) {
- pr_err("Channel not opened for %d\n", ch_num);
+ pr_debug("Channel not opened for %d\n", ch_num);
break;
}
mhi_ring_set_state(ring, RING_STATE_PENDING);
@@ -907,9 +1270,10 @@
for (i = 0; i < MHI_MASK_ROWS_CH_EV_DB; i++) {
ch_num = i * MHI_MASK_CH_EV_LEN;
- chintr_value = mhi->chdb[i].status;
+ /* Process channel status whose mask is enabled */
+ chintr_value = (mhi->chdb[i].status & mhi->chdb[i].mask);
if (chintr_value) {
- mhi_log(MHI_MSG_ERROR,
+ mhi_log(MHI_MSG_VERBOSE,
"processing id: %d, ch interrupt 0x%x\n",
i, chintr_value);
mhi_dev_queue_channel_db(mhi, chintr_value, ch_num);
@@ -923,6 +1287,153 @@
}
}
+static int mhi_dev_abort(struct mhi_dev *mhi)
+{
+ struct mhi_dev_channel *ch;
+ struct mhi_dev_ring *ring;
+ int ch_id = 0, rc = 0;
+
+ /* Hard stop all the channels */
+ for (ch_id = 0; ch_id < mhi->cfg.channels; ch_id++) {
+ ring = &mhi->ring[ch_id + mhi->ch_ring_start];
+ if (ring->state == RING_STATE_UINT)
+ continue;
+
+ ch = &mhi->ch[ch_id];
+ mutex_lock(&ch->ch_lock);
+ mhi->ch[ch_id].state = MHI_DEV_CH_STOPPED;
+ mutex_unlock(&ch->ch_lock);
+ }
+
+ /* Update ctrl node */
+ mhi_update_state_info(MHI_STATE_DISCONNECTED);
+
+ flush_workqueue(mhi->ring_init_wq);
+ flush_workqueue(mhi->pending_ring_wq);
+
+ /* Initiate MHI IPA reset */
+ ipa_mhi_destroy();
+
+ /* Clean up initialized channels */
+ rc = mhi_deinit(mhi);
+ if (rc) {
+ pr_err("Error during mhi_deinit with %d\n", rc);
+ return rc;
+ }
+
+ rc = mhi_dev_mmio_mask_chdb_interrupts(mhi_ctx);
+ if (rc) {
+ pr_err("Failed to enable channel db\n");
+ return rc;
+ }
+
+ rc = mhi_dev_mmio_disable_ctrl_interrupt(mhi_ctx);
+ if (rc) {
+ pr_err("Failed to enable control interrupt\n");
+ return rc;
+ }
+
+ rc = mhi_dev_mmio_disable_cmdb_interrupt(mhi_ctx);
+ if (rc) {
+ pr_err("Failed to enable command db\n");
+ return rc;
+ }
+
+
+ atomic_set(&mhi_ctx->re_init_done, 0);
+
+ mhi_log(MHI_MSG_INFO,
+ "Register a PCIe callback during re-init\n");
+ mhi_ctx->event_reg.events = EP_PCIE_EVENT_LINKUP;
+ mhi_ctx->event_reg.user = mhi_ctx;
+ mhi_ctx->event_reg.mode = EP_PCIE_TRIGGER_CALLBACK;
+ mhi_ctx->event_reg.callback = mhi_dev_resume_init_with_link_up;
+ mhi_ctx->event_reg.options = MHI_REINIT;
+
+ rc = ep_pcie_register_event(mhi_ctx->phandle,
+ &mhi_ctx->event_reg);
+ if (rc) {
+ pr_err("Failed to register for events from PCIe\n");
+ return rc;
+ }
+
+ /* Set RESET field to 0 */
+ mhi_dev_mmio_reset(mhi_ctx);
+
+ return rc;
+}
+
+static void mhi_dev_transfer_completion_cb(void *mreq)
+{
+ struct mhi_dev_channel *ch;
+ struct mhi_dev_client *client;
+ union mhi_dev_ring_element_type *el;
+ int rc = 0;
+ struct mhi_req *req = (struct mhi_req *)mreq;
+ struct mhi_req *local_req = NULL;
+ union mhi_dev_ring_element_type *compl_ev = NULL;
+ struct mhi_dev *mhi = NULL;
+ unsigned long flags;
+
+ client = req->client;
+ ch = client->channel;
+ mhi = ch->ring->mhi_dev;
+ el = req->el;
+ local_req = req;
+ ch->curr_ereq->context = ch;
+
+ dma_unmap_single(&mhi_ctx->pdev->dev, req->dma,
+ req->len, DMA_FROM_DEVICE);
+
+ /* Trigger client call back */
+ req->client_cb(req);
+
+ if (el->tre.ieot) {
+ compl_ev = ch->curr_ereq->tr_events + ch->curr_ereq->num_events;
+ compl_ev->evt_tr_comp.chid = ch->ch_id;
+ compl_ev->evt_tr_comp.type =
+ MHI_DEV_RING_EL_TRANSFER_COMPLETION_EVENT;
+ compl_ev->evt_tr_comp.len = el->tre.len;
+ compl_ev->evt_tr_comp.code = MHI_CMD_COMPL_CODE_EOT;
+ compl_ev->evt_tr_comp.ptr = ch->ring->ring_ctx->generic.rbase +
+ local_req->rd_offset * TR_RING_ELEMENT_SZ;
+ ch->curr_ereq->num_events++;
+
+ if (ch->curr_ereq->num_events >= MAX_TR_EVENTS ||
+ local_req->snd_cmpl){
+ mhi_log(MHI_MSG_VERBOSE,
+ "num of tr events %d for ch %d\n",
+ ch->curr_ereq->num_events, ch->ch_id);
+ rc = mhi_dev_send_multiple_tr_events(mhi,
+ mhi->ch_ctx_cache[ch->ch_id].err_indx,
+ ch->curr_ereq, (ch->curr_ereq->num_events*
+ sizeof(union mhi_dev_ring_element_type)));
+ if (rc)
+ mhi_log(MHI_MSG_ERROR,
+ "failed to send compl evts\n");
+ if (!list_empty(&ch->event_req_buffers)) {
+ ch->curr_ereq =
+ container_of(ch->event_req_buffers.next,
+ struct event_req, list);
+ spin_lock_irqsave(&mhi->lock, flags);
+ list_del_init(&ch->curr_ereq->list);
+ spin_unlock_irqrestore(&mhi->lock, flags);
+ ch->curr_ereq->num_events = 0;
+ } else
+ pr_err("%s evt req buffers empty\n", __func__);
+ }
+ } else
+ mhi_log(MHI_MSG_ERROR, "ieot is not valid\n");
+
+ if (ch->state == MHI_DEV_CH_PENDING_STOP) {
+ ch->state = MHI_DEV_CH_STOPPED;
+ rc = mhi_dev_process_stop_cmd(ch->ring, ch->ch_id, mhi_ctx);
+ if (rc)
+ mhi_log(MHI_MSG_ERROR,
+ "Error while stopping channel (%d)\n", ch->ch_id);
+ }
+}
+
static void mhi_dev_scheduler(struct work_struct *work)
{
struct mhi_dev *mhi = container_of(work,
@@ -932,38 +1443,48 @@
struct mhi_dev_ring *ring;
enum mhi_dev_state state;
enum mhi_dev_event event = 0;
+ bool mhi_reset = false;
mutex_lock(&mhi_ctx->mhi_lock);
/* Check for interrupts */
mhi_dev_core_ack_ctrl_interrupts(mhi, &int_value);
if (int_value & MHI_MMIO_CTRL_INT_STATUS_A7_MSK) {
- mhi_log(MHI_MSG_ERROR,
+ mhi_log(MHI_MSG_VERBOSE,
"processing ctrl interrupt with %d\n", int_value);
- rc = mhi_dev_mmio_get_mhi_state(mhi, &state);
+ rc = mhi_dev_mmio_get_mhi_state(mhi, &state, &mhi_reset);
if (rc) {
pr_err("%s: get mhi state failed\n", __func__);
mutex_unlock(&mhi_ctx->mhi_lock);
return;
}
+ if (mhi_reset) {
+ mhi_log(MHI_MSG_VERBOSE,
+ "processing mhi device reset\n");
+ rc = mhi_dev_abort(mhi);
+ if (rc)
+ pr_err("device reset failed:%d\n", rc);
+ mutex_unlock(&mhi_ctx->mhi_lock);
+ queue_work(mhi->ring_init_wq, &mhi->re_init);
+ return;
+ }
+
rc = mhi_dev_get_event_notify(state, &event);
if (rc) {
pr_err("unsupported state :%d\n", state);
- mutex_unlock(&mhi_ctx->mhi_lock);
- return;
+ goto fail;
}
rc = mhi_dev_notify_sm_event(event);
if (rc) {
pr_err("error sending SM event\n");
- mutex_unlock(&mhi_ctx->mhi_lock);
- return;
+ goto fail;
}
}
if (int_value & MHI_MMIO_CTRL_CRDB_STATUS_MSK) {
- mhi_log(MHI_MSG_ERROR,
+ mhi_log(MHI_MSG_VERBOSE,
"processing cmd db interrupt with %d\n", int_value);
ring = &mhi->ring[MHI_RING_CMD_ID];
ring->state = RING_STATE_PENDING;
@@ -973,20 +1494,67 @@
/* get the specific channel interrupts */
mhi_dev_check_channel_interrupt(mhi);
+fail:
mutex_unlock(&mhi_ctx->mhi_lock);
- ep_pcie_mask_irq_event(mhi->phandle,
+
+ if (mhi->config_iatu || mhi->mhi_int)
+ enable_irq(mhi->mhi_irq);
+ else
+ ep_pcie_mask_irq_event(mhi->phandle,
EP_PCIE_INT_EVT_MHI_A7, true);
}
void mhi_dev_notify_a7_event(struct mhi_dev *mhi)
{
+
+ if (!atomic_read(&mhi->mhi_dev_wake)) {
+ pm_stay_awake(mhi->dev);
+ atomic_set(&mhi->mhi_dev_wake, 1);
+ }
+ mhi_log(MHI_MSG_VERBOSE, "acquiring mhi wakelock\n");
+
schedule_work(&mhi->chdb_ctrl_work);
- mhi_log(MHI_MSG_ERROR, "mhi irq triggered\n");
+ mhi_log(MHI_MSG_VERBOSE, "mhi irq triggered\n");
}
EXPORT_SYMBOL(mhi_dev_notify_a7_event);
+static irqreturn_t mhi_dev_isr(int irq, void *dev_id)
+{
+ struct mhi_dev *mhi = dev_id;
+
+ disable_irq_nosync(mhi->mhi_irq);
+ schedule_work(&mhi->chdb_ctrl_work);
+ mhi_log(MHI_MSG_VERBOSE, "mhi irq triggered\n");
+
+ return IRQ_HANDLED;
+}
+
int mhi_dev_config_outbound_iatu(struct mhi_dev *mhi)
{
+ struct ep_pcie_iatu control, data;
+ int rc = 0;
+ struct ep_pcie_iatu entries[MHI_HOST_REGION_NUM];
+
+ data.start = mhi->data_base.device_pa;
+ data.end = mhi->data_base.device_pa + mhi->data_base.size - 1;
+ data.tgt_lower = HOST_ADDR_LSB(mhi->data_base.host_pa);
+ data.tgt_upper = HOST_ADDR_MSB(mhi->data_base.host_pa);
+
+ control.start = mhi->ctrl_base.device_pa;
+ control.end = mhi->ctrl_base.device_pa + mhi->ctrl_base.size - 1;
+ control.tgt_lower = HOST_ADDR_LSB(mhi->ctrl_base.host_pa);
+ control.tgt_upper = HOST_ADDR_MSB(mhi->ctrl_base.host_pa);
+
+ entries[0] = data;
+ entries[1] = control;
+
+ rc = ep_pcie_config_outbound_iatu(mhi_ctx->phandle, entries,
+ MHI_HOST_REGION_NUM);
+ if (rc) {
+ pr_err("error configure iATU\n");
+ return rc;
+ }
+
return 0;
}
EXPORT_SYMBOL(mhi_dev_config_outbound_iatu);
@@ -996,6 +1564,7 @@
int rc = 0;
struct platform_device *pdev;
uint64_t addr1 = 0;
+ struct mhi_addr data_transfer;
pdev = mhi->pdev;
@@ -1014,6 +1583,37 @@
mhi->host_addr.data_limit_msb);
mhi->data_base.size = addr1 - mhi->data_base.host_pa;
+ if (mhi->config_iatu) {
+ if (mhi->ctrl_base.host_pa > mhi->data_base.host_pa) {
+ mhi->data_base.device_pa = mhi->device_local_pa_base;
+ mhi->ctrl_base.device_pa = mhi->device_local_pa_base +
+ mhi->ctrl_base.host_pa - mhi->data_base.host_pa;
+ } else {
+ mhi->ctrl_base.device_pa = mhi->device_local_pa_base;
+ mhi->data_base.device_pa = mhi->device_local_pa_base +
+ mhi->data_base.host_pa - mhi->ctrl_base.host_pa;
+ }
+
+ if (!mhi->use_ipa) {
+ mhi->ctrl_base.device_va =
+ (uintptr_t) devm_ioremap_nocache(&pdev->dev,
+ mhi->ctrl_base.device_pa,
+ mhi->ctrl_base.size);
+ if (!mhi->ctrl_base.device_va) {
+ pr_err("io remap failed for mhi address\n");
+ return -EINVAL;
+ }
+ }
+ }
+
+ if (mhi->config_iatu) {
+ rc = mhi_dev_config_outbound_iatu(mhi);
+ if (rc) {
+ pr_err("Configuring iATU failed\n");
+ return rc;
+ }
+ }
+
/* Get Channel, event and command context base pointer */
rc = mhi_dev_mmio_get_chc_base(mhi);
if (rc) {
@@ -1062,30 +1662,44 @@
GFP_KERNEL);
if (!mhi->ev_ctx_cache)
return -ENOMEM;
+ memset(mhi->ev_ctx_cache, 0, sizeof(struct mhi_dev_ev_ctx) *
+ mhi->cfg.event_rings);
mhi->ch_ctx_cache = dma_alloc_coherent(&pdev->dev,
sizeof(struct mhi_dev_ch_ctx) *
mhi->cfg.channels,
&mhi->ch_ctx_cache_dma_handle,
GFP_KERNEL);
- if (!mhi_ctx->ch_ctx_cache)
+ if (!mhi->ch_ctx_cache)
return -ENOMEM;
+ memset(mhi->ch_ctx_cache, 0, sizeof(struct mhi_dev_ch_ctx) *
+ mhi->cfg.channels);
+
+ if (mhi->use_ipa) {
+ data_transfer.phy_addr = mhi->cmd_ctx_cache_dma_handle;
+ data_transfer.host_pa = mhi->cmd_ctx_shadow.host_pa;
+ }
+
+ data_transfer.size = mhi->cmd_ctx_shadow.size;
/* Cache the command and event context */
- mhi_dev_read_from_host(&mhi->cmd_ctx_shadow,
- mhi->cmd_ctx_cache_dma_handle,
- mhi->cmd_ctx_shadow.size);
+ mhi_dev_read_from_host(mhi, &data_transfer);
- mhi_dev_read_from_host(&mhi->ev_ctx_shadow,
- mhi->ev_ctx_cache_dma_handle,
- mhi->ev_ctx_shadow.size);
+ if (mhi->use_ipa) {
+ data_transfer.phy_addr = mhi->ev_ctx_cache_dma_handle;
+ data_transfer.host_pa = mhi->ev_ctx_shadow.host_pa;
+ }
- mhi_log(MHI_MSG_ERROR,
+ data_transfer.size = mhi->ev_ctx_shadow.size;
+
+ mhi_dev_read_from_host(mhi, &data_transfer);
+
+ mhi_log(MHI_MSG_VERBOSE,
"cmd ring_base:0x%llx, rp:0x%llx, wp:0x%llx\n",
mhi->cmd_ctx_cache->rbase,
mhi->cmd_ctx_cache->rp,
mhi->cmd_ctx_cache->wp);
- mhi_log(MHI_MSG_ERROR,
+ mhi_log(MHI_MSG_VERBOSE,
"ev ring_base:0x%llx, rp:0x%llx, wp:0x%llx\n",
mhi_ctx->ev_ctx_cache->rbase,
mhi->ev_ctx_cache->rp,
@@ -1104,7 +1718,7 @@
int mhi_dev_suspend(struct mhi_dev *mhi)
{
int ch_id = 0, rc = 0;
- struct mhi_addr host_addr;
+ struct mhi_addr data_transfer;
mutex_lock(&mhi_ctx->mhi_write_test);
atomic_set(&mhi->is_suspended, 1);
@@ -1116,19 +1730,28 @@
mhi->ch_ctx_cache[ch_id].ch_state = MHI_DEV_CH_STATE_SUSPENDED;
- host_addr.host_pa = mhi->ch_ctx_shadow.host_pa +
+ if (mhi->use_ipa) {
+ data_transfer.host_pa = mhi->ch_ctx_shadow.host_pa +
sizeof(struct mhi_dev_ch_ctx) * ch_id;
+ } else {
+ data_transfer.device_va = mhi->ch_ctx_shadow.device_va +
+ sizeof(struct mhi_dev_ch_ctx) * ch_id;
+ data_transfer.device_pa = mhi->ch_ctx_shadow.device_pa +
+ sizeof(struct mhi_dev_ch_ctx) * ch_id;
+ }
+
+ data_transfer.size = sizeof(enum mhi_dev_ch_ctx_state);
+ data_transfer.virt_addr = &mhi->ch_ctx_cache[ch_id].ch_state;
/* update the channel state in the host */
- mhi_dev_write_to_host(&host_addr,
- &mhi->ch_ctx_cache[ch_id].ch_state,
- sizeof(enum mhi_dev_ch_ctx_state), mhi);
+ mhi_dev_write_to_host(mhi, &data_transfer, NULL,
+ MHI_DEV_DMA_SYNC);
}
- rc = ipa_dma_disable();
- if (rc)
- pr_err("Disable IPA failed\n");
+ atomic_set(&mhi->mhi_dev_wake, 0);
+ pm_relax(mhi->dev);
+ mhi_log(MHI_MSG_VERBOSE, "releasing mhi wakelock\n");
mutex_unlock(&mhi_ctx->mhi_write_test);
@@ -1139,13 +1762,7 @@
int mhi_dev_resume(struct mhi_dev *mhi)
{
int ch_id = 0, rc = 0;
- struct mhi_addr host_addr;
-
- rc = ipa_dma_enable();
- if (rc) {
- pr_err("IPA enable failed\n");
- return rc;
- }
+ struct mhi_addr data_transfer;
for (ch_id = 0; ch_id < mhi->cfg.channels; ch_id++) {
if (mhi->ch_ctx_cache[ch_id].ch_state !=
@@ -1153,14 +1770,24 @@
continue;
mhi->ch_ctx_cache[ch_id].ch_state = MHI_DEV_CH_STATE_RUNNING;
- host_addr.host_pa = mhi->ch_ctx_shadow.host_pa +
+ if (mhi->use_ipa) {
+ data_transfer.host_pa = mhi->ch_ctx_shadow.host_pa +
sizeof(struct mhi_dev_ch_ctx) * ch_id;
+ } else {
+ data_transfer.device_va = mhi->ch_ctx_shadow.device_va +
+ sizeof(struct mhi_dev_ch_ctx) * ch_id;
+ data_transfer.device_pa = mhi->ch_ctx_shadow.device_pa +
+ sizeof(struct mhi_dev_ch_ctx) * ch_id;
+ }
+
+ data_transfer.size = sizeof(enum mhi_dev_ch_ctx_state);
+ data_transfer.virt_addr = &mhi->ch_ctx_cache[ch_id].ch_state;
/* update the channel state in the host */
- mhi_dev_write_to_host(&host_addr,
- &mhi->ch_ctx_cache[ch_id].ch_state,
- sizeof(enum mhi_dev_ch_ctx_state), mhi);
+ mhi_dev_write_to_host(mhi, &data_transfer, NULL,
+ MHI_DEV_DMA_SYNC);
}
+ mhi_update_state_info(MHI_STATE_CONNECTED);
atomic_set(&mhi->is_suspended, 0);
@@ -1312,14 +1939,14 @@
mhi_dev_send_completion_event(ch,
ring->rd_offset, el->tre.len,
MHI_CMD_COMPL_CODE_EOB);
- *chain = 1;
+ *chain = 1;
} else {
if (el->tre.ieot)
mhi_dev_send_completion_event(
ch, ring->rd_offset, el->tre.len,
MHI_CMD_COMPL_CODE_EOT);
- td_done = 1;
- *chain = 0;
+ td_done = 1;
+ *chain = 0;
}
mhi_dev_ring_inc_index(ring, ring->rd_offset);
ch->tre_bytes_left = 0;
@@ -1329,53 +1956,67 @@
return td_done;
}
-int mhi_dev_read_channel(struct mhi_dev_client *handle_client,
- void *buf, uint32_t buf_size, uint32_t *chain)
+int mhi_dev_read_channel(struct mhi_req *mreq)
{
struct mhi_dev_channel *ch;
struct mhi_dev_ring *ring;
union mhi_dev_ring_element_type *el;
- uint32_t ch_id;
size_t bytes_to_read, addr_offset;
uint64_t read_from_loc;
ssize_t bytes_read = 0;
uint32_t write_to_loc = 0;
- size_t usr_buf_remaining = buf_size;
+ size_t usr_buf_remaining;
int td_done = 0, rc = 0;
+ struct mhi_dev_client *handle_client;
- if (!handle_client) {
- mhi_log(MHI_MSG_ERROR, "invalid client handle\n");
+ if (!mreq) {
+ mhi_log(MHI_MSG_ERROR, "invalid mhi request\n");
return -ENXIO;
}
+ if (mhi_ctx->ctrl_info != MHI_STATE_CONNECTED) {
+ pr_err("Channel not connected:%d\n", mhi_ctx->ctrl_info);
+ return -ENODEV;
+ }
+
+ if (!mreq->client) {
+ mhi_log(MHI_MSG_ERROR, "invalid mhi request\n");
+ return -ENXIO;
+ }
+ handle_client = mreq->client;
ch = handle_client->channel;
+ usr_buf_remaining = mreq->len;
ring = ch->ring;
- ch_id = ch->ch_id;
- *chain = 0;
+ mreq->chain = 0;
mutex_lock(&ch->ch_lock);
do {
el = &ring->ring_cache[ring->rd_offset];
+ mhi_log(MHI_MSG_VERBOSE, "evtptr : 0x%llx\n",
+ el->tre.data_buf_ptr);
+ mhi_log(MHI_MSG_VERBOSE, "evntlen : 0x%x, offset:%d\n",
+ el->tre.len, ring->rd_offset);
+
if (ch->tre_loc) {
bytes_to_read = min(usr_buf_remaining,
ch->tre_bytes_left);
- *chain = 1;
- mhi_log(MHI_MSG_ERROR,
+ mreq->chain = 1;
+ mhi_log(MHI_MSG_VERBOSE,
"remaining buffered data size %d\n",
(int) ch->tre_bytes_left);
} else {
if (ring->rd_offset == ring->wr_offset) {
- mhi_log(MHI_MSG_ERROR,
+ mhi_log(MHI_MSG_VERBOSE,
"nothing to read, returning\n");
bytes_read = 0;
goto exit;
}
if (ch->state == MHI_DEV_CH_STOPPED) {
- mhi_log(MHI_MSG_ERROR,
+ mhi_log(MHI_MSG_VERBOSE,
"channel (%d) already stopped\n",
- ch_id);
+ mreq->chan);
bytes_read = -1;
goto exit;
}
@@ -1384,35 +2025,51 @@
ch->tre_size = el->tre.len;
ch->tre_bytes_left = ch->tre_size;
- mhi_log(MHI_MSG_ERROR,
+ mhi_log(MHI_MSG_VERBOSE,
"user_buf_remaining %d, ch->tre_size %d\n",
usr_buf_remaining, ch->tre_size);
bytes_to_read = min(usr_buf_remaining, ch->tre_size);
}
+ bytes_read += bytes_to_read;
addr_offset = ch->tre_size - ch->tre_bytes_left;
read_from_loc = ch->tre_loc + addr_offset;
- write_to_loc = (uint32_t) buf + (buf_size - usr_buf_remaining);
-
- mhi_log(MHI_MSG_ERROR, "reading %d bytes from chan %d\n",
- bytes_to_read, ch_id);
-
- mhi_transfer_host_to_device((void *) write_to_loc,
- read_from_loc, bytes_to_read, mhi_ctx);
-
- bytes_read += bytes_to_read;
+ write_to_loc = (uint32_t) mreq->buf +
+ (mreq->len - usr_buf_remaining);
ch->tre_bytes_left -= bytes_to_read;
- usr_buf_remaining -= bytes_to_read;
- td_done = mhi_dev_check_tre_bytes_left(ch, ring, el, chain);
- } while (usr_buf_remaining && !td_done);
-
- if (td_done && ch->state == MHI_DEV_CH_PENDING_STOP) {
- ch->state = MHI_DEV_CH_STOPPED;
- rc = mhi_dev_process_stop_cmd(ring, ch_id, mhi_ctx);
+ mreq->el = el;
+ mreq->actual_len = bytes_read;
+ mreq->rd_offset = ring->rd_offset;
+ mhi_log(MHI_MSG_VERBOSE, "reading %d bytes from chan %d\n",
+ bytes_to_read, mreq->chan);
+ rc = mhi_transfer_host_to_device((void *) write_to_loc,
+ read_from_loc, bytes_to_read, mhi_ctx, mreq);
if (rc) {
mhi_log(MHI_MSG_ERROR,
- "Error while stopping channel (%d)\n", ch_id);
- bytes_read = -1;
+ "Error while reading chan (%d) rc %d\n",
+ mreq->chan, rc);
+ mutex_unlock(&ch->ch_lock);
+ return rc;
+ }
+ usr_buf_remaining -= bytes_to_read;
+
+ if (mreq->mode == IPA_DMA_ASYNC) {
+ ch->tre_bytes_left = 0;
+ ch->tre_loc = 0;
+ goto exit;
+ } else {
+ td_done = mhi_dev_check_tre_bytes_left(ch, ring,
+ el, &mreq->chain);
+ }
+ } while (usr_buf_remaining && !td_done);
+ if (td_done && ch->state == MHI_DEV_CH_PENDING_STOP) {
+ ch->state = MHI_DEV_CH_STOPPED;
+ rc = mhi_dev_process_stop_cmd(ring, mreq->chan, mhi_ctx);
+ if (rc) {
+ mhi_log(MHI_MSG_ERROR,
+ "Error while stopping channel (%d)\n",
+ mreq->chan);
+ bytes_read = -EIO;
}
}
exit:
@@ -1441,32 +2098,33 @@
}
}
-int mhi_dev_write_channel(struct mhi_dev_client *handle_client,
- void *buf, size_t buf_size)
+int mhi_dev_write_channel(struct mhi_req *wreq)
{
struct mhi_dev_channel *ch;
struct mhi_dev_ring *ring;
+ struct mhi_dev_client *handle_client;
union mhi_dev_ring_element_type *el;
enum mhi_dev_cmd_completion_code code = MHI_CMD_COMPL_CODE_INVALID;
int rc = 0;
- uint64_t ch_id, skip_tres = 0, write_to_loc;
+ uint64_t skip_tres = 0, write_to_loc;
uint32_t read_from_loc;
- size_t usr_buf_remaining = buf_size;
+ size_t usr_buf_remaining;
size_t usr_buf_offset = 0;
size_t bytes_to_write = 0;
size_t bytes_written = 0;
uint32_t tre_len = 0, suspend_wait_timeout = 0;
- if (!handle_client) {
- pr_err("%s: invalid client handle\n", __func__);
+ if (!wreq || !wreq->client || !wreq->buf) {
+ pr_err("%s: invalid parameters\n", __func__);
return -ENXIO;
}
- if (!buf) {
- pr_err("%s: invalid buffer to write data\n", __func__);
- return -ENXIO;
+ if (mhi_ctx->ctrl_info != MHI_STATE_CONNECTED) {
+ pr_err("Channel not connected:%d\n", mhi_ctx->ctrl_info);
+ return -ENODEV;
}
+ usr_buf_remaining = wreq->len;
mutex_lock(&mhi_ctx->mhi_write_test);
if (atomic_read(&mhi_ctx->is_suspended)) {
@@ -1482,31 +2140,29 @@
}
}
- atomic_inc(&mhi_ctx->write_active);
while (atomic_read(&mhi_ctx->is_suspended) &&
- suspend_wait_timeout < MHI_SUSPEND_WAIT_TIMEOUT) {
+ suspend_wait_timeout < MHI_SUSPEND_TIMEOUT) {
/* wait for the suspend to finish */
- usleep_range(MHI_SUSPEND_WAIT_MIN, MHI_SUSPEND_WAIT_MAX);
+ msleep(MHI_SUSPEND_MIN);
suspend_wait_timeout++;
}
-
+ handle_client = wreq->client;
ch = handle_client->channel;
ch->wr_request_active = true;
ring = ch->ring;
- ch_id = ch->ch_id;
mutex_lock(&ch->ch_lock);
if (ch->state == MHI_DEV_CH_STOPPED) {
mhi_log(MHI_MSG_ERROR,
- "channel (%lld) already stopped\n", ch_id);
+ "channel %d already stopped\n", wreq->chan);
bytes_written = -1;
goto exit;
}
if (ch->state == MHI_DEV_CH_PENDING_STOP) {
- if (mhi_dev_process_stop_cmd(ring, ch_id, mhi_ctx) < 0)
+ if (mhi_dev_process_stop_cmd(ring, wreq->chan, mhi_ctx) < 0)
bytes_written = -1;
goto exit;
}
@@ -1516,20 +2172,38 @@
do {
if (ring->rd_offset == ring->wr_offset) {
+ mhi_log(MHI_MSG_ERROR,
+ "%s():rd & wr offsets are equal\n",
+ __func__);
mhi_log(MHI_MSG_INFO, "No TREs available\n");
break;
}
el = &ring->ring_cache[ring->rd_offset];
tre_len = el->tre.len;
+ if (wreq->len > tre_len) {
+ pr_err("%s(): rlen = %d, tlen = %d: client buf > tre len\n",
+ __func__, wreq->len, tre_len);
+ bytes_written = -ENOMEM;
+ goto exit;
+ }
bytes_to_write = min(usr_buf_remaining, tre_len);
- usr_buf_offset = buf_size - bytes_to_write;
- read_from_loc = (uint32_t) buf + usr_buf_offset;
+ usr_buf_offset = wreq->len - bytes_to_write;
+ read_from_loc = (uint32_t) wreq->buf + usr_buf_offset;
write_to_loc = el->tre.data_buf_ptr;
- mhi_transfer_device_to_host(write_to_loc,
+ wreq->rd_offset = ring->rd_offset;
+ wreq->el = el;
+ rc = mhi_transfer_device_to_host(write_to_loc,
(void *) read_from_loc,
- bytes_to_write, mhi_ctx);
+ bytes_to_write,
+ mhi_ctx, wreq);
+ if (rc) {
+ mhi_log(MHI_MSG_ERROR,
+ "Error while writing chan (%d) rc %d\n",
+ wreq->chan, rc);
+ goto exit;
+ }
bytes_written += bytes_to_write;
usr_buf_remaining -= bytes_to_write;
@@ -1543,33 +2217,34 @@
skip_tres = 1;
code = MHI_CMD_COMPL_CODE_EOT;
}
-
- if (mhi_dev_send_completion_event(ch,
- ring->rd_offset, bytes_to_write, code) < 0) {
- mhi_log(MHI_MSG_ERROR,
- "error sending completion event ch_id:%lld\n",
- ch_id);
+ if (wreq->mode == IPA_DMA_SYNC) {
+ rc = mhi_dev_send_completion_event(ch,
+ ring->rd_offset, bytes_to_write, code);
+ if (rc)
+ mhi_log(MHI_MSG_VERBOSE,
+ "err in snding cmpl evt ch:%d\n",
+ wreq->chan);
+ mhi_dev_ring_inc_index(ring, ring->rd_offset);
}
if (ch->state == MHI_DEV_CH_PENDING_STOP)
break;
- mhi_dev_ring_inc_index(ring, ring->rd_offset);
} while (!skip_tres && usr_buf_remaining);
if (skip_tres)
skip_to_next_td(ch);
if (ch->state == MHI_DEV_CH_PENDING_STOP) {
- rc = mhi_dev_process_stop_cmd(ring, ch_id, mhi_ctx);
+ rc = mhi_dev_process_stop_cmd(ring, wreq->chan, mhi_ctx);
if (rc) {
mhi_log(MHI_MSG_ERROR,
- "channel (%lld) stop failed\n", ch_id);
+ "channel %d stop failed\n", wreq->chan);
}
}
exit:
+ ch->wr_request_active = false;
mutex_unlock(&ch->ch_lock);
- atomic_dec(&mhi_ctx->write_active);
mutex_unlock(&mhi_ctx->mhi_write_test);
return bytes_written;
}
@@ -1581,21 +2256,22 @@
struct ep_pcie_msi_config msi_cfg;
struct mhi_dev *mhi = container_of(work,
struct mhi_dev, ring_init_cb_work);
-
+ bool mhi_reset;
enum mhi_dev_state state;
- uint32_t max_cnt = 0;
+ uint32_t max_cnt = 0, bhi_intvec = 0;
+ if (mhi->use_ipa) {
+ rc = ipa_dma_init();
+ if (rc) {
+ pr_err("ipa dma init failed\n");
+ return;
+ }
- rc = ipa_dma_init();
- if (rc) {
- pr_err("ipa dma init failed\n");
- return;
- }
-
- rc = ipa_dma_enable();
- if (rc) {
- pr_err("ipa enable failed\n");
- return;
+ rc = ipa_dma_enable();
+ if (rc) {
+ pr_err("ipa enable failed\n");
+ return;
+ }
}
rc = mhi_dev_ring_init(mhi);
@@ -1604,34 +2280,39 @@
return;
}
- /* Invoke MHI SM when device is in RESET state */
- mhi_dev_sm_init(mhi);
-
- /* set the env before setting the ready bit */
- rc = mhi_dev_mmio_set_env(mhi, MHI_ENV_VALUE);
- if (rc) {
- pr_err("%s: env setting failed\n", __func__);
- return;
- }
- mhi_uci_init();
-
- /* All set...let's notify the host */
- mhi_dev_sm_set_ready();
-
- rc = ep_pcie_get_msi_config(mhi->phandle, &msi_cfg);
+ /*Enable MHI dev network stack Interface*/
+ rc = mhi_dev_net_interface_init();
if (rc)
- pr_warn("MHI: error geting msi configs\n");
+ pr_err("%s Failed to initialize mhi_dev_net iface\n", __func__);
- rc = mhi_dev_mmio_get_mhi_state(mhi, &state);
+ rc = mhi_dev_mmio_read(mhi, BHI_INTVEC, &bhi_intvec);
+ if (rc)
+ return;
+
+ if (bhi_intvec != 0xffffffff) {
+ /* Indicate the host that the device is ready */
+ rc = ep_pcie_get_msi_config(mhi->phandle, &msi_cfg);
+ if (!rc) {
+ rc = ep_pcie_trigger_msi(mhi_ctx->phandle, bhi_intvec);
+ if (rc) {
+ pr_err("%s: error sending msi\n", __func__);
+ return;
+ }
+ } else {
+ pr_err("MHI: error geting msi configs\n");
+ }
+ }
+
+ rc = mhi_dev_mmio_get_mhi_state(mhi, &state, &mhi_reset);
if (rc) {
pr_err("%s: get mhi state failed\n", __func__);
return;
}
- while (state != MHI_DEV_M0_STATE && max_cnt < MHI_DEV_M0_MAX_CNT) {
+ while (state != MHI_DEV_M0_STATE && max_cnt < MHI_SUSPEND_TIMEOUT) {
/* Wait for Host to set the M0 state */
- usleep_range(MHI_M0_WAIT_MIN_USLEEP, MHI_M0_WAIT_MAX_USLEEP);
- rc = mhi_dev_mmio_get_mhi_state(mhi, &state);
+ msleep(MHI_SUSPEND_MIN);
+ rc = mhi_dev_mmio_get_mhi_state(mhi, &state, &mhi_reset);
if (rc) {
pr_err("%s: get mhi state failed\n", __func__);
return;
@@ -1663,6 +2344,11 @@
pr_err("error during hwc_init\n");
return;
}
+
+ if (mhi_ctx->config_iatu || mhi_ctx->mhi_int)
+ enable_irq(mhi_ctx->mhi_irq);
+
+ mhi_update_state_info(MHI_STATE_CONNECTED);
}
static void mhi_ring_init_cb(void *data)
@@ -1677,6 +2363,78 @@
queue_work(mhi->ring_init_wq, &mhi->ring_init_cb_work);
}
+int mhi_register_state_cb(void (*mhi_state_cb)
+ (struct mhi_dev_client_cb_data *cb_data),
+ void *data, enum mhi_client_channel channel)
+{
+ struct mhi_dev_ready_cb_info *cb_info = NULL;
+
+ if (!mhi_ctx) {
+ pr_err("MHI device not ready\n");
+ return -ENXIO;
+ }
+
+ if (channel > MHI_MAX_CHANNELS) {
+ pr_err("Invalid channel :%d\n", channel);
+ return -EINVAL;
+ }
+
+ mutex_lock(&mhi_ctx->mhi_lock);
+ cb_info = kmalloc(sizeof(struct mhi_dev_ready_cb_info), GFP_KERNEL);
+ if (!cb_info) {
+ mutex_unlock(&mhi_ctx->mhi_lock);
+ return -ENOMEM;
+ }
+
+ cb_info->cb = mhi_state_cb;
+ cb_info->cb_data.user_data = data;
+ cb_info->cb_data.channel = channel;
+
+ list_add_tail(&cb_info->list, &mhi_ctx->client_cb_list);
+
+ /**
+ * If channel is open during registration, no callback is issued.
+ * Instead return -EEXIST to notify the client. Clients request
+ * is added to the list to notify future state change notification.
+ */
+ if (mhi_ctx->ch[channel].state == MHI_DEV_CH_STARTED) {
+ mutex_unlock(&mhi_ctx->mhi_lock);
+ return -EEXIST;
+ }
+
+ mutex_unlock(&mhi_ctx->mhi_lock);
+
+ return 0;
+}
+EXPORT_SYMBOL(mhi_register_state_cb);
+
+static void mhi_update_state_info(uint32_t info)
+{
+ struct mhi_dev_client_cb_reason reason;
+
+ mhi_ctx->ctrl_info = info;
+
+ if (info == MHI_STATE_CONNECTED)
+ return;
+
+ reason.reason = MHI_DEV_CTRL_UPDATE;
+ uci_ctrl_update(&reason);
+}
+
+int mhi_ctrl_state_info(uint32_t *info)
+{
+ if (!info) {
+ pr_err("Invalid info\n");
+ return -EINVAL;
+ }
+
+ *info = mhi_ctx->ctrl_info;
+ mhi_log(MHI_MSG_VERBOSE, "ctrl:%d", mhi_ctx->ctrl_info);
+
+ return 0;
+}
+EXPORT_SYMBOL(mhi_ctrl_state_info);
+
static int get_device_tree_data(struct platform_device *pdev)
{
struct mhi_dev *mhi;
@@ -1725,13 +2483,11 @@
}
mhi->ipa_uc_mbox_erdb = res_mem->start;
-
mhi_ctx = mhi;
rc = of_property_read_u32((&pdev->dev)->of_node,
"qcom,mhi-ifc-id",
&mhi_ctx->ifc_id);
-
if (rc) {
pr_err("qcom,mhi-ifc-id does not exist.\n");
return rc;
@@ -1753,22 +2509,90 @@
return rc;
}
+ mhi_ctx->use_ipa = of_property_read_bool((&pdev->dev)->of_node,
+ "qcom,use-ipa-software-channel");
+
+ mhi_ctx->config_iatu = of_property_read_bool((&pdev->dev)->of_node,
+ "qcom,mhi-config-iatu");
+
+ if (mhi_ctx->config_iatu) {
+ rc = of_property_read_u32((&pdev->dev)->of_node,
+ "qcom,mhi-local-pa-base",
+ &mhi_ctx->device_local_pa_base);
+ if (rc) {
+ pr_err("qcom,mhi-local-pa-base does not exist\n");
+ return rc;
+ }
+ }
+
+ mhi_ctx->mhi_int = of_property_read_bool((&pdev->dev)->of_node,
+ "qcom,mhi-interrupt");
+
+ if (mhi->config_iatu || mhi_ctx->mhi_int) {
+ mhi->mhi_irq = platform_get_irq_byname(pdev, "mhi-device-inta");
+ if (mhi->mhi_irq < 0) {
+ pr_err("Invalid MHI device interrupt\n");
+ rc = mhi->mhi_irq;
+ return rc;
+ }
+ }
+
+ device_init_wakeup(mhi->dev, true);
+ /* MHI device will be woken up from PCIe event */
+ device_set_wakeup_capable(mhi->dev, false);
+ /* Hold a wakelock until completion of M0 */
+ pm_stay_awake(mhi->dev);
+ atomic_set(&mhi->mhi_dev_wake, 1);
+
+ mhi_log(MHI_MSG_VERBOSE, "acquiring wakelock\n");
+
return 0;
}
+static int mhi_deinit(struct mhi_dev *mhi)
+{
+ int rc = 0, i = 0, ring_id = 0;
+ struct mhi_dev_ring *ring;
+ struct platform_device *pdev = mhi->pdev;
+
+ ring_id = mhi->cfg.channels + mhi->cfg.event_rings + 1;
+
+ for (i = 0; i < ring_id; i++) {
+ ring = &mhi->ring[i];
+ if (ring->state == RING_STATE_UINT)
+ continue;
+
+ dma_free_coherent(mhi->dev, ring->ring_size *
+ sizeof(union mhi_dev_ring_element_type),
+ ring->ring_cache,
+ ring->ring_cache_dma_handle);
+ }
+
+ for (i = 0; i < mhi->cfg.channels; i++)
+ mutex_destroy(&mhi->ch[i].ch_lock);
+
+ devm_kfree(&pdev->dev, mhi->mmio_backup);
+ devm_kfree(&pdev->dev, mhi->ch);
+ devm_kfree(&pdev->dev, mhi->ring);
+
+ mhi_dev_sm_exit(mhi);
+
+ mhi->mmio_initialized = false;
+
+ return rc;
+}
+
static int mhi_init(struct mhi_dev *mhi)
{
int rc = 0, i = 0;
struct platform_device *pdev = mhi->pdev;
-
rc = mhi_dev_mmio_init(mhi);
if (rc) {
pr_err("Failed to update the MMIO init\n");
return rc;
}
-
mhi->ring = devm_kzalloc(&pdev->dev,
(sizeof(struct mhi_dev_ring) *
(mhi->cfg.channels + mhi->cfg.event_rings + 1)),
@@ -1782,46 +2606,148 @@
if (!mhi->ch)
return -ENOMEM;
- for (i = 0; i < mhi->cfg.channels; i++)
- mutex_init(&mhi->ch[i].ch_lock);
- mhi->mmio_backup = devm_kzalloc(&pdev->dev, MHI_DEV_MMIO_RANGE,
- GFP_KERNEL);
+ for (i = 0; i < mhi->cfg.channels; i++) {
+ mutex_init(&mhi->ch[i].ch_lock);
+ if (i == MHI_CLIENT_IP_SW_4_OUT || i == MHI_CLIENT_IP_SW_4_IN) {
+ int nreq = 0;
+
+ INIT_LIST_HEAD(&mhi->ch[i].event_req_buffers);
+ while (nreq < MHI_MAX_EVT_REQ) {
+ struct event_req *ereq;
+ /* Pre allocate event requests */
+ ereq = kzalloc(sizeof(struct event_req),
+ GFP_KERNEL);
+ if (!ereq)
+ return -ENOMEM;
+
+ /* pre allocate buffers to queue
+ * transfer completion events
+ */
+ ereq->tr_events = kzalloc(RING_ELEMENT_TYPE_SZ*
+ MAX_TR_EVENTS, GFP_KERNEL);
+ if (!ereq->tr_events) {
+ kfree(ereq);
+ return -ENOMEM;
+ }
+ list_add_tail(&ereq->list,
+ &mhi->ch[i].event_req_buffers);
+ nreq++;
+ }
+ mhi->ch[i].curr_ereq =
+ container_of(mhi->ch[i].event_req_buffers.next,
+ struct event_req, list);
+ list_del_init(&mhi->ch[i].curr_ereq->list);
+ }
+ }
+
+ spin_lock_init(&mhi->lock);
+ mhi->mmio_backup = devm_kzalloc(&pdev->dev,
+ MHI_DEV_MMIO_RANGE, GFP_KERNEL);
if (!mhi->mmio_backup)
return -ENOMEM;
- mhi_ipc_log = ipc_log_context_create(MHI_IPC_LOG_PAGES, "mhi", 0);
- if (mhi_ipc_log == NULL) {
- dev_err(&pdev->dev,
- "Failed to create IPC logging context\n");
- }
-
return 0;
}
-static int mhi_dev_probe(struct platform_device *pdev)
+static int mhi_dev_resume_mmio_mhi_reinit(struct mhi_dev *mhi_ctx)
{
int rc = 0;
- if (pdev->dev.of_node) {
- rc = get_device_tree_data(pdev);
- if (rc) {
- pr_err("Error reading MHI Dev DT\n");
- return rc;
+ mutex_lock(&mhi_ctx->mhi_lock);
+ if (atomic_read(&mhi_ctx->re_init_done)) {
+ mhi_log(MHI_MSG_INFO, "Re_init done, return\n");
+ mutex_unlock(&mhi_ctx->mhi_lock);
+ return 0;
+ }
+
+ rc = mhi_init(mhi_ctx);
+ if (rc) {
+ pr_err("Error initializing MHI MMIO with %d\n", rc);
+ goto fail;
+ }
+
+ mhi_ctx->event_reg.events = EP_PCIE_EVENT_PM_D3_HOT |
+ EP_PCIE_EVENT_PM_D3_COLD |
+ EP_PCIE_EVENT_PM_D0 |
+ EP_PCIE_EVENT_PM_RST_DEAST |
+ EP_PCIE_EVENT_MHI_A7 |
+ EP_PCIE_EVENT_LINKDOWN;
+ mhi_ctx->event_reg.user = mhi_ctx;
+ mhi_ctx->event_reg.mode = EP_PCIE_TRIGGER_CALLBACK;
+ mhi_ctx->event_reg.callback = mhi_dev_sm_pcie_handler;
+
+ rc = ep_pcie_register_event(mhi_ctx->phandle, &mhi_ctx->event_reg);
+ if (rc) {
+ pr_err("Failed to register for events from PCIe\n");
+ goto fail;
+ }
+
+ rc = ipa_register_ipa_ready_cb(mhi_ring_init_cb, mhi_ctx);
+ if (rc < 0) {
+ if (rc == -EEXIST) {
+ mhi_ring_init_cb(mhi_ctx);
+ } else {
+ pr_err("Error calling IPA cb with %d\n", rc);
+ goto fail;
}
}
- mhi_ctx->phandle = ep_pcie_get_phandle(mhi_ctx->ifc_id);
- if (!mhi_ctx->phandle) {
- pr_err("PCIe driver is not ready yet.\n");
- return -EPROBE_DEFER;
+ /* Invoke MHI SM when device is in RESET state */
+ rc = mhi_dev_sm_init(mhi_ctx);
+ if (rc) {
+ pr_err("%s: Error during SM init\n", __func__);
+ goto fail;
}
- if (ep_pcie_get_linkstatus(mhi_ctx->phandle) != EP_PCIE_LINK_ENABLED) {
- pr_err("PCIe link is not ready to use.\n");
- return -EPROBE_DEFER;
+ /* set the env before setting the ready bit */
+ rc = mhi_dev_mmio_set_env(mhi_ctx, MHI_ENV_VALUE);
+ if (rc) {
+ pr_err("%s: env setting failed\n", __func__);
+ goto fail;
}
+ /* All set, notify the host */
+ rc = mhi_dev_sm_set_ready();
+ if (rc) {
+ pr_err("%s: unable to set ready bit\n", __func__);
+ goto fail;
+ }
+
+ atomic_set(&mhi_ctx->is_suspended, 0);
+fail:
+ atomic_set(&mhi_ctx->re_init_done, 1);
+ mutex_unlock(&mhi_ctx->mhi_lock);
+ return rc;
+}
+
+static void mhi_dev_reinit(struct work_struct *work)
+{
+ struct mhi_dev *mhi_ctx = container_of(work,
+ struct mhi_dev, re_init);
+ enum ep_pcie_link_status link_state;
+ int rc = 0;
+
+ link_state = ep_pcie_get_linkstatus(mhi_ctx->phandle);
+ if (link_state == EP_PCIE_LINK_ENABLED) {
+ /* PCIe link is up with BME set */
+ rc = mhi_dev_resume_mmio_mhi_reinit(mhi_ctx);
+ if (rc) {
+ pr_err("Failed to register for events from PCIe\n");
+ return;
+ }
+ }
+
+ mhi_log(MHI_MSG_VERBOSE, "Wait for PCIe linkup\n");
+}
+
+static int mhi_dev_resume_mmio_mhi_init(struct mhi_dev *mhi_ctx)
+{
+ struct platform_device *pdev;
+ int rc = 0;
+
+ pdev = mhi_ctx->pdev;
+
INIT_WORK(&mhi_ctx->chdb_ctrl_work, mhi_dev_scheduler);
mhi_ctx->pending_ring_wq = alloc_workqueue("mhi_pending_wq",
@@ -1835,6 +2761,8 @@
INIT_WORK(&mhi_ctx->ring_init_cb_work, mhi_dev_enable);
+ INIT_WORK(&mhi_ctx->re_init, mhi_dev_reinit);
+
mhi_ctx->ring_init_wq = alloc_workqueue("mhi_ring_init_cb_wq",
WQ_HIGHPRI, 0);
if (!mhi_ctx->ring_init_wq) {
@@ -1844,6 +2772,7 @@
INIT_LIST_HEAD(&mhi_ctx->event_ring_list);
INIT_LIST_HEAD(&mhi_ctx->process_ring_list);
+ INIT_LIST_HEAD(&mhi_ctx->client_cb_list);
mutex_init(&mhi_ctx->mhi_lock);
mutex_init(&mhi_ctx->mhi_event_lock);
mutex_init(&mhi_ctx->mhi_write_test);
@@ -1878,6 +2807,12 @@
return rc;
}
+ mhi_ctx->phandle = ep_pcie_get_phandle(mhi_ctx->ifc_id);
+ if (!mhi_ctx->phandle) {
+ pr_err("PCIe driver get handle failed.\n");
+ return -EINVAL;
+ }
+
mhi_ctx->event_reg.events = EP_PCIE_EVENT_PM_D3_HOT |
EP_PCIE_EVENT_PM_D3_COLD |
EP_PCIE_EVENT_PM_D0 |
@@ -1906,6 +2841,125 @@
}
}
+ /* Invoke MHI SM when device is in RESET state */
+ rc = mhi_dev_sm_init(mhi_ctx);
+ if (rc) {
+ pr_err("%s: Error during SM init\n", __func__);
+ return rc;
+ }
+
+ /* set the env before setting the ready bit */
+ rc = mhi_dev_mmio_set_env(mhi_ctx, MHI_ENV_VALUE);
+ if (rc) {
+ pr_err("%s: env setting failed\n", __func__);
+ return rc;
+ }
+
+ /* All set, notify the host */
+ mhi_dev_sm_set_ready();
+
+ if (mhi_ctx->config_iatu || mhi_ctx->mhi_int) {
+ rc = devm_request_irq(&pdev->dev, mhi_ctx->mhi_irq, mhi_dev_isr,
+ IRQF_TRIGGER_HIGH, "mhi_isr", mhi_ctx);
+ if (rc) {
+ dev_err(&pdev->dev, "request mhi irq failed %d\n", rc);
+ return -EINVAL;
+ }
+
+ disable_irq(mhi_ctx->mhi_irq);
+ }
+
+ return 0;
+}
+
+static void mhi_dev_resume_init_with_link_up(struct ep_pcie_notify *notify)
+{
+ if (!notify || !notify->user) {
+ pr_err("Null argument for notify\n");
+ return;
+ }
+
+ mhi_ctx = notify->user;
+ mhi_dev_pcie_notify_event = notify->options;
+ mhi_log(MHI_MSG_INFO,
+ "PCIe event=0x%x\n", notify->options);
+ queue_work(mhi_ctx->pcie_event_wq, &mhi_ctx->pcie_event);
+}
+
+static void mhi_dev_pcie_handle_event(struct work_struct *work)
+{
+ struct mhi_dev *mhi_ctx = container_of(work, struct mhi_dev,
+ pcie_event);
+ int rc = 0;
+
+ if (mhi_dev_pcie_notify_event == MHI_INIT) {
+ rc = mhi_dev_resume_mmio_mhi_init(mhi_ctx);
+ if (rc) {
+ pr_err("Error during MHI device initialization\n");
+ return;
+ }
+ } else if (mhi_dev_pcie_notify_event == MHI_REINIT) {
+ rc = mhi_dev_resume_mmio_mhi_reinit(mhi_ctx);
+ if (rc) {
+ pr_err("Error during MHI device re-initialization\n");
+ return;
+ }
+ }
+}
+
+static int mhi_dev_probe(struct platform_device *pdev)
+{
+ int rc = 0;
+
+ if (pdev->dev.of_node) {
+ rc = get_device_tree_data(pdev);
+ if (rc) {
+ pr_err("Error reading MHI Dev DT\n");
+ return rc;
+ }
+ mhi_ipc_log = ipc_log_context_create(MHI_IPC_LOG_PAGES,
+ "mhi", 0);
+ if (mhi_ipc_log == NULL) {
+ dev_err(&pdev->dev,
+ "Failed to create IPC logging context\n");
+ }
+ mhi_uci_init();
+ mhi_update_state_info(MHI_STATE_CONFIGURED);
+ }
+
+ INIT_WORK(&mhi_ctx->pcie_event, mhi_dev_pcie_handle_event);
+ mhi_ctx->pcie_event_wq = alloc_workqueue("mhi_dev_pcie_event_wq",
+ WQ_HIGHPRI, 0);
+ if (!mhi_ctx->pcie_event_wq) {
+ pr_err("no memory\n");
+ rc = -ENOMEM;
+ return rc;
+ }
+
+ mhi_ctx->phandle = ep_pcie_get_phandle(mhi_ctx->ifc_id);
+ if (mhi_ctx->phandle) {
+ /* PCIe link is already up */
+ rc = mhi_dev_resume_mmio_mhi_init(mhi_ctx);
+ if (rc) {
+ pr_err("Error during MHI device initialization\n");
+ return rc;
+ }
+ } else {
+ pr_debug("Register a PCIe callback\n");
+ mhi_ctx->event_reg.events = EP_PCIE_EVENT_LINKUP;
+ mhi_ctx->event_reg.user = mhi_ctx;
+ mhi_ctx->event_reg.mode = EP_PCIE_TRIGGER_CALLBACK;
+ mhi_ctx->event_reg.callback = mhi_dev_resume_init_with_link_up;
+ mhi_ctx->event_reg.options = MHI_INIT;
+
+ rc = ep_pcie_register_event(mhi_ctx->phandle,
+ &mhi_ctx->event_reg);
+ if (rc) {
+ pr_err("Failed to register for events from PCIe\n");
+ return rc;
+ }
+ }
+
return 0;
}
diff --git a/drivers/platform/msm/mhi_dev/mhi.h b/drivers/platform/msm/mhi_dev/mhi.h
index 1a73d92..38e52e2 100644
--- a/drivers/platform/msm/mhi_dev/mhi.h
+++ b/drivers/platform/msm/mhi_dev/mhi.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -274,7 +274,15 @@
#define HW_CHANNEL_END 107
#define MHI_ENV_VALUE 2
#define MHI_MASK_ROWS_CH_EV_DB 4
-#define TRB_MAX_DATA_SIZE 4096
+#define TRB_MAX_DATA_SIZE 8192
+#define MHI_CTRL_STATE 25
+#define IPA_DMA_SYNC 1
+#define IPA_DMA_ASYNC 0
+
+/*maximum trasnfer completion events buffer*/
+#define MAX_TR_EVENTS 50
+/*maximum event requests */
+#define MHI_MAX_EVT_REQ 50
/* Possible ring element types */
union mhi_dev_ring_element_type {
@@ -324,7 +332,10 @@
uint64_t host_pa;
uintptr_t device_pa;
uintptr_t device_va;
- uint32_t size;
+ size_t size;
+ dma_addr_t phy_addr;
+ void *virt_addr;
+ bool use_ipa_dma;
};
struct mhi_interrupt_state {
@@ -349,6 +360,23 @@
MHI_DEV_POLL,
};
+enum mhi_ctrl_info {
+ MHI_STATE_CONFIGURED = 0,
+ MHI_STATE_CONNECTED = 1,
+ MHI_STATE_DISCONNECTED = 2,
+ MHI_STATE_INVAL,
+};
+
+enum mhi_dev_tr_compl_evt_type {
+ SEND_EVENT_BUFFER,
+ SEND_EVENT_RD_OFFSET,
+};
+
+enum mhi_dev_transfer_type {
+ MHI_DEV_DMA_SYNC,
+ MHI_DEV_DMA_ASYNC,
+};
+
struct mhi_dev_channel;
struct mhi_dev_ring {
@@ -394,6 +422,7 @@
enum cb_reason {
MHI_DEV_TRE_AVAILABLE = 0,
+ MHI_DEV_CTRL_UPDATE,
};
struct mhi_dev_client_cb_reason {
@@ -423,14 +452,30 @@
uint32_t nr_iov;
};
+struct ring_cache_req {
+ struct completion *done;
+ void *context;
+};
+
+struct event_req {
+ union mhi_dev_ring_element_type *tr_events;
+ u32 num_events;
+ dma_addr_t dma;
+ u32 dma_len;
+ dma_addr_t event_rd_dma;
+ void *context;
+ enum mhi_dev_tr_compl_evt_type event_type;
+ u32 event_ring;
+ void (*client_cb)(void *req);
+ struct list_head list;
+};
+
struct mhi_dev_channel {
struct list_head list;
struct list_head clients;
/* synchronization for changing channel state,
* adding/removing clients, mhi_dev callbacks, etc
*/
- spinlock_t lock;
-
struct mhi_dev_ring *ring;
enum mhi_dev_channel_state state;
@@ -440,6 +485,9 @@
/* client which the current inbound/outbound message is for */
struct mhi_dev_client *active_client;
+ struct list_head event_req_buffers;
+ struct event_req *curr_ereq;
+
/* current TRE being processed */
uint64_t tre_loc;
/* current TRE size */
@@ -466,6 +514,7 @@
struct mhi_config cfg;
bool mmio_initialized;
+ spinlock_t lock;
/* Host control base information */
struct mhi_host_addr host_addr;
struct mhi_addr ctrl_base;
@@ -481,6 +530,7 @@
struct mhi_dev_ch_ctx *cmd_ctx_cache;
dma_addr_t cmd_ctx_cache_dma_handle;
struct mhi_dev_ring *ring;
+ int mhi_irq;
struct mhi_dev_channel *ch;
int ctrl_int;
@@ -491,6 +541,7 @@
/* Scheduler work */
struct work_struct chdb_ctrl_work;
+
struct mutex mhi_lock;
struct mutex mhi_event_lock;
@@ -509,15 +560,22 @@
u32 ipa_clnt_hndl[4];
struct workqueue_struct *ring_init_wq;
struct work_struct ring_init_cb_work;
+ struct work_struct re_init;
/* EP PCIe registration */
+ struct workqueue_struct *pcie_event_wq;
struct ep_pcie_register_event event_reg;
u32 ifc_id;
struct ep_pcie_hw *phandle;
+ struct work_struct pcie_event;
+ struct ep_pcie_msi_config msi_cfg;
atomic_t write_active;
atomic_t is_suspended;
+ atomic_t mhi_dev_wake;
+ atomic_t re_init_done;
struct mutex mhi_write_test;
+ u32 device_local_pa_base;
u32 mhi_ep_msi_num;
u32 mhi_version;
void *dma_cache;
@@ -535,6 +593,37 @@
* region from device used in mhi_write()
*/
dma_addr_t write_dma_handle;
+
+ /* Use IPA DMA for Software channel data transfer */
+ bool use_ipa;
+
+ /* iATU is required to map control and data region */
+ bool config_iatu;
+
+ /* MHI state info */
+ enum mhi_ctrl_info ctrl_info;
+
+ /*Register for interrupt */
+ bool mhi_int;
+ /* Registered client callback list */
+ struct list_head client_cb_list;
+};
+
+struct mhi_req {
+ u32 chan;
+ u32 mode;
+ u32 chain;
+ void *buf;
+ dma_addr_t dma;
+ u32 snd_cmpl;
+ void *context;
+ size_t len;
+ size_t actual_len;
+ uint32_t rd_offset;
+ struct mhi_dev_client *client;
+ struct list_head list;
+ union mhi_dev_ring_element_type *el;
+ void (*client_cb)(void *req);
};
enum mhi_msg_level {
@@ -609,7 +698,9 @@
MHI_CLIENT_CSVT_IN = 43,
MHI_CLIENT_SMCT_OUT = 44,
MHI_CLIENT_SMCT_IN = 45,
- MHI_MAX_SOFTWARE_CHANNELS = 46,
+ MHI_CLIENT_IP_SW_4_OUT = 46,
+ MHI_CLIENT_IP_SW_4_IN = 47,
+ MHI_MAX_SOFTWARE_CHANNELS = 48,
MHI_CLIENT_TEST_OUT = 60,
MHI_CLIENT_TEST_IN = 61,
MHI_CLIENT_RESERVED_1_LOWER = 62,
@@ -626,6 +717,20 @@
uint32_t buf_size;
};
+struct mhi_dev_client_cb_data {
+ void *user_data;
+ enum mhi_client_channel channel;
+ enum mhi_ctrl_info ctrl_info;
+};
+
+typedef void (*mhi_state_cb)(struct mhi_dev_client_cb_data *cb_dat);
+
+struct mhi_dev_ready_cb_info {
+ struct list_head list;
+ mhi_state_cb cb;
+ struct mhi_dev_client_cb_data cb_data;
+};
+
/**
* mhi_dev_open_channel() - Channel open for a given client done prior
* to read/write.
@@ -643,24 +748,21 @@
/**
* mhi_dev_read_channel() - Channel read for a given client
- * @handle_client: Client Handle issued during mhi_dev_open_channel
- * @buf: Pointer to the buffer used by the MHI core to copy the data received
- * from the Host.
- * @buf_size: Size of the buffer pointer.
- * @chain : Indicate if the received data is part of chained packet.
+ * @mreq: mreq is the client argument which includes meta info
+ * like write data location, buffer len, read offset, mode,
+ * chain and client call back function which will be invoked
+ * when data read is completed.
*/
-int mhi_dev_read_channel(struct mhi_dev_client *handle_client,
- void *buf, uint32_t buf_size, uint32_t *chain);
+int mhi_dev_read_channel(struct mhi_req *mreq);
/**
* mhi_dev_write_channel() - Channel write for a given software client.
- * @handle_client: Client Handle issued during mhi_dev_open_channel
- * @buf: Pointer to the buffer used by the MHI core to copy the data from the
- * device to the host.
- * @buf_size: Size of the buffer pointer.
+ * @wreq wreq is the client argument which includes meta info like
+ * client handle, read data location, buffer length, mode,
+ * and client call back function which will free the packet.
+ * when data write is completed.
*/
-int mhi_dev_write_channel(struct mhi_dev_client *handle_client, void *buf,
- uint32_t buf_size);
+int mhi_dev_write_channel(struct mhi_req *wreq);
/**
* mhi_dev_channel_isempty() - Checks if there is any pending TRE's to process.
@@ -733,8 +835,8 @@
* @element: Transfer ring element to be copied to the host memory.
*/
int mhi_dev_add_element(struct mhi_dev_ring *ring,
- union mhi_dev_ring_element_type *element);
-
+ union mhi_dev_ring_element_type *element,
+ struct event_req *ereq, int evt_offset);
/**
* mhi_transfer_device_to_host() - memcpy equivalent API to transfer data
* from device to the host.
@@ -742,9 +844,10 @@
* @src: Source virtual address.
* @len: Numer of bytes to be transferred.
* @mhi: MHI dev structure.
+ * @req: mhi_req structure
*/
int mhi_transfer_device_to_host(uint64_t dst_pa, void *src, uint32_t len,
- struct mhi_dev *mhi);
+ struct mhi_dev *mhi, struct mhi_req *req);
/**
* mhi_transfer_host_to_dev() - memcpy equivalent API to transfer data
@@ -753,19 +856,29 @@
* @src_pa: Source physical address.
* @len: Numer of bytes to be transferred.
* @mhi: MHI dev structure.
+ * @req: mhi_req structure
*/
int mhi_transfer_host_to_device(void *device, uint64_t src_pa, uint32_t len,
- struct mhi_dev *mhi);
+ struct mhi_dev *mhi, struct mhi_req *mreq);
/**
- * mhi_dev_write_to_host() - memcpy equivalent API to transfer data
- * from device to host.
+ * mhi_dev_write_to_host() - Transfer data from device to host.
+ * Based on support available, either IPA DMA or memcpy is used.
* @host: Host and device address details.
* @buf: Data buffer that needs to be written to the host.
* @size: Data buffer size.
*/
-void mhi_dev_write_to_host(struct mhi_addr *host, void *buf, size_t size,
- struct mhi_dev *mhi);
+void mhi_dev_write_to_host(struct mhi_dev *mhi, struct mhi_addr *mhi_transfer,
+ struct event_req *ereq, enum mhi_dev_transfer_type type);
+/**
+ * mhi_dev_read_from_host() - memcpy equivalent API to transfer data
+ * from host to device.
+ * @host: Host and device address details.
+ * @buf: Data buffer that needs to be read from the host.
+ * @size: Data buffer size.
+ */
+void mhi_dev_read_from_host(struct mhi_dev *mhi,
+ struct mhi_addr *mhi_transfer);
/**
* mhi_dev_read_from_host() - memcpy equivalent API to transfer data
@@ -774,15 +887,7 @@
* @buf: Data buffer that needs to be read from the host.
* @size: Data buffer size.
*/
-void mhi_dev_read_from_host(struct mhi_addr *dst, dma_addr_t buf, size_t size);
-/**
- * mhi_dev_read_from_host() - memcpy equivalent API to transfer data
- * from host to device.
- * @host: Host and device address details.
- * @buf: Data buffer that needs to be read from the host.
- * @size: Data buffer size.
- */
void mhi_ring_set_cb(struct mhi_dev_ring *ring,
void (*ring_cb)(struct mhi_dev *dev,
union mhi_dev_ring_element_type *el, void *ctx));
@@ -848,6 +953,7 @@
* mhi_dev_mmio_enable_ctrl_interrupt() - Enable Control interrupt.
* @dev: MHI device structure.
*/
+
int mhi_dev_mmio_enable_ctrl_interrupt(struct mhi_dev *dev);
/**
@@ -1021,8 +1127,10 @@
* mhi_dev_get_mhi_state() - Fetches the MHI state such as M0/M1/M2/M3.
* @dev: MHI device structure.
* @state: Pointer of type mhi_dev_state
+ * @mhi_reset: MHI device reset from host.
*/
-int mhi_dev_mmio_get_mhi_state(struct mhi_dev *dev, enum mhi_dev_state *state);
+int mhi_dev_mmio_get_mhi_state(struct mhi_dev *dev, enum mhi_dev_state *state,
+ bool *mhi_reset);
/**
* mhi_dev_mmio_init() - Initializes the MMIO and reads the Number of event
@@ -1121,6 +1229,48 @@
*/
int mhi_uci_init(void);
+/**
+ * mhi_dev_net_interface_init() - Initializes the mhi device network interface
+ * which exposes the virtual network interface (mhi_dev_net0).
+ * data packets will transfer between MHI host interface (mhi_swip)
+ * and mhi_dev_net interface using software path
+ */
+int mhi_dev_net_interface_init(void);
+
+/**
+ * mhi_dev_net_exit() - Clean up and close MHI Network interface module.
+ */
+void mhi_dev_net_exit(void);
+
+/**
+ * mhi_dev_notify_a7_event() - Used by PCIe driver to notify A7 MHI device
+ * interrupt after doorbell is received. Used by PCIe driver when MHI
+ * A7 interrupts are routed to PCIe instead of MHI device.
+ */
void mhi_dev_notify_a7_event(struct mhi_dev *mhi);
+/**
+ * mhi_ctrl_state_info() - Provide MHI state info
+ * MHI_STATE=CONFIGURED - MHI device is present but not ready
+ * for data traffic.
+ * MHI_STATE=CONNECTED - MHI device is ready for data transfer.
+ * MHI_STATE=DISCONNECTED - MHI device has its pipes suspended.
+ * exposes device nodes for the supported MHI software
+ * channels.
+ */
+int mhi_ctrl_state_info(uint32_t *info);
+
+/**
+ * uci_ctrl_update() - Update UCI once TRE's are available for clients to
+ * consume.
+ */
+void uci_ctrl_update(struct mhi_dev_client_cb_reason *reason);
+
+/**
+ * mhi_register_state_cb() - Clients can register and receive callback after
+ * MHI channel is connected or disconnected.
+ */
+int mhi_register_state_cb(void (*mhi_state_cb)
+ (struct mhi_dev_client_cb_data *cb_data), void *data,
+ enum mhi_client_channel channel);
#endif /* _MHI_H_ */
diff --git a/drivers/platform/msm/mhi_dev/mhi_dev_net.c b/drivers/platform/msm/mhi_dev/mhi_dev_net.c
new file mode 100644
index 0000000..d8dc85f
--- /dev/null
+++ b/drivers/platform/msm/mhi_dev/mhi_dev_net.c
@@ -0,0 +1,667 @@
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+/*
+ * MHI Device Network interface
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/ip.h>
+#include <linux/if_ether.h>
+#include <linux/skbuff.h>
+#include <linux/if_arp.h>
+#include <linux/netdevice.h>
+#include <linux/dma-mapping.h>
+#include <linux/ipc_logging.h>
+#include <linux/device.h>
+#include <linux/workqueue.h>
+#include <linux/spinlock.h>
+#include <linux/errno.h>
+#include <linux/ktime.h>
+
+#include "mhi.h"
+
+#define MHI_NET_DRIVER_NAME "mhi_dev_net_drv"
+#define MHI_NET_DEV_NAME "mhi_dev_net%d"
+#define MHI_NET_DEFAULT_MTU 8192
+#define MHI_NET_IPC_PAGES (100)
+#define MHI_MAX_RX_REQ (128)
+#define MHI_MAX_TX_REQ (128)
+
+enum mhi_dev_net_dbg_lvl {
+ MHI_VERBOSE = 0x1,
+ MHI_INFO = 0x2,
+ MHI_DBG = 0x3,
+ MHI_WARNING = 0x4,
+ MHI_ERROR = 0x5,
+ MHI_CRITICAL = 0x6,
+ MSG_NET_reserved = 0x80000000
+};
+
+static enum mhi_dev_net_dbg_lvl mhi_net_msg_lvl = MHI_CRITICAL;
+static enum mhi_dev_net_dbg_lvl mhi_net_ipc_log_lvl = MHI_VERBOSE;
+static void *mhi_net_ipc_log;
+
+enum mhi_chan_dir {
+ MHI_DIR_INVALID = 0x0,
+ MHI_DIR_OUT = 0x1,
+ MHI_DIR_IN = 0x2,
+ MHI_DIR__reserved = 0x80000000
+};
+
+struct mhi_dev_net_chan_attr {
+ /* SW maintained channel id */
+ enum mhi_client_channel chan_id;
+ /* maximum buffer size for this channel */
+ size_t max_packet_size;
+ /* direction of the channel, see enum mhi_chan_dir */
+ enum mhi_chan_dir dir;
+};
+
+#define CHAN_TO_CLIENT(_CHAN_NR) (_CHAN_NR / 2)
+
+#define mhi_dev_net_log(_msg_lvl, _msg, ...) do { \
+ if (_msg_lvl >= mhi_net_msg_lvl) { \
+ pr_err("[%s] "_msg, __func__, ##__VA_ARGS__); \
+ } \
+ if (mhi_net_ipc_log && (_msg_lvl >= mhi_net_ipc_log_lvl)) { \
+ ipc_log_string(mhi_net_ipc_log, \
+ "[%s] " _msg, __func__, ##__VA_ARGS__); \
+ } \
+} while (0)
+
+module_param(mhi_net_msg_lvl, uint, 0644);
+MODULE_PARM_DESC(mhi_net_msg_lvl, "mhi dev net dbg lvl");
+
+module_param(mhi_net_ipc_log_lvl, uint, 0644);
+MODULE_PARM_DESC(mhi_net_ipc_log_lvl, "mhi dev net dbg lvl");
+
+struct mhi_dev_net_client {
+ /* write channel - always even*/
+ u32 out_chan;
+ /* read channel - always odd */
+ u32 in_chan;
+ struct mhi_dev_client *out_handle;
+ struct mhi_dev_client *in_handle;
+ /*process pendig packets */
+ struct workqueue_struct *pending_pckt_wq;
+ struct work_struct xmit_work;
+ /*Read data from host work queue*/
+ atomic_t rx_enabled;
+ atomic_t tx_enabled;
+ struct net_device *dev;
+ struct sk_buff_head tx_buffers;
+ struct list_head rx_buffers;
+ struct list_head wr_req_buffers;
+ struct mhi_dev_net_ctxt *net_ctxt;
+ /*To check write channel is empty or not*/
+ spinlock_t wrt_lock;
+ spinlock_t rd_lock;
+ struct mutex in_chan_lock;
+ struct mutex out_chan_lock;
+};
+
+struct mhi_dev_net_ctxt {
+ struct mhi_dev_net_chan_attr chan_attr[MHI_MAX_SOFTWARE_CHANNELS];
+ struct mhi_dev_net_client *client_handle;
+ void (*net_event_notifier)(struct mhi_dev_client_cb_reason *cb);
+};
+
+static struct mhi_dev_net_ctxt mhi_net_ctxt;
+static ssize_t mhi_dev_net_client_read(struct mhi_dev_net_client *);
+
+static int mhi_dev_net_init_ch_attributes(struct mhi_dev_net_ctxt *mhi_ctxt)
+{
+ u32 channel = 0;
+ struct mhi_dev_net_chan_attr *chan_attrib = NULL;
+
+ channel = MHI_CLIENT_IP_SW_4_OUT;
+ chan_attrib = &mhi_ctxt->chan_attr[channel];
+ chan_attrib->dir = MHI_DIR_OUT;
+ chan_attrib->chan_id = channel;
+ chan_attrib->max_packet_size = TRB_MAX_DATA_SIZE;
+ mhi_dev_net_log(MHI_INFO, "Write chan attributes dir %d chan_id %d\n",
+ chan_attrib->dir, chan_attrib->chan_id);
+
+ channel = MHI_CLIENT_IP_SW_4_IN;
+ chan_attrib = &mhi_ctxt->chan_attr[channel];
+ chan_attrib->dir = MHI_DIR_IN;
+ chan_attrib->chan_id = channel;
+ chan_attrib->max_packet_size = TRB_MAX_DATA_SIZE;
+ mhi_dev_net_log(MHI_INFO, "Read chan attributes dir %d chan_id %d\n",
+ chan_attrib->dir, chan_attrib->chan_id);
+ return 0;
+}
+
+static void mhi_dev_net_process_queue_packets(struct work_struct *work)
+{
+ struct mhi_dev_net_client *client = container_of(work,
+ struct mhi_dev_net_client, xmit_work);
+ unsigned long flags = 0;
+ int xfer_data = 0;
+ struct sk_buff *skb = NULL;
+ struct mhi_req *wreq = NULL;
+
+ if (mhi_dev_channel_isempty(client->in_handle)) {
+ mhi_dev_net_log(MHI_INFO, "%s stop network xmmit\n", __func__);
+ netif_stop_queue(client->dev);
+ return;
+ }
+ while (!((skb_queue_empty(&client->tx_buffers)) ||
+ (list_empty(&client->wr_req_buffers)))) {
+ spin_lock_irqsave(&client->wrt_lock, flags);
+ skb = skb_dequeue(&(client->tx_buffers));
+ if (!skb) {
+ mhi_dev_net_log(MHI_INFO,
+ "SKB is NULL from dequeue\n");
+ spin_unlock_irqrestore(&client->wrt_lock, flags);
+ return;
+ }
+ wreq = container_of(client->wr_req_buffers.next,
+ struct mhi_req, list);
+ list_del_init(&wreq->list);
+
+ wreq->client = client->in_handle;
+ wreq->context = skb;
+ wreq->buf = skb->data;
+ wreq->len = skb->len;
+ wreq->chan = client->in_chan;
+ wreq->mode = IPA_DMA_ASYNC;
+ if (skb_queue_empty(&client->tx_buffers) ||
+ list_empty(&client->wr_req_buffers)) {
+ wreq->snd_cmpl = 1;
+ } else
+ wreq->snd_cmpl = 0;
+ spin_unlock_irqrestore(&client->wrt_lock, flags);
+ xfer_data = mhi_dev_write_channel(wreq);
+ if (xfer_data <= 0) {
+ pr_err("%s(): Failed to write skb len %d\n",
+ __func__, skb->len);
+ kfree_skb(skb);
+ return;
+ }
+ client->dev->stats.tx_packets++;
+
+ /* Check if free buffers are available*/
+ if (mhi_dev_channel_isempty(client->in_handle)) {
+ mhi_dev_net_log(MHI_INFO,
+ "%s buffers are full stop xmit\n",
+ __func__);
+ netif_stop_queue(client->dev);
+ break;
+ }
+ } /* While TX queue is not empty */
+}
+
+static void mhi_dev_net_event_notifier(struct mhi_dev_client_cb_reason *reason)
+{
+ struct mhi_dev_net_client *client_handle = mhi_net_ctxt.client_handle;
+
+ if (reason->reason == MHI_DEV_TRE_AVAILABLE) {
+ if (reason->ch_id % 2) {
+ if (netif_queue_stopped(client_handle->dev)) {
+ netif_wake_queue(client_handle->dev);
+ queue_work(client_handle->pending_pckt_wq,
+ &client_handle->xmit_work);
+ }
+ } else
+ mhi_dev_net_client_read(client_handle);
+ }
+}
+
+static __be16 mhi_dev_net_eth_type_trans(struct sk_buff *skb)
+{
+ __be16 protocol = 0;
+ /* Determine L3 protocol */
+ switch (skb->data[0] & 0xf0) {
+ case 0x40:
+ protocol = htons(ETH_P_IP);
+ break;
+ case 0x60:
+ protocol = htons(ETH_P_IPV6);
+ break;
+ default:
+ /* Default is QMAP */
+ protocol = htons(ETH_P_MAP);
+ break;
+ }
+ return protocol;
+}
+
+static void mhi_dev_net_read_completion_cb(void *req)
+{
+ struct mhi_dev_net_client *net_handle =
+ mhi_net_ctxt.client_handle;
+ struct mhi_req *mreq =
+ (struct mhi_req *)req;
+ struct sk_buff *skb = mreq->context;
+ unsigned long flags;
+
+ skb->len = mreq->actual_len;
+ skb->protocol =
+ mhi_dev_net_eth_type_trans(skb);
+ skb_put(skb, mreq->actual_len);
+ net_handle->dev->stats.rx_packets++;
+ skb->dev = net_handle->dev;
+ netif_rx(skb);
+ spin_lock_irqsave(&net_handle->rd_lock, flags);
+ list_add_tail(&mreq->list, &net_handle->rx_buffers);
+ spin_unlock_irqrestore(&net_handle->rd_lock, flags);
+}
+
+static ssize_t mhi_dev_net_client_read(struct mhi_dev_net_client *mhi_handle)
+{
+ int bytes_avail = 0;
+ int ret_val = 0;
+ u32 chan = 0;
+ struct mhi_dev_client *client_handle = NULL;
+ struct mhi_req *req;
+ struct sk_buff *skb;
+ unsigned long flags;
+
+ client_handle = mhi_handle->out_handle;
+ chan = mhi_handle->out_chan;
+ if (!atomic_read(&mhi_handle->rx_enabled))
+ return -EPERM;
+ while (1) {
+ spin_lock_irqsave(&mhi_handle->rd_lock, flags);
+ if (list_empty(&mhi_handle->rx_buffers)) {
+ spin_unlock_irqrestore(&mhi_handle->rd_lock, flags);
+ break;
+ }
+
+ req = container_of(mhi_handle->rx_buffers.next,
+ struct mhi_req, list);
+ list_del_init(&req->list);
+ spin_unlock_irqrestore(&mhi_handle->rd_lock, flags);
+ skb = alloc_skb(MHI_NET_DEFAULT_MTU, GFP_ATOMIC);
+ if (skb == NULL) {
+ pr_err("%s(): skb alloc failed\n", __func__);
+ spin_lock_irqsave(&mhi_handle->rd_lock, flags);
+ list_add_tail(&req->list, &mhi_handle->rx_buffers);
+ spin_unlock_irqrestore(&mhi_handle->rd_lock, flags);
+ ret_val = -ENOMEM;
+ return ret_val;
+ }
+
+ req->client = client_handle;
+ req->chan = chan;
+ req->buf = skb->data;
+ req->len = MHI_NET_DEFAULT_MTU;
+ req->context = skb;
+ req->mode = IPA_DMA_ASYNC;
+ bytes_avail = mhi_dev_read_channel(req);
+
+ if (bytes_avail < 0) {
+ pr_err("Failed to read chan %d bytes_avail = %d\n",
+ chan, bytes_avail);
+ spin_lock_irqsave(&mhi_handle->rd_lock, flags);
+ kfree_skb(skb);
+ list_add_tail(&req->list, &mhi_handle->rx_buffers);
+ spin_unlock_irqrestore(&mhi_handle->rd_lock, flags);
+ ret_val = -EIO;
+ return 0;
+ }
+ /* no data to send to network stack, break */
+ if (!bytes_avail) {
+ spin_lock_irqsave(&mhi_handle->rd_lock, flags);
+ kfree_skb(skb);
+ list_add_tail(&req->list, &mhi_handle->rx_buffers);
+ spin_unlock_irqrestore(&mhi_handle->rd_lock, flags);
+ return 0;
+ }
+ }
+ /* coming out while only in case of no data or error */
+ return ret_val;
+
+}
+
+static void mhi_dev_net_write_completion_cb(void *req)
+{
+ struct mhi_dev_net_client *client_handle = mhi_net_ctxt.client_handle;
+ struct mhi_req *wreq = (struct mhi_req *)req;
+ struct sk_buff *skb = wreq->context;
+ unsigned long flags;
+
+ kfree_skb(skb);
+ spin_lock_irqsave(&client_handle->wrt_lock, flags);
+ list_add_tail(&wreq->list, &client_handle->wr_req_buffers);
+ spin_unlock_irqrestore(&client_handle->wrt_lock, flags);
+}
+
+static int mhi_dev_net_alloc_write_reqs(struct mhi_dev_net_client *client)
+{
+ int nreq = 0, rc = 0;
+ struct mhi_req *wreq;
+
+ while (nreq < MHI_MAX_TX_REQ) {
+ wreq = kzalloc(sizeof(struct mhi_req), GFP_ATOMIC);
+ if (!wreq)
+ return -ENOMEM;
+ wreq->client_cb = mhi_dev_net_write_completion_cb;
+ list_add_tail(&wreq->list, &client->wr_req_buffers);
+ nreq++;
+ }
+ mhi_dev_net_log(MHI_INFO,
+ "mhi write reqs allocation success\n");
+ return rc;
+
+}
+
+static int mhi_dev_net_alloc_read_reqs(struct mhi_dev_net_client *client)
+{
+ int nreq = 0, rc = 0;
+ struct mhi_req *mreq;
+
+ while (nreq < MHI_MAX_RX_REQ) {
+ mreq = kzalloc(sizeof(struct mhi_req), GFP_ATOMIC);
+ if (!mreq)
+ return -ENOMEM;
+ mreq->len = TRB_MAX_DATA_SIZE;
+ mreq->client_cb = mhi_dev_net_read_completion_cb;
+ list_add_tail(&mreq->list, &client->rx_buffers);
+ nreq++;
+ }
+ mhi_dev_net_log(MHI_INFO,
+ "mhi read reqs allocation success\n");
+ return rc;
+
+}
+
+static int mhi_dev_net_open(struct net_device *dev)
+{
+ struct mhi_dev_net_client *mhi_dev_net_ptr =
+ *(struct mhi_dev_net_client **)netdev_priv(dev);
+ mhi_dev_net_log(MHI_INFO,
+ "mhi_net_dev interface is up for IN %d OUT %d\n",
+ mhi_dev_net_ptr->out_chan,
+ mhi_dev_net_ptr->in_chan);
+ netif_start_queue(dev);
+ return 0;
+}
+
+static netdev_tx_t mhi_dev_net_xmit(struct sk_buff *skb, struct net_device *dev)
+{
+ struct mhi_dev_net_client *mhi_dev_net_ptr =
+ *(struct mhi_dev_net_client **)netdev_priv(dev);
+ unsigned long flags;
+
+ if (skb->len <= 0) {
+ mhi_dev_net_log(MHI_ERROR,
+ "Invalid skb received freeing skb\n");
+ kfree_skb(skb);
+ return NETDEV_TX_OK;
+ }
+ spin_lock_irqsave(&mhi_dev_net_ptr->wrt_lock, flags);
+ skb_queue_tail(&(mhi_dev_net_ptr->tx_buffers), skb);
+ spin_unlock_irqrestore(&mhi_dev_net_ptr->wrt_lock, flags);
+
+ queue_work(mhi_dev_net_ptr->pending_pckt_wq,
+ &mhi_dev_net_ptr->xmit_work);
+
+ return NETDEV_TX_OK;
+}
+
+static int mhi_dev_net_stop(struct net_device *dev)
+{
+ netif_stop_queue(dev);
+ mhi_dev_net_log(MHI_VERBOSE, "mhi_dev_net interface is down\n");
+ return 0;
+}
+
+static int mhi_dev_net_change_mtu(struct net_device *dev, int new_mtu)
+{
+ if (0 > new_mtu || MHI_NET_DEFAULT_MTU < new_mtu)
+ return -EINVAL;
+ dev->mtu = new_mtu;
+ return 0;
+}
+
+static const struct net_device_ops mhi_dev_net_ops_ip = {
+ .ndo_open = mhi_dev_net_open,
+ .ndo_stop = mhi_dev_net_stop,
+ .ndo_start_xmit = mhi_dev_net_xmit,
+ .ndo_change_mtu = mhi_dev_net_change_mtu,
+};
+
+static void mhi_dev_net_setup(struct net_device *dev)
+{
+ dev->netdev_ops = &mhi_dev_net_ops_ip;
+ ether_setup(dev);
+
+ /* set this after calling ether_setup */
+ dev->type = ARPHRD_RAWIP;
+ dev->hard_header_len = 0;
+ dev->mtu = MHI_NET_DEFAULT_MTU;
+ dev->addr_len = 0;
+ dev->flags &= ~(IFF_BROADCAST | IFF_MULTICAST);
+}
+
+static int mhi_dev_net_enable_iface(struct mhi_dev_net_client *mhi_dev_net_ptr)
+{
+ int ret = 0;
+ struct mhi_dev_net_client **mhi_dev_net_ctxt = NULL;
+ struct net_device *netdev;
+
+ if (!mhi_dev_net_ptr)
+ return -EINVAL;
+
+ /* Initialize skb list head to queue the packets for mhi dev client */
+ skb_queue_head_init(&(mhi_dev_net_ptr->tx_buffers));
+
+ mhi_dev_net_log(MHI_INFO,
+ "mhi_dev_net interface registration\n");
+ netdev = alloc_netdev(sizeof(struct mhi_dev_net_client),
+ MHI_NET_DEV_NAME, NET_NAME_PREDICTABLE,
+ mhi_dev_net_setup);
+ if (!netdev) {
+ pr_err("Failed to allocate netdev for mhi_dev_net\n");
+ goto net_dev_alloc_fail;
+ }
+
+ mhi_dev_net_ctxt = netdev_priv(netdev);
+ mhi_dev_net_ptr->dev = netdev;
+ *mhi_dev_net_ctxt = mhi_dev_net_ptr;
+ ret = register_netdev(mhi_dev_net_ptr->dev);
+ if (ret) {
+ pr_err("Failed to register mhi_dev_net device\n");
+ goto net_dev_reg_fail;
+ }
+ mhi_dev_net_log(MHI_INFO, "Successfully registred mhi_dev_net\n");
+ return 0;
+
+net_dev_reg_fail:
+ free_netdev(mhi_dev_net_ptr->dev);
+net_dev_alloc_fail:
+ mhi_dev_close_channel(mhi_dev_net_ptr->in_handle);
+ mhi_dev_close_channel(mhi_dev_net_ptr->out_handle);
+ mhi_dev_net_ptr->dev = NULL;
+ return -ENOMEM;
+}
+
+static int mhi_dev_net_open_channels(struct mhi_dev_net_client *client)
+{
+ int rc = 0;
+ int ret = 0;
+ struct list_head *cp, *q;
+ struct mhi_req *mreq;
+
+ mhi_dev_net_log(MHI_DBG, "opening OUT %d IN %d channels\n",
+ client->out_chan,
+ client->in_chan);
+ mutex_lock(&client->out_chan_lock);
+ mutex_lock(&client->in_chan_lock);
+ mhi_dev_net_log(MHI_DBG,
+ "Initializing inbound chan %d.\n",
+ client->in_chan);
+
+ rc = mhi_dev_open_channel(client->out_chan, &client->out_handle,
+ mhi_net_ctxt.net_event_notifier);
+ if (rc < 0) {
+ mhi_dev_net_log(MHI_ERROR,
+ "Failed to open chan %d, ret 0x%x\n",
+ client->out_chan, rc);
+ goto handle_not_rdy_err;
+ } else
+ atomic_set(&client->rx_enabled, 1);
+
+ rc = mhi_dev_open_channel(client->in_chan, &client->in_handle,
+ mhi_net_ctxt.net_event_notifier);
+ if (rc < 0) {
+ mhi_dev_net_log(MHI_ERROR,
+ "Failed to open chan %d, ret 0x%x\n",
+ client->in_chan, rc);
+ goto handle_in_err;
+ } else
+ atomic_set(&client->tx_enabled, 1);
+
+ mutex_unlock(&client->in_chan_lock);
+ mutex_unlock(&client->out_chan_lock);
+ mhi_dev_net_log(MHI_INFO, "IN %d, OUT %d channels are opened",
+ client->in_chan, client->out_chan);
+
+ INIT_LIST_HEAD(&client->rx_buffers);
+ INIT_LIST_HEAD(&client->wr_req_buffers);
+ /* pre allocate read request buffer */
+
+ ret = mhi_dev_net_alloc_read_reqs(client);
+ if (ret) {
+ pr_err("failed to allocate rx req buffers\n");
+ goto rx_req_failed;
+ }
+ ret = mhi_dev_net_alloc_write_reqs(client);
+ if (ret) {
+ pr_err("failed to allocate write req buffers\n");
+ goto tx_req_failed;
+ }
+ if (atomic_read(&client->tx_enabled)) {
+ ret = mhi_dev_net_enable_iface(client);
+ if (ret < 0)
+ mhi_dev_net_log(MHI_ERROR,
+ "failed to enable mhi_dev_net iface\n");
+ }
+ return ret;
+tx_req_failed:
+ list_for_each_safe(cp, q, &client->rx_buffers);
+ mreq = list_entry(cp, struct mhi_req, list);
+ list_del(cp);
+ kfree(mreq);
+rx_req_failed:
+ mhi_dev_close_channel(client->in_handle);
+handle_in_err:
+ mhi_dev_close_channel(client->out_handle);
+handle_not_rdy_err:
+ mutex_unlock(&client->in_chan_lock);
+ mutex_unlock(&client->out_chan_lock);
+ return rc;
+}
+
+static int mhi_dev_net_close(void)
+{
+ struct mhi_dev_net_client *client;
+
+ mhi_dev_net_log(MHI_INFO,
+ "mhi_dev_net module is removed\n");
+ client = mhi_net_ctxt.client_handle;
+ mhi_dev_close_channel(client->out_handle);
+ mhi_dev_close_channel(client->in_handle);
+ atomic_set(&client->tx_enabled, 0);
+ atomic_set(&client->rx_enabled, 0);
+ if (client->dev != NULL) {
+ netif_stop_queue(client->dev);
+ unregister_netdev(client->dev);
+ free_netdev(client->dev);
+ client->dev = NULL;
+ }
+ /* freeing mhi client and IPC context */
+ kfree(client);
+ kfree(mhi_net_ipc_log);
+ return 0;
+}
+
+static int mhi_dev_net_rgstr_client(struct mhi_dev_net_client *client, int idx)
+{
+ client->out_chan = idx;
+ client->in_chan = idx + 1;
+ mutex_init(&client->in_chan_lock);
+ mutex_init(&client->out_chan_lock);
+ spin_lock_init(&client->wrt_lock);
+ spin_lock_init(&client->rd_lock);
+ mhi_dev_net_log(MHI_INFO, "Registering out %d, In %d channels\n",
+ client->out_chan, client->in_chan);
+
+ /* Open IN and OUT channels for Network client*/
+ mhi_dev_net_open_channels(client);
+ return 0;
+}
+
+int mhi_dev_net_interface_init(void)
+{
+ int ret_val = 0;
+ int index = 0;
+ struct mhi_dev_net_client *mhi_net_client = NULL;
+
+ mhi_net_client = kzalloc(sizeof(struct mhi_dev_net_client), GFP_KERNEL);
+ if (!mhi_net_client)
+ return -ENOMEM;
+
+ mhi_net_ipc_log = ipc_log_context_create(MHI_NET_IPC_PAGES,
+ "mhi-net", 0);
+ if (mhi_net_ipc_log == NULL)
+ mhi_dev_net_log(MHI_DBG,
+ "Failed to create IPC logging for mhi_dev_net\n");
+ mhi_net_ctxt.client_handle = mhi_net_client;
+
+ /*Process pending packet work queue*/
+ mhi_net_client->pending_pckt_wq =
+ create_singlethread_workqueue("pending_xmit_pckt_wq");
+ INIT_WORK(&mhi_net_client->xmit_work,
+ mhi_dev_net_process_queue_packets);
+
+ mhi_dev_net_log(MHI_INFO,
+ "Registering for MHI transfer events from host\n");
+ mhi_net_ctxt.net_event_notifier = mhi_dev_net_event_notifier;
+
+ ret_val = mhi_dev_net_init_ch_attributes(&mhi_net_ctxt);
+ if (ret_val < 0) {
+ mhi_dev_net_log(MHI_ERROR,
+ "Failed to init client attributes\n");
+ goto channel_init_fail;
+ }
+ mhi_dev_net_log(MHI_DBG, "Initializing client\n");
+ index = MHI_CLIENT_IP_SW_4_OUT;
+ ret_val = mhi_dev_net_rgstr_client(mhi_net_client, index);
+ if (ret_val) {
+ mhi_dev_net_log(MHI_CRITICAL,
+ "Failed to reg client %d ret 0\n", ret_val);
+ goto client_register_fail;
+ }
+ return ret_val;
+
+channel_init_fail:
+ kfree(mhi_net_client);
+ kfree(mhi_net_ipc_log);
+ return ret_val;
+client_register_fail:
+ kfree(mhi_net_client);
+ kfree(mhi_net_ipc_log);
+ return ret_val;
+}
+EXPORT_SYMBOL(mhi_dev_net_interface_init);
+
+void __exit mhi_dev_net_exit(void)
+{
+ mhi_dev_net_log(MHI_INFO,
+ "MHI Network Interface Module exited ");
+ mhi_dev_net_close();
+}
+EXPORT_SYMBOL(mhi_dev_net_exit);
diff --git a/drivers/platform/msm/mhi_dev/mhi_hwio.h b/drivers/platform/msm/mhi_dev/mhi_hwio.h
index 197713b..09a0118 100644
--- a/drivers/platform/msm/mhi_dev/mhi_hwio.h
+++ b/drivers/platform/msm/mhi_dev/mhi_hwio.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015, 2017-2018 The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -184,6 +184,10 @@
#define ERDB_HIGHER_n_ERDB_HIGHER_MASK 0xffffffff
#define ERDB_HIGHER_n_ERDB_HIGHER_SHIFT 0x0
+#define BHI_INTVEC (0x220)
+#define BHI_INTVEC_MASK 0xFFFFFFFF
+#define BHI_INTVEC_SHIFT 0
+
#define BHI_EXECENV (0x228)
#define BHI_EXECENV_MASK 0xFFFFFFFF
#define BHI_EXECENV_SHIFT 0
diff --git a/drivers/platform/msm/mhi_dev/mhi_mmio.c b/drivers/platform/msm/mhi_dev/mhi_mmio.c
index 4043e0b..559fa84 100644
--- a/drivers/platform/msm/mhi_dev/mhi_mmio.c
+++ b/drivers/platform/msm/mhi_dev/mhi_mmio.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015, 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -133,6 +133,11 @@
chid_mask = (1 << chid_shft);
chid_idx = chdb_id/32;
+ if (chid_idx >= MHI_MASK_ROWS_CH_EV_DB) {
+ pr_err("Invalid channel id:%d\n", chid_idx);
+ return -EINVAL;
+ }
+
if (enable)
val = 1;
@@ -143,6 +148,13 @@
return rc;
}
+ rc = mhi_dev_mmio_read(dev, MHI_CHDB_INT_MASK_A7_n(chid_idx),
+ &dev->chdb[chid_idx].mask);
+ if (rc) {
+ pr_err("Read channel db INT on row:%d failed\n", chid_idx);
+ return rc;
+ }
+
return rc;
}
@@ -246,7 +258,8 @@
}
EXPORT_SYMBOL(mhi_dev_mmio_disable_erdb_a7);
-int mhi_dev_mmio_get_mhi_state(struct mhi_dev *dev, enum mhi_dev_state *state)
+int mhi_dev_mmio_get_mhi_state(struct mhi_dev *dev, enum mhi_dev_state *state,
+ bool *mhi_reset)
{
uint32_t reg_value = 0;
int rc = 0;
@@ -265,6 +278,9 @@
if (rc)
return rc;
+ if (reg_value & MHICTRL_RESET_MASK)
+ *mhi_reset = true;
+
pr_debug("MHICTRL is 0x%x\n", reg_value);
return 0;
@@ -286,6 +302,7 @@
pr_err("Set channel db on row:%d failed\n", i);
return rc;
}
+ dev->chdb[i].mask = mask;
}
return rc;
@@ -850,6 +867,9 @@
mhi_dev_mmio_clear_interrupts(dev);
mhi_dev_mmio_enable_ctrl_interrupt(dev);
+ /*Enable chdb interrupt*/
+ mhi_dev_mmio_enable_chdb_interrupts(dev);
+
/* Mask and enable control interrupt */
mb();
diff --git a/drivers/platform/msm/mhi_dev/mhi_ring.c b/drivers/platform/msm/mhi_dev/mhi_ring.c
index 3007b5a..d6791ea 100644
--- a/drivers/platform/msm/mhi_dev/mhi_ring.c
+++ b/drivers/platform/msm/mhi_dev/mhi_ring.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -47,38 +47,36 @@
{
struct mhi_addr host_addr;
- host_addr.device_pa = ring->ring_shadow.device_pa
+ if (ring->mhi_dev->use_ipa) {
+ host_addr.host_pa = ring->ring_shadow.host_pa
+ sizeof(union mhi_dev_ring_element_type) * start;
- host_addr.device_va = ring->ring_shadow.device_va
+ host_addr.phy_addr = ring->ring_cache_dma_handle +
+ (sizeof(union mhi_dev_ring_element_type) * start);
+ } else {
+ host_addr.device_va = ring->ring_shadow.device_va
+ sizeof(union mhi_dev_ring_element_type) * start;
- host_addr.host_pa = ring->ring_shadow.host_pa
- + sizeof(union mhi_dev_ring_element_type) * start;
+ host_addr.virt_addr = &ring->ring_cache[start];
+ }
+ host_addr.size = (end-start) * sizeof(union mhi_dev_ring_element_type);
if (start < end) {
- mhi_dev_read_from_host(&host_addr,
- (ring->ring_cache_dma_handle +
- sizeof(union mhi_dev_ring_element_type) * start),
- (end-start) *
- sizeof(union mhi_dev_ring_element_type));
+ mhi_dev_read_from_host(ring->mhi_dev, &host_addr);
} else if (start > end) {
/* copy from 'start' to ring end, then ring start to 'end'*/
- mhi_dev_read_from_host(&host_addr,
- (ring->ring_cache_dma_handle +
- sizeof(union mhi_dev_ring_element_type) * start),
- (ring->ring_size-start) *
- sizeof(union mhi_dev_ring_element_type));
+ host_addr.size = (ring->ring_size-start) *
+ sizeof(union mhi_dev_ring_element_type);
+ mhi_dev_read_from_host(ring->mhi_dev, &host_addr);
if (end) {
/* wrapped around */
host_addr.device_pa = ring->ring_shadow.device_pa;
host_addr.device_va = ring->ring_shadow.device_va;
host_addr.host_pa = ring->ring_shadow.host_pa;
- mhi_dev_read_from_host(&host_addr,
- (ring->ring_cache_dma_handle +
- sizeof(union mhi_dev_ring_element_type) *
- start),
- end * sizeof(union mhi_dev_ring_element_type));
+ host_addr.virt_addr = &ring->ring_cache[0];
+ host_addr.phy_addr = ring->ring_cache_dma_handle;
+ host_addr.size = (end *
+ sizeof(union mhi_dev_ring_element_type));
+ mhi_dev_read_from_host(ring->mhi_dev, &host_addr);
}
}
-
return 0;
}
@@ -95,21 +93,16 @@
mhi_ctx = ring->mhi_dev;
if (ring->wr_offset == wr_offset) {
- mhi_log(MHI_MSG_INFO,
+ mhi_log(MHI_MSG_VERBOSE,
"nothing to cache for ring %d, local wr_ofst %d\n",
ring->id, ring->wr_offset);
- mhi_log(MHI_MSG_INFO,
+ mhi_log(MHI_MSG_VERBOSE,
"new wr_offset %d\n", wr_offset);
return 0;
}
old_offset = ring->wr_offset;
- mhi_log(MHI_MSG_ERROR,
- "caching - rng size :%d local ofst:%d new ofst: %d\n",
- (uint32_t) ring->ring_size, old_offset,
- ring->wr_offset);
-
/*
* copy the elements starting from old_offset to wr_offset
* take in to account wrap around case event rings are not
@@ -118,12 +111,12 @@
if (ring->id >= mhi_ctx->ev_ring_start &&
ring->id < (mhi_ctx->ev_ring_start +
mhi_ctx->cfg.event_rings)) {
- mhi_log(MHI_MSG_ERROR,
+ mhi_log(MHI_MSG_VERBOSE,
"not caching event ring %d\n", ring->id);
return 0;
}
- mhi_log(MHI_MSG_ERROR, "caching ring %d, start %d, end %d\n",
+ mhi_log(MHI_MSG_VERBOSE, "caching ring %d, start %d, end %d\n",
ring->id, old_offset, wr_offset);
if (mhi_dev_fetch_ring_elements(ring, old_offset, wr_offset)) {
@@ -155,7 +148,7 @@
pr_err("%s: CMD DB read failed\n", __func__);
return rc;
}
- mhi_log(MHI_MSG_ERROR,
+ mhi_log(MHI_MSG_VERBOSE,
"ring %d wr_offset from db 0x%x\n",
ring->id, (uint32_t) wr_offset);
break;
@@ -172,7 +165,7 @@
pr_err("%s: CH DB read failed\n", __func__);
return rc;
}
- mhi_log(MHI_MSG_ERROR,
+ mhi_log(MHI_MSG_VERBOSE,
"ring %d wr_offset from db 0x%x\n",
ring->id, (uint32_t) wr_offset);
break;
@@ -203,10 +196,14 @@
/* get the element and invoke the respective callback */
el = &ring->ring_cache[offset];
+ mhi_log(MHI_MSG_VERBOSE, "evnt ptr : 0x%llx\n", el->tre.data_buf_ptr);
+ mhi_log(MHI_MSG_VERBOSE, "evnt len : 0x%x, offset:%d\n",
+ el->tre.len, offset);
+
if (ring->ring_cb)
ring->ring_cb(ring->mhi_dev, el, (void *)ring);
else
- mhi_log(MHI_MSG_INFO, "No callback registered for ring %d\n",
+ mhi_log(MHI_MSG_ERROR, "No callback registered for ring %d\n",
ring->id);
return 0;
@@ -216,12 +213,17 @@
int mhi_dev_process_ring(struct mhi_dev_ring *ring)
{
int rc = 0;
+ union mhi_dev_ring_element_type *el;
if (!ring) {
pr_err("%s: Invalid ring context\n", __func__);
return -EINVAL;
}
+ mhi_log(MHI_MSG_VERBOSE,
+ "Before wr update ring_id (%d) element (%d) with wr:%d\n",
+ ring->id, ring->rd_offset, ring->wr_offset);
+
rc = mhi_dev_update_wr_offset(ring);
if (rc) {
mhi_log(MHI_MSG_ERROR,
@@ -230,6 +232,13 @@
return rc;
}
+ /* get the element and invoke the respective callback */
+ el = &ring->ring_cache[ring->wr_offset];
+
+ mhi_log(MHI_MSG_VERBOSE, "evnt ptr : 0x%llx\n", el->tre.data_buf_ptr);
+ mhi_log(MHI_MSG_VERBOSE, "evnt len : 0x%x, wr_offset:%d\n",
+ el->tre.len, ring->wr_offset);
+
if (ring->type == RING_TYPE_CH) {
/* notify the clients that there are elements in the ring */
rc = mhi_dev_process_ring_element(ring, ring->rd_offset);
@@ -237,6 +246,9 @@
pr_err("Error fetching elements\n");
return rc;
}
+ mhi_log(MHI_MSG_VERBOSE,
+ "After ring update ring_id (%d) element (%d) with wr:%d\n",
+ ring->id, ring->rd_offset, ring->wr_offset);
while (ring->rd_offset != ring->wr_offset) {
rc = mhi_dev_process_ring_element(ring, ring->rd_offset);
@@ -247,7 +259,7 @@
return rc;
}
- mhi_log(MHI_MSG_ERROR,
+ mhi_log(MHI_MSG_VERBOSE,
"Processing ring (%d) rd_offset:%d, wr_offset:%d\n",
ring->id, ring->rd_offset, ring->wr_offset);
@@ -265,10 +277,12 @@
EXPORT_SYMBOL(mhi_dev_process_ring);
int mhi_dev_add_element(struct mhi_dev_ring *ring,
- union mhi_dev_ring_element_type *element)
+ union mhi_dev_ring_element_type *element,
+ struct event_req *ereq, int evt_offset)
{
uint32_t old_offset = 0;
struct mhi_addr host_addr;
+ uint32_t num_elem = 0;
if (!ring || !element) {
pr_err("%s: Invalid context\n", __func__);
@@ -278,33 +292,53 @@
mhi_dev_update_wr_offset(ring);
if ((ring->rd_offset + 1) % ring->ring_size == ring->wr_offset) {
- mhi_log(MHI_MSG_INFO, "ring full to insert element\n");
+ mhi_log(MHI_MSG_VERBOSE, "ring full to insert element\n");
return -EINVAL;
}
old_offset = ring->rd_offset;
- mhi_dev_ring_inc_index(ring, ring->rd_offset);
+ if (evt_offset) {
+ num_elem = evt_offset /
+ (sizeof(union mhi_dev_ring_element_type));
+ ring->rd_offset += num_elem;
+ if (ring->rd_offset >= ring->ring_size)
+ ring->rd_offset -= ring->ring_size;
+ } else
+ mhi_dev_ring_inc_index(ring, ring->rd_offset);
ring->ring_ctx->generic.rp = (ring->rd_offset *
- sizeof(union mhi_dev_ring_element_type)) +
- ring->ring_ctx->generic.rbase;
+ sizeof(union mhi_dev_ring_element_type)) +
+ ring->ring_ctx->generic.rbase;
/*
* Write the element, ring_base has to be the
* iomap of the ring_base for memcpy
*/
- host_addr.host_pa = ring->ring_shadow.host_pa +
+
+ if (ring->mhi_dev->use_ipa)
+ host_addr.host_pa = ring->ring_shadow.host_pa +
sizeof(union mhi_dev_ring_element_type) * old_offset;
- host_addr.device_va = ring->ring_shadow.device_va +
+ else
+ host_addr.device_va = ring->ring_shadow.device_va +
sizeof(union mhi_dev_ring_element_type) * old_offset;
- mhi_log(MHI_MSG_ERROR, "adding element to ring (%d)\n", ring->id);
- mhi_log(MHI_MSG_ERROR, "rd_ofset %d\n", ring->rd_offset);
- mhi_log(MHI_MSG_ERROR, "type %d\n", element->generic.type);
+ host_addr.virt_addr = element;
- mhi_dev_write_to_host(&host_addr, element,
- sizeof(union mhi_dev_ring_element_type), ring->mhi_dev);
+ if (evt_offset)
+ host_addr.size = evt_offset;
+ else
+ host_addr.size = sizeof(union mhi_dev_ring_element_type);
+ mhi_log(MHI_MSG_VERBOSE, "adding element to ring (%d)\n", ring->id);
+ mhi_log(MHI_MSG_VERBOSE, "rd_ofset %d\n", ring->rd_offset);
+ mhi_log(MHI_MSG_VERBOSE, "type %d\n", element->generic.type);
+
+ if (ereq)
+ mhi_dev_write_to_host(ring->mhi_dev, &host_addr,
+ ereq, MHI_DEV_DMA_ASYNC);
+ else
+ mhi_dev_write_to_host(ring->mhi_dev, &host_addr,
+ NULL, MHI_DEV_DMA_SYNC);
return 0;
}
EXPORT_SYMBOL(mhi_dev_add_element);
@@ -362,16 +396,15 @@
(union mhi_dev_ring_ctx *) (mhi->ch_ctx_shadow.device_va +
(ring->id - mhi->ch_ring_start)*sizeof(union mhi_dev_ring_ctx));
-
ring->ring_ctx_shadow = ring->ring_ctx;
- if (ring->type != RING_TYPE_ER) {
+ if (ring->type != RING_TYPE_ER || ring->type != RING_TYPE_CH) {
rc = mhi_dev_cache_ring(ring, wr_offset);
if (rc)
return rc;
}
- mhi_log(MHI_MSG_ERROR, "ctx ring_base:0x%x, rp:0x%x, wp:0x%x\n",
+ mhi_log(MHI_MSG_VERBOSE, "ctx ring_base:0x%x, rp:0x%x, wp:0x%x\n",
(uint32_t)ring->ring_ctx->generic.rbase,
(uint32_t)ring->ring_ctx->generic.rp,
(uint32_t)ring->ring_ctx->generic.wp);
diff --git a/drivers/platform/msm/mhi_dev/mhi_sm.c b/drivers/platform/msm/mhi_dev/mhi_sm.c
index 8179fad..1200a36 100644
--- a/drivers/platform/msm/mhi_dev/mhi_sm.c
+++ b/drivers/platform/msm/mhi_dev/mhi_sm.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -396,7 +396,8 @@
res = true;
break;
case EP_PCIE_EVENT_PM_D3_HOT:
- res = (curr_mstate == MHI_DEV_M3_STATE &&
+ res = ((curr_mstate == MHI_DEV_M3_STATE ||
+ curr_mstate == MHI_DEV_READY_STATE) &&
curr_dstate != MHI_SM_EP_PCIE_LINK_DISABLE);
break;
case EP_PCIE_EVENT_PM_D3_COLD:
@@ -437,7 +438,7 @@
{
enum mhi_dev_state old_state;
struct ep_pcie_msi_config cfg;
- int res;
+ int res = -EINVAL;
MHI_SM_FUNC_ENTRY();
@@ -476,6 +477,30 @@
mhi_sm_mmio_set_mhistatus(MHI_DEV_M0_STATE);
/* Tell the host, device move to M0 */
+ if (old_state == MHI_DEV_M3_STATE) {
+ if (mhi_sm_ctx->mhi_dev->use_ipa) {
+ res = ipa_dma_enable();
+ if (res) {
+ MHI_SM_ERR("IPA enable failed\n");
+ return res;
+ }
+ }
+
+ res = mhi_dev_resume(mhi_sm_ctx->mhi_dev);
+ if (res) {
+ MHI_SM_ERR("Failed resuming mhi core, returned %d",
+ res);
+ goto exit;
+ }
+
+ res = ipa_mhi_resume();
+ if (res) {
+ MHI_SM_ERR("Failed resuming ipa_mhi, returned %d",
+ res);
+ goto exit;
+ }
+ }
+
res = mhi_dev_send_state_change_event(mhi_sm_ctx->mhi_dev,
MHI_DEV_M0_STATE);
if (res) {
@@ -491,20 +516,6 @@
MHI_SM_ERR("failed sending EE event to host\n");
goto exit;
}
- } else if (old_state == MHI_DEV_M3_STATE) {
- /*Resuming MHI operation*/
- res = mhi_dev_resume(mhi_sm_ctx->mhi_dev);
- if (res) {
- MHI_SM_ERR("Failed resuming mhi core, returned %d",
- res);
- goto exit;
- }
- res = ipa_mhi_resume();
- if (res) {
- MHI_SM_ERR("Failed resuming ipa_mhi, returned %d",
- res);
- goto exit;
- }
}
res = 0;
@@ -557,6 +568,14 @@
goto exit;
}
+ if (mhi_sm_ctx->mhi_dev->use_ipa) {
+ res = ipa_dma_disable();
+ if (res) {
+ MHI_SM_ERR("IPA disable failed\n");
+ return res;
+ }
+ }
+
exit:
MHI_SM_FUNC_EXIT();
return res;
@@ -579,9 +598,9 @@
if (mhi_sm_ctx->mhi_state == MHI_DEV_M3_STATE) {
/*
- * ep_pcie driver is responsible to send the right wakeup
- * event, assert WAKE#, according to Link state
- */
+ * ep_pcie driver is responsible to send the right wakeup
+ * event, assert WAKE#, according to Link state
+ */
res = ep_pcie_wakeup_host(mhi_sm_ctx->mhi_dev->phandle);
if (res) {
MHI_SM_ERR("Failed to wakeup MHI host, returned %d\n",
@@ -661,8 +680,8 @@
MHI_SM_ERR("EP-PCIE Link is disable cannot set MMIO to %s\n",
mhi_sm_mstate_str(MHI_DEV_SYSERR_STATE));
- MHI_SM_ERR("/n/n/nASSERT ON DEVICE !!!!/n/n/n");
- WARN_ON();
+ MHI_SM_ERR("/n/n/nError ON DEVICE !!!!/n/n/n");
+ WARN_ON(1);
MHI_SM_FUNC_EXIT();
return res;
@@ -918,6 +937,24 @@
}
EXPORT_SYMBOL(mhi_dev_sm_init);
+int mhi_dev_sm_exit(struct mhi_dev *mhi_dev)
+{
+ MHI_SM_FUNC_ENTRY();
+
+ atomic_set(&mhi_sm_ctx->pending_device_events, 0);
+ atomic_set(&mhi_sm_ctx->pending_pcie_events, 0);
+ mhi_sm_debugfs_destroy();
+ flush_workqueue(mhi_sm_ctx->mhi_sm_wq);
+ destroy_workqueue(mhi_sm_ctx->mhi_sm_wq);
+ ipa_dma_destroy();
+ mutex_destroy(&mhi_sm_ctx->mhi_state_lock);
+ devm_kfree(mhi_dev->dev, mhi_sm_ctx);
+ mhi_sm_ctx = NULL;
+
+ return 0;
+}
+EXPORT_SYMBOL(mhi_dev_sm_exit);
+
/**
* mhi_dev_sm_get_mhi_state() -Get current MHI state.
* @state: return param
@@ -964,7 +1001,7 @@
*/
int mhi_dev_sm_set_ready(void)
{
- int res;
+ int res = 0;
int is_ready;
enum mhi_dev_state state;
@@ -1011,6 +1048,7 @@
goto unlock_and_exit;
}
mhi_sm_mmio_set_mhistatus(MHI_DEV_READY_STATE);
+ res = 0;
unlock_and_exit:
mutex_unlock(&mhi_sm_ctx->mhi_state_lock);
@@ -1153,6 +1191,7 @@
ep_pcie_mask_irq_event(mhi_sm_ctx->mhi_dev->phandle,
EP_PCIE_INT_EVT_MHI_A7, false);
mhi_dev_notify_a7_event(mhi_sm_ctx->mhi_dev);
+ kfree(dstate_change_evt);
goto exit;
default:
MHI_SM_ERR("Invalid ep_pcie event, received 0x%x event\n",
diff --git a/drivers/platform/msm/mhi_dev/mhi_sm.h b/drivers/platform/msm/mhi_dev/mhi_sm.h
index d477880..01e127b 100644
--- a/drivers/platform/msm/mhi_dev/mhi_sm.h
+++ b/drivers/platform/msm/mhi_dev/mhi_sm.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015,2017-2018 The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -41,6 +41,7 @@
};
int mhi_dev_sm_init(struct mhi_dev *dev);
+int mhi_dev_sm_exit(struct mhi_dev *dev);
int mhi_dev_sm_set_ready(void);
int mhi_dev_notify_sm_event(enum mhi_dev_event event);
int mhi_dev_sm_get_mhi_state(enum mhi_dev_state *state);
diff --git a/drivers/platform/msm/mhi_dev/mhi_uci.c b/drivers/platform/msm/mhi_dev/mhi_uci.c
index 3279fa8..244cf04 100644
--- a/drivers/platform/msm/mhi_dev/mhi_uci.c
+++ b/drivers/platform/msm/mhi_dev/mhi_uci.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015,2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -73,6 +73,12 @@
u32 uci_ownership;
};
+struct uci_ctrl {
+ wait_queue_head_t ctrl_wq;
+ struct mhi_uci_ctxt_t *uci_ctxt;
+ atomic_t ctrl_data_update;
+};
+
struct uci_client {
u32 client_index;
/* write channel - always odd*/
@@ -100,9 +106,13 @@
struct mhi_uci_ctxt_t {
struct chan_attr chan_attrib[MHI_MAX_SOFTWARE_CHANNELS];
struct uci_client client_handles[MHI_SOFTWARE_CLIENT_LIMIT];
+ struct uci_ctrl ctrl_handle;
void (*event_notifier)(struct mhi_dev_client_cb_reason *cb);
dev_t start_ctrl_nr;
struct cdev cdev[MHI_MAX_SOFTWARE_CHANNELS];
+ dev_t ctrl_nr;
+ struct cdev *cdev_ctrl;
+ struct device *dev;
struct class *mhi_uci_class;
atomic_t mhi_disabled;
atomic_t mhi_enable_notif_wq_active;
@@ -129,12 +139,16 @@
static ssize_t mhi_uci_client_read(struct file *file, char __user *buf,
size_t count, loff_t *offp);
+static ssize_t mhi_uci_ctrl_client_read(struct file *file, char __user *buf,
+ size_t count, loff_t *offp);
static ssize_t mhi_uci_client_write(struct file *file,
const char __user *buf, size_t count, loff_t *offp);
static int mhi_uci_client_open(struct inode *mhi_inode, struct file*);
+static int mhi_uci_ctrl_open(struct inode *mhi_inode, struct file*);
static int mhi_uci_client_release(struct inode *mhi_inode,
struct file *file_handle);
static unsigned int mhi_uci_client_poll(struct file *file, poll_table *wait);
+static unsigned int mhi_uci_ctrl_poll(struct file *file, poll_table *wait);
static struct mhi_uci_ctxt_t uci_ctxt;
static int mhi_init_read_chan(struct uci_client *client_handle,
@@ -184,6 +198,8 @@
uintptr_t memcpy_result = 0;
u32 data_inserted_so_far = 0;
struct uci_client *uci_handle;
+ struct mhi_req ureq;
+
uci_handle = container_of(client_handle, struct uci_client,
out_handle);
@@ -206,15 +222,43 @@
} else {
data_loc = buf;
}
+ ureq.client = *client_handle;
+ ureq.buf = data_loc;
+ ureq.len = size;
+ ureq.chan = uci_handle->out_chan;
+ ureq.mode = IPA_DMA_SYNC;
- data_inserted_so_far = mhi_dev_write_channel(*client_handle, data_loc,
- size);
+ data_inserted_so_far = mhi_dev_write_channel(&ureq);
error_memcpy:
kfree(data_loc);
return data_inserted_so_far;
}
+static unsigned int mhi_uci_ctrl_poll(struct file *file, poll_table *wait)
+{
+ unsigned int mask = 0;
+ struct uci_ctrl *uci_ctrl_handle;
+
+ uci_ctrl_handle = file->private_data;
+
+ if (!uci_ctrl_handle)
+ return -ENODEV;
+
+ poll_wait(file, &uci_ctrl_handle->ctrl_wq, wait);
+ if (!atomic_read(&uci_ctxt.mhi_disabled) &&
+ atomic_read(&uci_ctrl_handle->ctrl_data_update)) {
+ uci_log(UCI_DBG_VERBOSE, "Client can read ctrl_state");
+ mask |= POLLIN | POLLRDNORM;
+ }
+
+ uci_log(UCI_DBG_VERBOSE,
+ "Client attempted to poll ctrl returning mask 0x%x\n",
+ mask);
+
+ return mask;
+}
+
static unsigned int mhi_uci_client_poll(struct file *file, poll_table *wait)
{
unsigned int mask = 0;
@@ -297,6 +341,22 @@
return rc;
}
+static int mhi_uci_ctrl_open(struct inode *inode,
+ struct file *file_handle)
+{
+ struct uci_ctrl *uci_ctrl_handle;
+
+ uci_log(UCI_DBG_DBG, "Client opened ctrl file device node\n");
+
+ uci_ctrl_handle = &uci_ctxt.ctrl_handle;
+ if (!uci_ctrl_handle)
+ return -EINVAL;
+
+ file_handle->private_data = uci_ctrl_handle;
+
+ return 0;
+}
+
static int mhi_uci_client_open(struct inode *mhi_inode,
struct file *file_handle)
{
@@ -337,18 +397,20 @@
struct file *file_handle)
{
struct uci_client *uci_handle = file_handle->private_data;
- struct mhi_uci_ctxt_t *uci_ctxt = uci_handle->uci_ctxt;
+ struct mhi_uci_ctxt_t *uci_ctxt;
u32 nr_in_bufs = 0;
int rc = 0;
int in_chan = 0;
u32 buf_size = 0;
+ if (!uci_handle)
+ return -EINVAL;
+
+ uci_ctxt = uci_handle->uci_ctxt;
in_chan = iminor(mhi_inode) + 1;
nr_in_bufs = uci_ctxt->chan_attrib[in_chan].nr_trbs;
buf_size = uci_ctxt->chan_attrib[in_chan].max_packet_size;
- if (!uci_handle)
- return -EINVAL;
if (atomic_sub_return(1, &uci_handle->ref_count) == 0) {
uci_log(UCI_DBG_DBG,
"Last client left, closing channel 0x%x\n",
@@ -379,7 +441,54 @@
return rc;
}
-static ssize_t mhi_uci_client_read(struct file *file, char __user *buf,
+static ssize_t mhi_uci_ctrl_client_read(struct file *file,
+ char __user *user_buf,
+ size_t count, loff_t *offp)
+{
+ uint32_t rc = 0, info;
+ int nbytes, size;
+ char buf[MHI_CTRL_STATE];
+ struct uci_ctrl *uci_ctrl_handle = NULL;
+
+ if (!file || !user_buf || !count ||
+ (count < MHI_CTRL_STATE) || !file->private_data)
+ return -EINVAL;
+
+ uci_ctrl_handle = file->private_data;
+ rc = mhi_ctrl_state_info(&info);
+ if (rc)
+ return -EINVAL;
+
+ switch (info) {
+ case MHI_STATE_CONFIGURED:
+ nbytes = scnprintf(buf, sizeof(buf),
+ "MHI_STATE=CONFIGURED");
+ break;
+ case MHI_STATE_CONNECTED:
+ nbytes = scnprintf(buf, sizeof(buf),
+ "MHI_STATE=CONNECTED");
+ break;
+ case MHI_STATE_DISCONNECTED:
+ nbytes = scnprintf(buf, sizeof(buf),
+ "MHI_STATE=DISCONNECTED");
+ break;
+ default:
+ pr_err("invalid info:%d\n", info);
+ return -EINVAL;
+ }
+
+
+ size = simple_read_from_buffer(user_buf, count, offp, buf, nbytes);
+
+ atomic_set(&uci_ctrl_handle->ctrl_data_update, 0);
+
+ if (size == 0)
+ *offp = 0;
+
+ return size;
+}
+
+static ssize_t mhi_uci_client_read(struct file *file, char __user *ubuf,
size_t uspace_buf_size, loff_t *bytes_pending)
{
struct uci_client *uci_handle = NULL;
@@ -387,39 +496,40 @@
int bytes_avail = 0;
int ret_val = 0;
struct mutex *mutex;
- u32 chan = 0;
ssize_t bytes_copied = 0;
u32 addr_offset = 0;
- uint32_t buf_size;
- uint32_t chained = 0;
void *local_buf = NULL;
+ struct mhi_req ureq;
- if (!file || !buf || !uspace_buf_size ||
+ if (!file || !ubuf || !uspace_buf_size ||
!file->private_data)
return -EINVAL;
uci_handle = file->private_data;
client_handle = uci_handle->in_handle;
mutex = &uci_handle->in_chan_lock;
- chan = uci_handle->in_chan;
+ ureq.chan = uci_handle->in_chan;
mutex_lock(mutex);
+ ureq.client = client_handle;
+ ureq.buf = uci_handle->in_buf_list[0].addr;
+ ureq.len = uci_handle->in_buf_list[0].buf_size;
+ ureq.mode = IPA_DMA_SYNC;
- local_buf = uci_handle->in_buf_list[0].addr;
- buf_size = uci_handle->in_buf_list[0].buf_size;
-
-
- uci_log(UCI_DBG_VERBOSE, "Client attempted read on chan %d\n", chan);
+ uci_log(UCI_DBG_VERBOSE, "Client attempted read on chan %d\n",
+ ureq.chan);
do {
if (!uci_handle->pkt_loc &&
!atomic_read(&uci_ctxt.mhi_disabled)) {
- bytes_avail = mhi_dev_read_channel(client_handle,
- local_buf, buf_size, &chained);
+ bytes_avail = mhi_dev_read_channel(&ureq);
uci_log(UCI_DBG_VERBOSE,
- "reading from mhi_core local_buf = %p,buf_size = 0x%x bytes_read = 0x%x\n",
- local_buf, buf_size, bytes_avail);
+ "reading from mhi_core local_buf = %p",
+ local_buf);
+ uci_log(UCI_DBG_VERBOSE,
+ "buf_size = 0x%x bytes_read = 0x%x\n",
+ ureq.len, bytes_avail);
if (bytes_avail < 0) {
uci_log(UCI_DBG_ERROR,
@@ -430,13 +540,14 @@
}
if (bytes_avail > 0) {
- uci_handle->pkt_loc = (void *)local_buf;
- uci_handle->pkt_size = bytes_avail;
+ uci_handle->pkt_loc = (void *) ureq.buf;
+ uci_handle->pkt_size = ureq.actual_len;
*bytes_pending = (loff_t)uci_handle->pkt_size;
uci_log(UCI_DBG_VERBOSE,
- "Got pkt of size 0x%x at addr %p, chan %d\n",
- uci_handle->pkt_size, local_buf, chan);
+ "Got pkt of sz 0x%x at adr %p, ch %d\n",
+ uci_handle->pkt_size,
+ ureq.buf, ureq.chan);
} else {
uci_handle->pkt_loc = 0;
uci_handle->pkt_size = 0;
@@ -448,7 +559,7 @@
uci_log(UCI_DBG_VERBOSE,
"No data read_data_ready %d, chan %d\n",
atomic_read(&uci_handle->read_data_ready),
- chan);
+ ureq.chan);
ret_val = wait_event_interruptible(uci_handle->read_wq,
(!mhi_dev_channel_isempty(client_handle)));
@@ -458,17 +569,17 @@
goto error;
}
uci_log(UCI_DBG_VERBOSE,
- "Thread woke up. Got data on chan %d read_data_ready %d\n",
- chan,
+ "wk up Got data on ch %d read_data_ready %d\n",
+ ureq.chan,
atomic_read(&uci_handle->read_data_ready));
/* A valid packet was returned from MHI */
} else if (bytes_avail > 0) {
uci_log(UCI_DBG_VERBOSE,
- "Got packet: avail pkts %d phy_adr %p, chan %d\n",
+ "Got packet: avail pkts %d phy_adr %p, ch %d\n",
atomic_read(&uci_handle->read_data_ready),
- local_buf,
- chan);
+ ureq.buf,
+ ureq.chan);
break;
/*
* MHI did not return a valid packet, but we have one
@@ -477,16 +588,16 @@
} else {
uci_log(UCI_DBG_CRITICAL,
"chan %d err: avail pkts %d phy_adr %p",
- chan,
+ ureq.chan,
atomic_read(&uci_handle->read_data_ready),
- local_buf);
+ ureq.buf);
return -EIO;
}
} while (!uci_handle->pkt_loc);
if (uspace_buf_size >= *bytes_pending) {
addr_offset = uci_handle->pkt_size - *bytes_pending;
- if (copy_to_user(buf, uci_handle->pkt_loc + addr_offset,
+ if (copy_to_user(ubuf, uci_handle->pkt_loc + addr_offset,
*bytes_pending)) {
ret_val = -EIO;
goto error;
@@ -495,10 +606,10 @@
bytes_copied = *bytes_pending;
*bytes_pending = 0;
uci_log(UCI_DBG_VERBOSE, "Copied 0x%x of 0x%x, chan %d\n",
- bytes_copied, (u32)*bytes_pending, chan);
+ bytes_copied, (u32)*bytes_pending, ureq.chan);
} else {
addr_offset = uci_handle->pkt_size - *bytes_pending;
- if (copy_to_user(buf, (void *) (uintptr_t)uci_handle->pkt_loc +
+ if (copy_to_user(ubuf, (void *) (uintptr_t)uci_handle->pkt_loc +
addr_offset, uspace_buf_size)) {
ret_val = -EIO;
goto error;
@@ -508,13 +619,13 @@
uci_log(UCI_DBG_VERBOSE, "Copied 0x%x of 0x%x,chan %d\n",
bytes_copied,
(u32)*bytes_pending,
- chan);
+ ureq.chan);
}
/* We finished with this buffer, map it back */
if (*bytes_pending == 0) {
uci_log(UCI_DBG_VERBOSE,
"All data consumed. Pkt loc %p ,chan %d\n",
- uci_handle->pkt_loc, chan);
+ uci_handle->pkt_loc, ureq.chan);
uci_handle->pkt_loc = 0;
uci_handle->pkt_size = 0;
}
@@ -599,6 +710,8 @@
case MHI_CLIENT_SAHARA_IN:
case MHI_CLIENT_EFS_OUT:
case MHI_CLIENT_EFS_IN:
+ case MHI_CLIENT_MBIM_OUT:
+ case MHI_CLIENT_MBIM_IN:
case MHI_CLIENT_QMI_OUT:
case MHI_CLIENT_QMI_IN:
case MHI_CLIENT_IP_CTRL_0_OUT:
@@ -634,6 +747,23 @@
return 0;
}
+void uci_ctrl_update(struct mhi_dev_client_cb_reason *reason)
+{
+ struct uci_ctrl *uci_ctrl_handle = NULL;
+
+ if (reason->reason == MHI_DEV_CTRL_UPDATE) {
+ uci_ctrl_handle = &uci_ctxt.ctrl_handle;
+ if (!uci_ctrl_handle) {
+ pr_err("Invalid uci ctrl handle\n");
+ return;
+ }
+
+ uci_log(UCI_DBG_DBG, "received state change update\n");
+ wake_up(&uci_ctrl_handle->ctrl_wq);
+ atomic_set(&uci_ctrl_handle->ctrl_data_update, 1);
+ }
+}
+EXPORT_SYMBOL(uci_ctrl_update);
static void uci_event_notifier(struct mhi_dev_client_cb_reason *reason)
{
@@ -718,6 +848,12 @@
return rc;
}
+static const struct file_operations mhi_uci_ctrl_client_fops = {
+ .open = mhi_uci_ctrl_open,
+ .read = mhi_uci_ctrl_client_read,
+ .poll = mhi_uci_ctrl_poll,
+};
+
static const struct file_operations mhi_uci_client_fops = {
.read = mhi_uci_client_read,
.write = mhi_uci_client_write,
@@ -770,16 +906,25 @@
}
}
}
+
+ init_waitqueue_head(&uci_ctxt.ctrl_handle.ctrl_wq);
uci_log(UCI_DBG_INFO, "Allocating char devices.\n");
r = alloc_chrdev_region(&uci_ctxt.start_ctrl_nr,
0, MHI_MAX_SOFTWARE_CHANNELS,
DEVICE_NAME);
-
if (IS_ERR_VALUE(r)) {
uci_log(UCI_DBG_ERROR,
"Failed to alloc char devs, ret 0x%x\n", r);
goto failed_char_alloc;
}
+
+ r = alloc_chrdev_region(&uci_ctxt.ctrl_nr, 0, 1, DEVICE_NAME);
+ if (IS_ERR_VALUE(r)) {
+ uci_log(UCI_DBG_ERROR,
+ "Failed to alloc char ctrl devs, 0x%x\n", r);
+ goto failed_char_alloc;
+ }
+
uci_log(UCI_DBG_INFO, "Creating class\n");
uci_ctxt.mhi_uci_class = class_create(THIS_MODULE,
DEVICE_NAME);
@@ -803,12 +948,12 @@
i, r);
goto failed_char_add;
}
+
uci_ctxt.client_handles[i].dev =
device_create(uci_ctxt.mhi_uci_class, NULL,
uci_ctxt.start_ctrl_nr + i,
NULL, DEVICE_NAME "_pipe_%d",
i * 2);
-
if (IS_ERR(uci_ctxt.client_handles[i].dev)) {
uci_log(UCI_DBG_ERROR,
"Failed to add cdev %d\n", i);
@@ -817,6 +962,37 @@
}
}
}
+
+ /* Control node */
+ uci_ctxt.cdev_ctrl = cdev_alloc();
+ if (uci_ctxt.cdev_ctrl == NULL) {
+ pr_err("%s: ctrl cdev alloc failed\n", __func__);
+ return 0;
+ }
+
+ cdev_init(uci_ctxt.cdev_ctrl, &mhi_uci_ctrl_client_fops);
+ uci_ctxt.cdev_ctrl->owner = THIS_MODULE;
+ r = cdev_add(uci_ctxt.cdev_ctrl, uci_ctxt.ctrl_nr, 1);
+ if (IS_ERR_VALUE(r)) {
+ uci_log(UCI_DBG_ERROR,
+ "Failed to add ctrl cdev %d, ret 0x%x\n", i, r);
+ kfree(uci_ctxt.cdev_ctrl);
+ uci_ctxt.cdev_ctrl = NULL;
+ return 0;
+ }
+
+ uci_ctxt.dev =
+ device_create(uci_ctxt.mhi_uci_class, NULL,
+ uci_ctxt.ctrl_nr,
+ NULL, DEVICE_NAME "_ctrl");
+ if (IS_ERR(uci_ctxt.dev)) {
+ uci_log(UCI_DBG_ERROR,
+ "Failed to add ctrl cdev %d\n", i);
+ cdev_del(uci_ctxt.cdev_ctrl);
+ kfree(uci_ctxt.cdev_ctrl);
+ uci_ctxt.cdev_ctrl = NULL;
+ }
+
return 0;
failed_char_add:
diff --git a/drivers/platform/msm/qpnp-revid.c b/drivers/platform/msm/qpnp-revid.c
index 05e8172..99c5f27 100644
--- a/drivers/platform/msm/qpnp-revid.c
+++ b/drivers/platform/msm/qpnp-revid.c
@@ -50,6 +50,7 @@
[PM2433_SUBTYPE] = "PM2433",
[PMD9655_SUBTYPE] = "PMD9655",
[PM8950_SUBTYPE] = "PM8950",
+ [PM8953_SUBTYPE] = "PM8953",
[PMI8950_SUBTYPE] = "PMI8950",
[PMK8001_SUBTYPE] = "PMK8001",
[PMI8996_SUBTYPE] = "PMI8996",
diff --git a/drivers/power/supply/qcom/fg-core.h b/drivers/power/supply/qcom/fg-core.h
index a2a35c6..e77cf35 100644
--- a/drivers/power/supply/qcom/fg-core.h
+++ b/drivers/power/supply/qcom/fg-core.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -86,6 +86,13 @@
#define MAX_CC_STEPS 20
+enum prof_load_status {
+ PROFILE_MISSING,
+ PROFILE_LOADED,
+ PROFILE_SKIPPED,
+ PROFILE_NOT_LOADED,
+};
+
/* Debug flag definitions */
enum fg_debug_flag {
FG_IRQ = BIT(0), /* Show interrupts */
@@ -446,6 +453,7 @@
enum slope_limit_status slope_limit_sts;
bool profile_available;
bool profile_loaded;
+ enum prof_load_status profile_load_status;
bool battery_missing;
bool fg_restarting;
bool charge_full;
diff --git a/drivers/power/supply/qcom/qg-core.h b/drivers/power/supply/qcom/qg-core.h
index aadef7f..7c0db70 100644
--- a/drivers/power/supply/qcom/qg-core.h
+++ b/drivers/power/supply/qcom/qg-core.h
@@ -91,6 +91,8 @@
int charge_type;
int next_wakeup_ms;
u32 wa_flags;
+ u32 seq_no;
+ u32 charge_counter_uah;
ktime_t last_user_update_time;
ktime_t last_fifo_update_time;
diff --git a/drivers/power/supply/qcom/qpnp-fg-gen3.c b/drivers/power/supply/qcom/qpnp-fg-gen3.c
index 0894f37..8cc8328 100644
--- a/drivers/power/supply/qcom/qpnp-fg-gen3.c
+++ b/drivers/power/supply/qcom/qpnp-fg-gen3.c
@@ -916,11 +916,16 @@
#define DEFAULT_BATT_TYPE "Unknown Battery"
#define MISSING_BATT_TYPE "Missing Battery"
#define LOADING_BATT_TYPE "Loading Battery"
+#define SKIP_BATT_TYPE "Skipped loading battery"
static const char *fg_get_battery_type(struct fg_chip *chip)
{
- if (chip->battery_missing)
+ if (chip->battery_missing ||
+ chip->profile_load_status == PROFILE_MISSING)
return MISSING_BATT_TYPE;
+ if (chip->profile_load_status == PROFILE_SKIPPED)
+ return SKIP_BATT_TYPE;
+
if (chip->bp.batt_type_str) {
if (chip->profile_loaded)
return chip->bp.batt_type_str;
@@ -2714,12 +2719,14 @@
buf, PROFILE_COMP_LEN, FG_IMA_DEFAULT);
if (rc < 0) {
pr_err("Error in reading battery profile, rc:%d\n", rc);
+ chip->profile_load_status = PROFILE_SKIPPED;
return false;
}
profiles_same = memcmp(chip->batt_profile, buf,
PROFILE_COMP_LEN) == 0;
if (profiles_same) {
fg_dbg(chip, FG_STATUS, "Battery profile is same, not loading it\n");
+ chip->profile_load_status = PROFILE_LOADED;
return false;
}
@@ -2733,6 +2740,7 @@
dump_sram(chip->batt_profile, PROFILE_LOAD_WORD,
PROFILE_LEN);
}
+ chip->profile_load_status = PROFILE_SKIPPED;
return false;
}
@@ -2876,6 +2884,7 @@
rc = fg_get_batt_profile(chip);
if (rc < 0) {
+ chip->profile_load_status = PROFILE_MISSING;
pr_warn("profile for batt_id=%dKOhms not found..using OTP, rc:%d\n",
chip->batt_id_ohms / 1000, rc);
goto out;
@@ -2927,6 +2936,7 @@
}
fg_dbg(chip, FG_STATUS, "SOC is ready\n");
+ chip->profile_load_status = PROFILE_LOADED;
done:
rc = fg_bp_params_config(chip);
if (rc < 0)
@@ -2952,7 +2962,10 @@
batt_psy_initialized(chip);
fg_notify_charger(chip);
- chip->profile_loaded = true;
+
+ if (chip->profile_load_status == PROFILE_LOADED)
+ chip->profile_loaded = true;
+
fg_dbg(chip, FG_STATUS, "profile loaded successfully");
out:
chip->soc_reporting_ready = true;
@@ -4312,6 +4325,7 @@
if (chip->battery_missing) {
chip->profile_available = false;
chip->profile_loaded = false;
+ chip->profile_load_status = PROFILE_NOT_LOADED;
chip->soc_reporting_ready = false;
chip->batt_id_ohms = -EINVAL;
cancel_delayed_work_sync(&chip->pl_enable_work);
diff --git a/drivers/power/supply/qcom/qpnp-qg.c b/drivers/power/supply/qcom/qpnp-qg.c
index 55cb5ef..3fe2579 100644
--- a/drivers/power/supply/qcom/qpnp-qg.c
+++ b/drivers/power/supply/qcom/qpnp-qg.c
@@ -226,6 +226,8 @@
u8 v_fifo[MAX_FIFO_LENGTH * 2], i_fifo[MAX_FIFO_LENGTH * 2];
u32 sample_interval = 0, sample_count = 0, fifo_v = 0, fifo_i = 0;
+ chip->kdata.fifo_time = (u32)ktime_get_seconds();
+
if (!fifo_length) {
pr_debug("No FIFO data\n");
return 0;
@@ -279,6 +281,7 @@
}
chip->kdata.fifo_length = fifo_length;
+ chip->kdata.seq_no = chip->seq_no++ % U32_MAX;
return rc;
}
@@ -330,6 +333,9 @@
chip->kdata.fifo[index].count = count;
chip->kdata.fifo_length++;
+ if (chip->kdata.fifo_length == 1) /* Only accumulator data */
+ chip->kdata.seq_no = chip->seq_no++ % U32_MAX;
+
qg_dbg(chip, QG_DEBUG_FIFO, "ACC v_avg=%duV i_avg=%duA interval=%d count=%d\n",
chip->kdata.fifo[index].v,
(int)chip->kdata.fifo[index].i,
@@ -507,11 +513,8 @@
qg_dbg(chip, QG_DEBUG_SOC, "udata SOC=%d last SOC=%d\n",
chip->udata.param[QG_SOC].data, chip->catch_up_soc);
- /* Only scale if SOC has changed */
- if (chip->catch_up_soc != chip->udata.param[QG_SOC].data) {
- chip->catch_up_soc = chip->udata.param[QG_SOC].data;
- qg_scale_soc(chip, false);
- }
+ chip->catch_up_soc = chip->udata.param[QG_SOC].data;
+ qg_scale_soc(chip, false);
/* update parameters to SDAM */
chip->sdam_data[SDAM_SOC] =
@@ -527,6 +530,10 @@
pr_err("Failed to update SDAM params, rc=%d\n", rc);
}
+ if (chip->udata.param[QG_CHARGE_COUNTER].valid)
+ chip->charge_counter_uah =
+ chip->udata.param[QG_CHARGE_COUNTER].data;
+
vote(chip->awake_votable, UDATA_READY_VOTER, false, 0);
}
@@ -958,6 +965,9 @@
case POWER_SUPPLY_PROP_BATT_PROFILE_VERSION:
pval->intval = chip->bp.qg_profile_version;
break;
+ case POWER_SUPPLY_PROP_CHARGE_COUNTER:
+ pval->intval = chip->charge_counter_uah;
+ break;
default:
pr_debug("Unsupported property %d\n", psp);
break;
@@ -978,6 +988,7 @@
POWER_SUPPLY_PROP_VOLTAGE_NOW,
POWER_SUPPLY_PROP_VOLTAGE_OCV,
POWER_SUPPLY_PROP_CURRENT_NOW,
+ POWER_SUPPLY_PROP_CHARGE_COUNTER,
POWER_SUPPLY_PROP_RESISTANCE,
POWER_SUPPLY_PROP_RESISTANCE_ID,
POWER_SUPPLY_PROP_RESISTANCE_CAPACITIVE,
@@ -1169,6 +1180,7 @@
goto fail_read;
}
+
if (copy_to_user(buf, &chip->kdata, data_size)) {
pr_err("Failed in copy_to_user\n");
rc = -EFAULT;
@@ -1176,9 +1188,6 @@
}
chip->data_ready = false;
- /* clear data */
- memset(&chip->kdata, 0, sizeof(chip->kdata));
-
/* release all wake sources */
vote(chip->awake_votable, GOOD_OCV_VOTER, false, 0);
vote(chip->awake_votable, FIFO_DONE_VOTER, false, 0);
@@ -1186,7 +1195,11 @@
vote(chip->awake_votable, SUSPEND_DATA_VOTER, false, 0);
qg_dbg(chip, QG_DEBUG_DEVICE,
- "QG device read complete Size=%ld\n", data_size);
+ "QG device read complete Seq_no=%u Size=%ld\n",
+ chip->kdata.seq_no, data_size);
+
+ /* clear data */
+ memset(&chip->kdata, 0, sizeof(chip->kdata));
mutex_unlock(&chip->data_lock);
@@ -1489,7 +1502,8 @@
use_pon_ocv = true;
goto done;
}
- qg_dbg(chip, QG_DEBUG_PON, "Shutdown: SOC=%d OCV=%duV time=%dsecs, time_now=%ldsecs\n",
+ qg_dbg(chip, QG_DEBUG_PON, "Shutdown: Valid=%d SOC=%d OCV=%duV time=%dsecs, time_now=%ldsecs\n",
+ shutdown[SDAM_VALID],
shutdown[SDAM_SOC],
shutdown[SDAM_OCV_UV],
shutdown[SDAM_TIME_SEC],
diff --git a/drivers/power/supply/qcom/qpnp-smb5.c b/drivers/power/supply/qcom/qpnp-smb5.c
index b3f66d5..0e6adff 100644
--- a/drivers/power/supply/qcom/qpnp-smb5.c
+++ b/drivers/power/supply/qcom/qpnp-smb5.c
@@ -158,7 +158,8 @@
int chg_inhibit_thr_mv;
bool no_battery;
bool hvdcp_disable;
- bool auto_recharge_soc;
+ int auto_recharge_soc;
+ int auto_recharge_vbat_mv;
int wd_bark_time;
int batt_profile_fcc_ua;
int batt_profile_fv_uv;
@@ -329,8 +330,23 @@
return -EINVAL;
}
- chip->dt.auto_recharge_soc = of_property_read_bool(node,
- "qcom,auto-recharge-soc");
+ chip->dt.auto_recharge_soc = -EINVAL;
+ rc = of_property_read_u32(node, "qcom,auto-recharge-soc",
+ &chip->dt.auto_recharge_soc);
+ if (!rc && (chip->dt.auto_recharge_soc < 0 ||
+ chip->dt.auto_recharge_soc > 100)) {
+ pr_err("qcom,auto-recharge-soc is incorrect\n");
+ return -EINVAL;
+ }
+ chg->auto_recharge_soc = chip->dt.auto_recharge_soc;
+
+ chip->dt.auto_recharge_vbat_mv = -EINVAL;
+ rc = of_property_read_u32(node, "qcom,auto-recharge-vbat-mv",
+ &chip->dt.auto_recharge_vbat_mv);
+ if (!rc && (chip->dt.auto_recharge_vbat_mv < 0)) {
+ pr_err("qcom,auto-recharge-vbat-mv is incorrect\n");
+ return -EINVAL;
+ }
chg->dcp_icl_ua = chip->dt.usb_icl_ua;
@@ -956,6 +972,7 @@
POWER_SUPPLY_PROP_CHARGE_CONTROL_LIMIT_MAX,
POWER_SUPPLY_PROP_CHARGE_CONTROL_LIMIT,
POWER_SUPPLY_PROP_CHARGE_COUNTER,
+ POWER_SUPPLY_PROP_RECHARGE_SOC,
};
static int smb5_batt_get_prop(struct power_supply *psy,
@@ -1045,6 +1062,9 @@
case POWER_SUPPLY_PROP_CHARGE_COUNTER:
rc = smblib_get_prop_batt_charge_counter(chg, val);
break;
+ case POWER_SUPPLY_PROP_RECHARGE_SOC:
+ val->intval = chg->auto_recharge_soc;
+ break;
default:
pr_err("batt power supply prop %d not supported\n", psp);
return -EINVAL;
@@ -1555,15 +1575,66 @@
return rc;
}
- rc = smblib_masked_write(chg, CHGR_CFG2_REG,
- SOC_BASED_RECHG_BIT,
- chip->dt.auto_recharge_soc ? SOC_BASED_RECHG_BIT : 0);
+ rc = smblib_masked_write(chg, CHGR_CFG2_REG, RECHG_MASK,
+ (chip->dt.auto_recharge_vbat_mv != -EINVAL) ?
+ VBAT_BASED_RECHG_BIT : 0);
if (rc < 0) {
- dev_err(chg->dev, "Couldn't configure FG_UPDATE_CFG2_SEL_REG rc=%d\n",
+ dev_err(chg->dev, "Couldn't configure VBAT-rechg CHG_CFG2_REG rc=%d\n",
rc);
return rc;
}
+ /* program the auto-recharge VBAT threshold */
+ if (chip->dt.auto_recharge_vbat_mv != -EINVAL) {
+ u32 temp = VBAT_TO_VRAW_ADC(chip->dt.auto_recharge_vbat_mv);
+
+ temp = ((temp & 0xFF00) >> 8) | ((temp & 0xFF) << 8);
+ rc = smblib_batch_write(chg,
+ CHGR_ADC_RECHARGE_THRESHOLD_MSB_REG, (u8 *)&temp, 2);
+ if (rc < 0) {
+ dev_err(chg->dev, "Couldn't configure ADC_RECHARGE_THRESHOLD REG rc=%d\n",
+ rc);
+ return rc;
+ }
+ /* Program the sample count for VBAT based recharge to 3 */
+ rc = smblib_masked_write(chg, CHGR_NO_SAMPLE_TERM_RCHG_CFG_REG,
+ NO_OF_SAMPLE_FOR_RCHG,
+ 2 << NO_OF_SAMPLE_FOR_RCHG_SHIFT);
+ if (rc < 0) {
+ dev_err(chg->dev, "Couldn't configure CHGR_NO_SAMPLE_FOR_TERM_RCHG_CFG rc=%d\n",
+ rc);
+ return rc;
+ }
+ }
+
+ rc = smblib_masked_write(chg, CHGR_CFG2_REG, RECHG_MASK,
+ (chip->dt.auto_recharge_soc != -EINVAL) ?
+ SOC_BASED_RECHG_BIT : VBAT_BASED_RECHG_BIT);
+ if (rc < 0) {
+ dev_err(chg->dev, "Couldn't configure SOC-rechg CHG_CFG2_REG rc=%d\n",
+ rc);
+ return rc;
+ }
+
+ /* program the auto-recharge threshold */
+ if (chip->dt.auto_recharge_soc != -EINVAL) {
+ rc = smblib_write(chg, CHARGE_RCHG_SOC_THRESHOLD_CFG_REG,
+ (chip->dt.auto_recharge_soc * 255) / 100);
+ if (rc < 0) {
+ dev_err(chg->dev, "Couldn't configure CHG_RCHG_SOC_REG rc=%d\n",
+ rc);
+ return rc;
+ }
+ /* Program the sample count for SOC based recharge to 1 */
+ rc = smblib_masked_write(chg, CHGR_NO_SAMPLE_TERM_RCHG_CFG_REG,
+ NO_OF_SAMPLE_FOR_RCHG, 0);
+ if (rc < 0) {
+ dev_err(chg->dev, "Couldn't configure CHGR_NO_SAMPLE_FOR_TERM_RCHG_CFG rc=%d\n",
+ rc);
+ return rc;
+ }
+ }
+
if (chg->sw_jeita_enabled) {
rc = smblib_disable_hw_jeita(chg, true);
if (rc < 0) {
diff --git a/drivers/power/supply/qcom/smb-lib.c b/drivers/power/supply/qcom/smb-lib.c
index 496a276..90745fd 100644
--- a/drivers/power/supply/qcom/smb-lib.c
+++ b/drivers/power/supply/qcom/smb-lib.c
@@ -4805,7 +4805,7 @@
if (++chg->vconn_attempts > VCONN_MAX_ATTEMPTS) {
smblib_err(chg, "VCONN failed to enable after %d attempts\n",
- chg->otg_attempts - 1);
+ chg->vconn_attempts - 1);
chg->vconn_en = false;
chg->vconn_attempts = 0;
goto unlock;
@@ -4829,14 +4829,7 @@
chg->vconn_attempts = 0;
goto unlock;
}
-
smblib_dbg(chg, PR_OTG, "VCONN OC fell after %dms\n", 2 * i + 1);
- if (++chg->vconn_attempts > VCONN_MAX_ATTEMPTS) {
- smblib_err(chg, "VCONN failed to enable after %d attempts\n",
- chg->vconn_attempts - 1);
- chg->vconn_en = false;
- goto unlock;
- }
rc = _smblib_vconn_regulator_enable(chg->vconn_vreg->rdev);
if (rc < 0) {
diff --git a/drivers/power/supply/qcom/smb5-lib.c b/drivers/power/supply/qcom/smb5-lib.c
index dbadd95..46cedb3 100644
--- a/drivers/power/supply/qcom/smb5-lib.c
+++ b/drivers/power/supply/qcom/smb5-lib.c
@@ -62,11 +62,15 @@
return regmap_write(chg->regmap, addr, val);
}
+int smblib_batch_write(struct smb_charger *chg, u16 addr, u8 *val,
+ int count)
+{
+ return regmap_bulk_write(chg->regmap, addr, val, count);
+}
+
int smblib_masked_write(struct smb_charger *chg, u16 addr, u8 mask, u8 val)
{
-
return regmap_update_bits(chg->regmap, addr, mask, val);
-
}
int smblib_get_jeita_cc_delta(struct smb_charger *chg, int *cc_delta_ua)
@@ -707,20 +711,21 @@
int rc;
union power_supply_propval val;
- if (!chg->suspend_input_on_debug_batt)
- return;
-
rc = power_supply_get_property(chg->bms_psy,
POWER_SUPPLY_PROP_DEBUG_BATTERY, &val);
if (rc < 0) {
smblib_err(chg, "Couldn't get debug battery prop rc=%d\n", rc);
return;
}
-
- vote(chg->usb_icl_votable, DEBUG_BOARD_VOTER, val.intval, 0);
- vote(chg->dc_suspend_votable, DEBUG_BOARD_VOTER, val.intval, 0);
- if (val.intval)
- pr_info("Input suspended: Fake battery\n");
+ if (chg->suspend_input_on_debug_batt) {
+ vote(chg->usb_icl_votable, DEBUG_BOARD_VOTER, val.intval, 0);
+ vote(chg->dc_suspend_votable, DEBUG_BOARD_VOTER, val.intval, 0);
+ if (val.intval)
+ pr_info("Input suspended: Fake battery\n");
+ } else {
+ vote(chg->chg_disable_votable, DEBUG_BOARD_VOTER,
+ val.intval, 0);
+ }
}
int smblib_rerun_apsd_if_required(struct smb_charger *chg)
diff --git a/drivers/power/supply/qcom/smb5-lib.h b/drivers/power/supply/qcom/smb5-lib.h
index d7b9a17..335764e 100644
--- a/drivers/power/supply/qcom/smb5-lib.h
+++ b/drivers/power/supply/qcom/smb5-lib.h
@@ -70,6 +70,8 @@
#define BOOST_BACK_STORM_COUNT 3
#define WEAK_CHG_STORM_COUNT 8
+#define VBAT_TO_VRAW_ADC(v) div_u64((u64)v * 1000000UL, 194637UL)
+
enum smb_mode {
PARALLEL_MASTER = 0,
PARALLEL_SLAVE,
@@ -344,6 +346,7 @@
bool use_extcon;
bool otg_present;
int hw_max_icl_ua;
+ int auto_recharge_soc;
/* workaround flag */
u32 wa_flags;
@@ -372,6 +375,8 @@
int smblib_read(struct smb_charger *chg, u16 addr, u8 *val);
int smblib_masked_write(struct smb_charger *chg, u16 addr, u8 mask, u8 val);
int smblib_write(struct smb_charger *chg, u16 addr, u8 val);
+int smblib_batch_write(struct smb_charger *chg, u16 addr, u8 *val, int count);
+int smblib_batch_read(struct smb_charger *chg, u16 addr, u8 *val, int count);
int smblib_get_charge_param(struct smb_charger *chg,
struct smb_chg_param *param, int *val_u);
diff --git a/drivers/power/supply/qcom/smb5-reg.h b/drivers/power/supply/qcom/smb5-reg.h
index 9a418c8..afc45ab 100644
--- a/drivers/power/supply/qcom/smb5-reg.h
+++ b/drivers/power/supply/qcom/smb5-reg.h
@@ -66,11 +66,17 @@
#define CHARGING_ENABLE_CMD_BIT BIT(0)
#define CHGR_CFG2_REG (CHGR_BASE + 0x51)
-#define SOC_BASED_RECHG_BIT BIT(1)
+#define RECHG_MASK GENMASK(2, 1)
+#define VBAT_BASED_RECHG_BIT BIT(2)
+#define SOC_BASED_RECHG_BIT GENMASK(2, 1)
#define CHARGER_INHIBIT_BIT BIT(0)
#define CHGR_FAST_CHARGE_CURRENT_CFG_REG (CHGR_BASE + 0x61)
+#define CHGR_NO_SAMPLE_TERM_RCHG_CFG_REG (CHGR_BASE + 0x6B)
+#define NO_OF_SAMPLE_FOR_RCHG_SHIFT 2
+#define NO_OF_SAMPLE_FOR_RCHG GENMASK(3, 2)
+
#define CHGR_FLOAT_VOLTAGE_CFG_REG (CHGR_BASE + 0x70)
#define CHARGE_INHIBIT_THRESHOLD_CFG_REG (CHGR_BASE + 0x72)
@@ -80,6 +86,12 @@
#define INHIBIT_ANALOG_VFLT_MINUS_200MV 2
#define INHIBIT_ANALOG_VFLT_MINUS_300MV 3
+#define CHARGE_RCHG_SOC_THRESHOLD_CFG_REG (CHGR_BASE + 0x7D)
+
+#define CHGR_ADC_RECHARGE_THRESHOLD_MSB_REG (CHGR_BASE + 0x7E)
+
+#define CHGR_ADC_RECHARGE_THRESHOLD_LSB_REG (CHGR_BASE + 0x7F)
+
#define JEITA_EN_CFG_REG (CHGR_BASE + 0x90)
#define JEITA_EN_HOT_SL_FCV_BIT BIT(3)
#define JEITA_EN_COLD_SL_FCV_BIT BIT(2)
diff --git a/drivers/pwm/pwm-qti-lpg.c b/drivers/pwm/pwm-qti-lpg.c
index 328f4b6..85a5ea0 100644
--- a/drivers/pwm/pwm-qti-lpg.c
+++ b/drivers/pwm/pwm-qti-lpg.c
@@ -28,6 +28,7 @@
#define REG_SIZE_PER_LPG 0x100
+#define REG_LPG_PERPH_SUBTYPE 0x05
#define REG_LPG_PWM_SIZE_CLK 0x41
#define REG_LPG_PWM_FREQ_PREDIV_CLK 0x42
#define REG_LPG_PWM_TYPE_CONFIG 0x43
@@ -36,9 +37,15 @@
#define REG_LPG_ENABLE_CONTROL 0x46
#define REG_LPG_PWM_SYNC 0x47
+/* REG_LPG_PERPH_SUBTYPE */
+#define SUBTYPE_PWM 0x0b
+#define SUBTYPE_LPG_LITE 0x11
+
/* REG_LPG_PWM_SIZE_CLK */
-#define LPG_PWM_SIZE_MASK BIT(4)
-#define LPG_PWM_SIZE_SHIFT 4
+#define LPG_PWM_SIZE_MASK_LPG BIT(4)
+#define LPG_PWM_SIZE_MASK_PWM BIT(2)
+#define LPG_PWM_SIZE_SHIFT_LPG 4
+#define LPG_PWM_SIZE_SHIFT_PWM 2
#define LPG_PWM_CLK_FREQ_SEL_MASK GENMASK(1, 0)
/* REG_LPG_PWM_FREQ_PREDIV_CLK */
@@ -95,6 +102,7 @@
u32 lpg_idx;
u32 reg_base;
u8 src_sel;
+ u8 subtype;
int current_period_ns;
int current_duty_ns;
};
@@ -108,6 +116,23 @@
u32 num_lpgs;
};
+static int qpnp_lpg_read(struct qpnp_lpg_channel *lpg, u16 addr, u8 *val)
+{
+ int rc;
+ unsigned int tmp;
+
+ mutex_lock(&lpg->chip->bus_lock);
+ rc = regmap_read(lpg->chip->regmap, lpg->reg_base + addr, &tmp);
+ if (rc < 0)
+ dev_err(lpg->chip->dev, "Read addr 0x%x failed, rc=%d\n",
+ lpg->reg_base + addr, rc);
+ else
+ *val = (u8)tmp;
+ mutex_unlock(&lpg->chip->bus_lock);
+
+ return rc;
+}
+
static int qpnp_lpg_write(struct qpnp_lpg_channel *lpg, u16 addr, u8 val)
{
int rc;
@@ -166,10 +191,24 @@
return -EINVAL;
}
+static int qpnp_lpg_set_glitch_removal(struct qpnp_lpg_channel *lpg, bool en)
+{
+ int rc;
+ u8 mask, val;
+
+ val = en ? LPG_PWM_EN_GLITCH_REMOVAL_MASK : 0;
+ mask = LPG_PWM_EN_GLITCH_REMOVAL_MASK;
+ rc = qpnp_lpg_masked_write(lpg, REG_LPG_PWM_TYPE_CONFIG, mask, val);
+ if (rc < 0)
+ dev_err(lpg->chip->dev, "Write LPG_PWM_TYPE_CONFIG failed, rc=%d\n",
+ rc);
+ return rc;
+}
+
static int qpnp_lpg_set_pwm_config(struct qpnp_lpg_channel *lpg)
{
int rc;
- u8 val, mask;
+ u8 val, mask, shift;
int pwm_size_idx, pwm_clk_idx, prediv_idx, clk_exp_idx;
pwm_size_idx = __find_index_in_array(lpg->pwm_config.pwm_size,
@@ -187,8 +226,16 @@
/* pwm_clk_idx is 1 bit lower than the register value */
pwm_clk_idx += 1;
- val = pwm_size_idx << LPG_PWM_SIZE_SHIFT | pwm_clk_idx;
- mask = LPG_PWM_SIZE_MASK | LPG_PWM_CLK_FREQ_SEL_MASK;
+ if (lpg->subtype == SUBTYPE_PWM) {
+ shift = LPG_PWM_SIZE_SHIFT_PWM;
+ mask = LPG_PWM_SIZE_MASK_PWM;
+ } else {
+ shift = LPG_PWM_SIZE_SHIFT_LPG;
+ mask = LPG_PWM_SIZE_MASK_LPG;
+ }
+
+ val = pwm_size_idx << shift | pwm_clk_idx;
+ mask |= LPG_PWM_CLK_FREQ_SEL_MASK;
rc = qpnp_lpg_masked_write(lpg, REG_LPG_PWM_SIZE_CLK, mask, val);
if (rc < 0) {
dev_err(lpg->chip->dev, "Write LPG_PWM_SIZE_CLK failed, rc=%d\n",
@@ -377,6 +424,13 @@
return -ENODEV;
}
+ rc = qpnp_lpg_set_glitch_removal(lpg, true);
+ if (rc < 0) {
+ dev_err(lpg->chip->dev, "Enable glitch-removal failed, rc=%d\n",
+ rc);
+ return rc;
+ }
+
mask = LPG_PWM_SRC_SELECT_MASK | LPG_EN_LPG_OUT_BIT;
val = lpg->src_sel << LPG_PWM_SRC_SELECT_SHIFT | LPG_EN_LPG_OUT_BIT;
@@ -405,9 +459,16 @@
val = lpg->src_sel << LPG_PWM_SRC_SELECT_SHIFT;
rc = qpnp_lpg_masked_write(lpg, REG_LPG_ENABLE_CONTROL, mask, val);
- if (rc < 0)
+ if (rc < 0) {
dev_err(pwm_chip->dev, "Disable PWM output failed for channel %d, rc=%d\n",
lpg->lpg_idx, rc);
+ return;
+ }
+
+ rc = qpnp_lpg_set_glitch_removal(lpg, false);
+ if (rc < 0)
+ dev_err(lpg->chip->dev, "Disable glitch-removal failed, rc=%d\n",
+ rc);
}
#ifdef CONFIG_DEBUG_FS
@@ -490,6 +551,12 @@
chip->lpgs[i].lpg_idx = i;
chip->lpgs[i].reg_base = base + i * REG_SIZE_PER_LPG;
chip->lpgs[i].src_sel = PWM_OUTPUT;
+ rc = qpnp_lpg_read(&chip->lpgs[i], REG_LPG_PERPH_SUBTYPE,
+ &chip->lpgs[i].subtype);
+ if (rc < 0) {
+ dev_err(chip->dev, "Read subtype failed, rc=%d\n", rc);
+ return rc;
+ }
}
return rc;
@@ -511,16 +578,15 @@
return -EINVAL;
}
+ mutex_init(&chip->bus_lock);
rc = qpnp_lpg_parse_dt(chip);
if (rc < 0) {
dev_err(chip->dev, "Devicetree properties parsing failed, rc=%d\n",
rc);
- return rc;
+ goto destroy;
}
dev_set_drvdata(chip->dev, chip);
-
- mutex_init(&chip->bus_lock);
chip->pwm_chip.dev = chip->dev;
chip->pwm_chip.base = -1;
chip->pwm_chip.npwm = chip->num_lpgs;
@@ -529,9 +595,12 @@
rc = pwmchip_add(&chip->pwm_chip);
if (rc < 0) {
dev_err(chip->dev, "Add pwmchip failed, rc=%d\n", rc);
- mutex_destroy(&chip->bus_lock);
+ goto destroy;
}
+ return 0;
+destroy:
+ mutex_destroy(&chip->bus_lock);
return rc;
}
diff --git a/drivers/soc/qcom/msm_bus/Makefile b/drivers/soc/qcom/msm_bus/Makefile
index 15569b1..c2ef70c 100644
--- a/drivers/soc/qcom/msm_bus/Makefile
+++ b/drivers/soc/qcom/msm_bus/Makefile
@@ -7,7 +7,7 @@
ifdef CONFIG_QCOM_BUS_CONFIG_RPMH
obj-y += msm_bus_fabric_rpmh.o msm_bus_arb_rpmh.o msm_bus_rules.o \
- msm_bus_bimc_rpmh.o msm_bus_noc_rpmh.o
+ msm_bus_bimc_rpmh.o msm_bus_noc_rpmh.o msm_bus_proxy_client.o
obj-$(CONFIG_OF) += msm_bus_of_rpmh.o
else
obj-y += msm_bus_fabric_adhoc.o msm_bus_arb_adhoc.o msm_bus_rules.o \
diff --git a/drivers/soc/qcom/msm_bus/msm_bus_arb_rpmh.c b/drivers/soc/qcom/msm_bus/msm_bus_arb_rpmh.c
index 437984c..8af9b5a 100644
--- a/drivers/soc/qcom/msm_bus/msm_bus_arb_rpmh.c
+++ b/drivers/soc/qcom/msm_bus/msm_bus_arb_rpmh.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2014-2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -1133,7 +1133,7 @@
}
curr = client->curr;
- if (curr >= pdata->num_usecases) {
+ if (curr >= pdata->num_usecases || curr < 0) {
MSM_BUS_ERR("Invalid index Defaulting curr to 0");
curr = 0;
}
diff --git a/drivers/soc/qcom/msm_bus/msm_bus_proxy_client.c b/drivers/soc/qcom/msm_bus/msm_bus_proxy_client.c
new file mode 100644
index 0000000..cdf61f6
--- /dev/null
+++ b/drivers/soc/qcom/msm_bus/msm_bus_proxy_client.c
@@ -0,0 +1,93 @@
+/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/msm-bus.h>
+
+struct proxy_client {
+ struct msm_bus_scale_pdata *pdata;
+ unsigned int client_handle;
+};
+
+static struct proxy_client proxy_client_info;
+
+static int msm_bus_device_proxy_client_probe(struct platform_device *pdev)
+{
+ int ret;
+
+ proxy_client_info.pdata = msm_bus_cl_get_pdata(pdev);
+
+ if (!proxy_client_info.pdata)
+ return 0;
+
+ proxy_client_info.client_handle =
+ msm_bus_scale_register_client(proxy_client_info.pdata);
+
+ if (!proxy_client_info.client_handle) {
+ dev_err(&pdev->dev, "Unable to register bus client\n");
+ return -ENODEV;
+ }
+
+ ret = msm_bus_scale_client_update_request(
+ proxy_client_info.client_handle, 1);
+ if (ret)
+ dev_err(&pdev->dev, "Bandwidth update failed (%d)\n", ret);
+
+ return ret;
+}
+
+static const struct of_device_id proxy_client_match[] = {
+ {.compatible = "qcom,bus-proxy-client"},
+ {}
+};
+
+static struct platform_driver msm_bus_proxy_client_driver = {
+ .probe = msm_bus_device_proxy_client_probe,
+ .driver = {
+ .name = "msm_bus_proxy_client_device",
+ .owner = THIS_MODULE,
+ .of_match_table = proxy_client_match,
+ },
+};
+
+static int __init msm_bus_proxy_client_init_driver(void)
+{
+ int rc;
+
+ rc = platform_driver_register(&msm_bus_proxy_client_driver);
+ if (rc) {
+ pr_err("Failed to register proxy client device driver");
+ return rc;
+ }
+
+ return rc;
+}
+
+static int __init msm_bus_proxy_client_unvote(void)
+{
+ int ret;
+
+ if (!proxy_client_info.pdata || !proxy_client_info.client_handle)
+ return 0;
+
+ ret = msm_bus_scale_client_update_request(
+ proxy_client_info.client_handle, 0);
+ if (ret)
+ pr_err("%s: bandwidth update request failed (%d)\n",
+ __func__, ret);
+
+ msm_bus_scale_unregister_client(proxy_client_info.client_handle);
+
+ return 0;
+}
+
+subsys_initcall_sync(msm_bus_proxy_client_init_driver);
+late_initcall_sync(msm_bus_proxy_client_unvote);
diff --git a/drivers/soc/qcom/rpm-smd.c b/drivers/soc/qcom/rpm-smd.c
index 3fc7fbf..c29cfcb 100644
--- a/drivers/soc/qcom/rpm-smd.c
+++ b/drivers/soc/qcom/rpm-smd.c
@@ -31,7 +31,6 @@
#include <linux/device.h>
#include <linux/notifier.h>
#include <linux/slab.h>
-#include <linux/workqueue.h>
#include <linux/platform_device.h>
#include <linux/of.h>
#include <linux/of_platform.h>
@@ -126,8 +125,6 @@
return atomic_notifier_chain_unregister(&msm_rpm_sleep_notifier, nb);
}
-static struct workqueue_struct *msm_rpm_smd_wq;
-
enum {
MSM_RPM_MSG_REQUEST_TYPE = 0,
MSM_RPM_MSG_TYPE_NR,
@@ -2120,15 +2117,6 @@
smd_disable_read_intr(msm_rpm_data.ch_info);
- msm_rpm_smd_wq = alloc_workqueue("rpm-smd",
- WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_HIGHPRI, 1);
- if (!msm_rpm_smd_wq) {
- pr_err("%s: Unable to alloc rpm-smd workqueue\n", __func__);
- ret = -EINVAL;
- goto fail;
- }
- queue_work(msm_rpm_smd_wq, &msm_rpm_data.work);
-
probe_status = ret;
skip_init:
of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
diff --git a/drivers/soc/qcom/rq_stats.c b/drivers/soc/qcom/rq_stats.c
index 5850c46..1b4cf4f 100644
--- a/drivers/soc/qcom/rq_stats.c
+++ b/drivers/soc/qcom/rq_stats.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2015, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2010-2015, 2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -264,7 +264,7 @@
static ssize_t show_def_timer_ms(struct kobject *kobj,
struct kobj_attribute *attr, char *buf)
{
- int64_t diff;
+ uint64_t diff;
unsigned int udiff;
diff = ktime_to_ns(ktime_get()) - rq_info.def_start_time;
diff --git a/drivers/soc/qcom/watchdog_v2.c b/drivers/soc/qcom/watchdog_v2.c
index 8040d6d..5630dc0 100644
--- a/drivers/soc/qcom/watchdog_v2.c
+++ b/drivers/soc/qcom/watchdog_v2.c
@@ -701,7 +701,7 @@
wdog_dd->user_pet_complete = true;
wdog_dd->user_pet_enabled = false;
wake_up_process(wdog_dd->watchdog_task);
- init_timer_deferrable(&wdog_dd->pet_timer);
+ init_timer(&wdog_dd->pet_timer);
wdog_dd->pet_timer.data = (unsigned long)wdog_dd;
wdog_dd->pet_timer.function = pet_task_wakeup;
wdog_dd->pet_timer.expires = jiffies + delay_time;
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index e0321a1..edf855c 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -256,9 +256,9 @@
dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
- dwc3_notify_event(dwc, DWC3_CONTROLLER_RESET_EVENT);
+ dwc3_notify_event(dwc, DWC3_CONTROLLER_RESET_EVENT, 0);
- dwc3_notify_event(dwc, DWC3_CONTROLLER_POST_RESET_EVENT);
+ dwc3_notify_event(dwc, DWC3_CONTROLLER_POST_RESET_EVENT, 0);
return 0;
}
@@ -366,7 +366,7 @@
dwc3_free_one_event_buffer(dwc, evt);
/* free GSI related event buffers */
- dwc3_notify_event(dwc, DWC3_GSI_EVT_BUF_FREE);
+ dwc3_notify_event(dwc, DWC3_GSI_EVT_BUF_FREE, 0);
}
/**
@@ -389,7 +389,7 @@
dwc->ev_buf = evt;
/* alloc GSI related event buffers */
- dwc3_notify_event(dwc, DWC3_GSI_EVT_BUF_ALLOC);
+ dwc3_notify_event(dwc, DWC3_GSI_EVT_BUF_ALLOC, 0);
return 0;
}
@@ -420,7 +420,7 @@
dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(0), 0);
/* setup GSI related event buffers */
- dwc3_notify_event(dwc, DWC3_GSI_EVT_BUF_SETUP);
+ dwc3_notify_event(dwc, DWC3_GSI_EVT_BUF_SETUP, 0);
return 0;
}
@@ -442,7 +442,7 @@
dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(0), 0);
/* cleanup GSI related event buffers */
- dwc3_notify_event(dwc, DWC3_GSI_EVT_BUF_CLEANUP);
+ dwc3_notify_event(dwc, DWC3_GSI_EVT_BUF_CLEANUP, 0);
}
static int dwc3_alloc_scratch_buffers(struct dwc3 *dwc)
@@ -1026,19 +1026,20 @@
dwc3_gadget_restart(dwc);
}
-static void (*notify_event)(struct dwc3 *, unsigned int);
-void dwc3_set_notifier(void (*notify)(struct dwc3 *, unsigned int))
+static void (*notify_event)(struct dwc3 *, unsigned int, unsigned int);
+void dwc3_set_notifier(void (*notify)(struct dwc3 *, unsigned int,
+ unsigned int))
{
notify_event = notify;
}
EXPORT_SYMBOL(dwc3_set_notifier);
-int dwc3_notify_event(struct dwc3 *dwc, unsigned int event)
+int dwc3_notify_event(struct dwc3 *dwc, unsigned int event, unsigned int value)
{
int ret = 0;
if (dwc->notify_event)
- dwc->notify_event(dwc, event);
+ dwc->notify_event(dwc, event, value);
else
ret = -ENODEV;
@@ -1459,7 +1460,7 @@
int ret;
/* Check if platform glue driver handling PM, if not then handle here */
- if (!dwc3_notify_event(dwc, DWC3_CORE_PM_RESUME_EVENT))
+ if (!dwc3_notify_event(dwc, DWC3_CORE_PM_RESUME_EVENT, 0))
return 0;
ret = dwc3_suspend_common(dwc);
@@ -1477,7 +1478,7 @@
int ret;
/* Check if platform glue driver handling PM, if not then handle here */
- if (!dwc3_notify_event(dwc, DWC3_CORE_PM_RESUME_EVENT))
+ if (!dwc3_notify_event(dwc, DWC3_CORE_PM_RESUME_EVENT, 0))
return 0;
device_init_wakeup(dev, false);
@@ -1533,7 +1534,7 @@
int ret;
/* Check if platform glue driver handling PM, if not then handle here */
- if (!dwc3_notify_event(dwc, DWC3_CORE_PM_SUSPEND_EVENT))
+ if (!dwc3_notify_event(dwc, DWC3_CORE_PM_SUSPEND_EVENT, 0))
return 0;
ret = dwc3_suspend_common(dwc);
@@ -1551,7 +1552,7 @@
int ret;
/* Check if platform glue driver handling PM, if not then handle here */
- if (!dwc3_notify_event(dwc, DWC3_CORE_PM_RESUME_EVENT))
+ if (!dwc3_notify_event(dwc, DWC3_CORE_PM_RESUME_EVENT, 0))
return 0;
pinctrl_pm_select_default_state(dev);
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index b91642a..69d3fa8 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -821,21 +821,22 @@
__le64 dma_adr[DWC3_MAX_HIBER_SCRATCHBUFS];
};
-#define DWC3_CONTROLLER_ERROR_EVENT 0
-#define DWC3_CONTROLLER_RESET_EVENT 1
-#define DWC3_CONTROLLER_POST_RESET_EVENT 2
-#define DWC3_CORE_PM_SUSPEND_EVENT 3
-#define DWC3_CORE_PM_RESUME_EVENT 4
-#define DWC3_CONTROLLER_CONNDONE_EVENT 5
-#define DWC3_CONTROLLER_NOTIFY_OTG_EVENT 6
-#define DWC3_CONTROLLER_SET_CURRENT_DRAW_EVENT 7
-#define DWC3_CONTROLLER_RESTART_USB_SESSION 8
+#define DWC3_CONTROLLER_ERROR_EVENT 0
+#define DWC3_CONTROLLER_RESET_EVENT 1
+#define DWC3_CONTROLLER_POST_RESET_EVENT 2
+#define DWC3_CORE_PM_SUSPEND_EVENT 3
+#define DWC3_CORE_PM_RESUME_EVENT 4
+#define DWC3_CONTROLLER_CONNDONE_EVENT 5
+#define DWC3_CONTROLLER_NOTIFY_OTG_EVENT 6
+#define DWC3_CONTROLLER_SET_CURRENT_DRAW_EVENT 7
+#define DWC3_CONTROLLER_RESTART_USB_SESSION 8
+#define DWC3_CONTROLLER_NOTIFY_DISABLE_UPDXFER 9
/* USB GSI event buffer related notification */
-#define DWC3_GSI_EVT_BUF_ALLOC 9
-#define DWC3_GSI_EVT_BUF_SETUP 10
-#define DWC3_GSI_EVT_BUF_CLEANUP 11
-#define DWC3_GSI_EVT_BUF_FREE 12
+#define DWC3_GSI_EVT_BUF_ALLOC 10
+#define DWC3_GSI_EVT_BUF_SETUP 11
+#define DWC3_GSI_EVT_BUF_CLEANUP 12
+#define DWC3_GSI_EVT_BUF_FREE 13
#define MAX_INTR_STATS 10
@@ -1081,7 +1082,7 @@
const char *hsphy_interface;
unsigned connected:1;
- void (*notify_event)(struct dwc3 *, unsigned int);
+ void (*notify_event)(struct dwc3 *, unsigned int, unsigned int);
struct work_struct wakeup_work;
unsigned delayed_status:1;
@@ -1416,6 +1417,9 @@
void dwc3_usb3_phy_suspend(struct dwc3 *dwc, int suspend);
extern void dwc3_set_notifier(
- void (*notify)(struct dwc3 *dwc3, unsigned int event));
-extern int dwc3_notify_event(struct dwc3 *dwc3, unsigned int event);
+ void (*notify)(struct dwc3 *dwc3, unsigned int event,
+ unsigned int value));
+extern int dwc3_notify_event(struct dwc3 *dwc3, unsigned int event,
+ unsigned int value);
+
#endif /* __DRIVERS_USB_DWC3_CORE_H */
diff --git a/drivers/usb/dwc3/dbm.c b/drivers/usb/dwc3/dbm.c
index 44c082a..48b3894 100644
--- a/drivers/usb/dwc3/dbm.c
+++ b/drivers/usb/dwc3/dbm.c
@@ -37,6 +37,7 @@
DBM_HW_TRB2_EP,
DBM_HW_TRB3_EP,
DBM_PIPE_CFG,
+ DBM_DISABLE_UPDXFER,
DBM_SOFT_RESET,
DBM_GEN_CFG,
DBM_GEVNTADR_LSB,
@@ -103,6 +104,7 @@
[DBM_HW_TRB2_EP] = { 0x0240, 0x4 },
[DBM_HW_TRB3_EP] = { 0x0250, 0x4 },
[DBM_PIPE_CFG] = { 0x0274, 0x0 },
+ [DBM_DISABLE_UPDXFER] = { 0x0298, 0x0 },
[DBM_SOFT_RESET] = { 0x020C, 0x0 },
[DBM_GEN_CFG] = { 0x0210, 0x0 },
[DBM_GEVNTADR_LSB] = { 0x0260, 0x0 },
@@ -192,7 +194,7 @@
if (dbm->ep_num_mapping[i] == usb_ep)
return i;
- pr_err("%s: No DBM EP matches USB EP %d", __func__, usb_ep);
+ pr_debug("%s: No DBM EP matches USB EP %d", __func__, usb_ep);
return -ENODEV; /* Not found */
}
@@ -291,6 +293,7 @@
{
int dbm_ep;
u32 ep_cfg;
+ u32 data;
if (!dbm) {
pr_err("%s: dbm pointer is NULL!\n", __func__);
@@ -312,9 +315,6 @@
return -ENODEV;
}
- /* First, reset the dbm endpoint */
- ep_soft_reset(dbm, dbm_ep, 0);
-
/* Set ioc bit for dbm_ep if needed */
msm_dbm_write_reg_field(dbm, DBM_DBG_CNFG,
DBM_ENABLE_IOC_MASK & 1 << dbm_ep, ioc ? 1 : 0);
@@ -337,6 +337,10 @@
msm_dbm_write_ep_reg_field(dbm, DBM_EP_CFG, dbm_ep, DBM_EN_EP, 1);
+ data = msm_dbm_read_reg(dbm, DBM_DISABLE_UPDXFER);
+ data &= ~(0x1 << dbm_ep);
+ msm_dbm_write_reg(dbm, DBM_DISABLE_UPDXFER, data);
+
return dbm_ep;
}
@@ -381,7 +385,7 @@
dbm_ep = find_matching_dbm_ep(dbm, usb_ep);
if (dbm_ep < 0) {
- pr_err("usb ep index %d has no corresponding dbm ep\n", usb_ep);
+ pr_debug("usb ep index %d has no corespondng dbm ep\n", usb_ep);
return -ENODEV;
}
@@ -391,23 +395,10 @@
data &= (~0x1);
msm_dbm_write_ep_reg(dbm, DBM_EP_CFG, dbm_ep, data);
- /* Reset the dbm endpoint */
- ep_soft_reset(dbm, dbm_ep, true);
/*
- * The necessary delay between asserting and deasserting the dbm ep
- * reset is based on the number of active endpoints. If there is more
- * than one endpoint, a 1 msec delay is required. Otherwise, a shorter
- * delay will suffice.
- *
- * As this function can be called in atomic context, sleeping variants
- * for delay are not possible - albeit a 1ms delay.
+ * ep_soft_reset is not required during disconnect as pipe reset on
+ * next connect will take care of the same.
*/
- if (dbm_get_num_of_eps_configured(dbm) > 1)
- udelay(1000);
- else
- udelay(10);
- ep_soft_reset(dbm, dbm_ep, false);
-
return 0;
}
@@ -449,6 +440,35 @@
return 0;
}
+/**
+ * Disable update xfer before queueing stop xfer command to USB3 core.
+ *
+ * @usb_ep - USB physical EP number.
+ *
+ */
+int dwc3_dbm_disable_update_xfer(struct dbm *dbm, u8 usb_ep)
+{
+ u32 data;
+ int dbm_ep;
+
+ if (!dbm) {
+ pr_err("%s: dbm pointer is NULL!\n", __func__);
+ return -EPERM;
+ }
+
+ dbm_ep = find_matching_dbm_ep(dbm, usb_ep);
+
+ if (dbm_ep < 0) {
+ pr_err("usb ep index %d has no corresponding dbm ep\n", usb_ep);
+ return -ENODEV;
+ }
+
+ data = msm_dbm_read_reg(dbm, DBM_DISABLE_UPDXFER);
+ data |= (0x1 << dbm_ep);
+ msm_dbm_write_reg(dbm, DBM_DISABLE_UPDXFER, data);
+
+ return 0;
+}
int dbm_data_fifo_config(struct dbm *dbm, u8 dep_num, unsigned long addr,
u32 size, u8 dst_pipe_idx)
diff --git a/drivers/usb/dwc3/dbm.h b/drivers/usb/dwc3/dbm.h
index d8e1ce9..259900d 100644
--- a/drivers/usb/dwc3/dbm.h
+++ b/drivers/usb/dwc3/dbm.h
@@ -65,6 +65,7 @@
int size);
int dbm_data_fifo_config(struct dbm *dbm, u8 dep_num, unsigned long addr,
u32 size, u8 dst_pipe_idx);
+int dwc3_dbm_disable_update_xfer(struct dbm *dbm, u8 usb_ep);
void dbm_set_speed(struct dbm *dbm, bool speed);
void dbm_enable(struct dbm *dbm);
int dbm_ep_soft_reset(struct dbm *dbm, u8 usb_ep, bool enter_reset);
diff --git a/drivers/usb/dwc3/dwc3-msm.c b/drivers/usb/dwc3/dwc3-msm.c
index a91dceb0..ded62f1 100644
--- a/drivers/usb/dwc3/dwc3-msm.c
+++ b/drivers/usb/dwc3/dwc3-msm.c
@@ -289,7 +289,8 @@
static void dwc3_pwr_event_handler(struct dwc3_msm *mdwc);
static int dwc3_msm_gadget_vbus_draw(struct dwc3_msm *mdwc, unsigned int mA);
-static void dwc3_msm_notify_event(struct dwc3 *dwc, unsigned int event);
+static void dwc3_msm_notify_event(struct dwc3 *dwc, unsigned int event,
+ unsigned int value);
static int dwc3_restart_usb_host_mode(struct notifier_block *nb,
unsigned long event, void *ptr);
@@ -441,6 +442,16 @@
return dwc3_msm_is_dev_superspeed(mdwc);
}
+static int dwc3_msm_dbm_disable_updxfer(struct dwc3 *dwc, u8 usb_ep)
+{
+ struct dwc3_msm *mdwc = dev_get_drvdata(dwc->dev->parent);
+
+ dev_dbg(mdwc->dev, "%s\n", __func__);
+ dwc3_dbm_disable_update_xfer(mdwc->dbm, usb_ep);
+
+ return 0;
+}
+
#if IS_ENABLED(CONFIG_USB_DWC3_GADGET) || IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE)
/**
* Configure the DBM with the BAM's data fifo.
@@ -697,67 +708,8 @@
struct dwc3_msm_req_complete *req_complete;
unsigned long flags;
int ret = 0, size;
- u8 bam_pipe;
- bool producer;
- bool disable_wb;
- bool internal_mem;
- bool ioc;
bool superspeed;
- if (!(request->udc_priv & MSM_SPS_MODE)) {
- /* Not SPS mode, call original queue */
- dev_vdbg(mdwc->dev, "%s: not sps mode, use regular queue\n",
- __func__);
-
- return (mdwc->original_ep_ops[dep->number])->queue(ep,
- request,
- gfp_flags);
- }
-
- /* HW restriction regarding TRB size (8KB) */
- if (req->request.length < 0x2000) {
- dev_err(mdwc->dev, "%s: Min TRB size is 8KB\n", __func__);
- return -EINVAL;
- }
-
- /*
- * Override req->complete function, but before doing that,
- * store it's original pointer in the req_complete_list.
- */
- req_complete = kzalloc(sizeof(*req_complete), gfp_flags);
- if (!req_complete)
- return -ENOMEM;
-
- req_complete->req = request;
- req_complete->orig_complete = request->complete;
- list_add_tail(&req_complete->list_item, &mdwc->req_complete_list);
- request->complete = dwc3_msm_req_complete_func;
-
- /*
- * Configure the DBM endpoint
- */
- bam_pipe = request->udc_priv & MSM_PIPE_ID_MASK;
- producer = ((request->udc_priv & MSM_PRODUCER) ? true : false);
- disable_wb = ((request->udc_priv & MSM_DISABLE_WB) ? true : false);
- internal_mem = ((request->udc_priv & MSM_INTERNAL_MEM) ? true : false);
- ioc = ((request->udc_priv & MSM_ETD_IOC) ? true : false);
-
- ret = dbm_ep_config(mdwc->dbm, dep->number, bam_pipe, producer,
- disable_wb, internal_mem, ioc);
- if (ret < 0) {
- dev_err(mdwc->dev,
- "error %d after calling dbm_ep_config\n", ret);
- return ret;
- }
-
- dev_vdbg(dwc->dev, "%s: queing request %p to ep %s length %d\n",
- __func__, request, ep->name, request->length);
- size = dwc3_msm_read_reg(mdwc->base, DWC3_GEVNTSIZ(0));
- dbm_event_buffer_config(mdwc->dbm,
- dwc3_msm_read_reg(mdwc->base, DWC3_GEVNTADRLO(0)),
- dwc3_msm_read_reg(mdwc->base, DWC3_GEVNTADRHI(0)),
- DWC3_GEVNTSIZ_SIZE(size));
-
/*
* We must obtain the lock of the dwc3 core driver,
* including disabling interrupts, so we will be sure
@@ -770,31 +722,83 @@
dev_err(mdwc->dev,
"%s: trying to queue request %p to disabled ep %s\n",
__func__, request, ep->name);
- ret = -EPERM;
- goto err;
+ spin_unlock_irqrestore(&dwc->lock, flags);
+ return -EPERM;
+ }
+
+ if (!mdwc->original_ep_ops[dep->number]) {
+ dev_err(mdwc->dev,
+ "ep [%s,%d] was unconfigured as msm endpoint\n",
+ ep->name, dep->number);
+ spin_unlock_irqrestore(&dwc->lock, flags);
+ return -EINVAL;
+ }
+
+ if (!request) {
+ dev_err(mdwc->dev, "%s: request is NULL\n", __func__);
+ spin_unlock_irqrestore(&dwc->lock, flags);
+ return -EINVAL;
+ }
+
+ if (!(request->udc_priv & MSM_SPS_MODE)) {
+ dev_err(mdwc->dev, "%s: sps mode is not set\n",
+ __func__);
+
+ spin_unlock_irqrestore(&dwc->lock, flags);
+ return -EINVAL;
+ }
+
+ /* HW restriction regarding TRB size (8KB) */
+ if (req->request.length < 0x2000) {
+ dev_err(mdwc->dev, "%s: Min TRB size is 8KB\n", __func__);
+ spin_unlock_irqrestore(&dwc->lock, flags);
+ return -EINVAL;
}
if (dep->number == 0 || dep->number == 1) {
dev_err(mdwc->dev,
"%s: trying to queue dbm request %p to control ep %s\n",
__func__, request, ep->name);
- ret = -EPERM;
- goto err;
+ spin_unlock_irqrestore(&dwc->lock, flags);
+ return -EPERM;
}
-
- if (dep->trb_dequeue != dep->trb_enqueue ||
- !list_empty(&dep->pending_list)
- || !list_empty(&dep->started_list)) {
+ if (dep->trb_dequeue != dep->trb_enqueue
+ || !list_empty(&dep->pending_list)
+ || !list_empty(&dep->started_list)) {
dev_err(mdwc->dev,
"%s: trying to queue dbm request %p tp ep %s\n",
__func__, request, ep->name);
- ret = -EPERM;
- goto err;
- } else {
- dep->trb_dequeue = 0;
- dep->trb_enqueue = 0;
+ spin_unlock_irqrestore(&dwc->lock, flags);
+ return -EPERM;
}
+ dep->trb_dequeue = 0;
+ dep->trb_enqueue = 0;
+
+ /*
+ * Override req->complete function, but before doing that,
+ * store it's original pointer in the req_complete_list.
+ */
+ req_complete = kzalloc(sizeof(*req_complete), gfp_flags);
+
+ if (!req_complete) {
+ dev_err(mdwc->dev, "%s: not enough memory\n", __func__);
+ spin_unlock_irqrestore(&dwc->lock, flags);
+ return -ENOMEM;
+ }
+
+ req_complete->req = request;
+ req_complete->orig_complete = request->complete;
+ list_add_tail(&req_complete->list_item, &mdwc->req_complete_list);
+ request->complete = dwc3_msm_req_complete_func;
+
+ dev_vdbg(dwc->dev, "%s: queing request %p to ep %s length %d\n",
+ __func__, request, ep->name, request->length);
+ size = dwc3_msm_read_reg(mdwc->base, DWC3_GEVNTSIZ(0));
+ dbm_event_buffer_config(mdwc->dbm,
+ dwc3_msm_read_reg(mdwc->base, DWC3_GEVNTADRLO(0)),
+ dwc3_msm_read_reg(mdwc->base, DWC3_GEVNTADRHI(0)),
+ DWC3_GEVNTSIZ_SIZE(size));
ret = __dwc3_msm_ep_queue(dep, req);
if (ret < 0) {
@@ -1471,37 +1475,68 @@
*
* @return int - 0 on success, negetive on error.
*/
-int msm_ep_config(struct usb_ep *ep)
+int msm_ep_config(struct usb_ep *ep, struct usb_request *request)
{
struct dwc3_ep *dep = to_dwc3_ep(ep);
struct dwc3 *dwc = dep->dwc;
struct dwc3_msm *mdwc = dev_get_drvdata(dwc->dev->parent);
struct usb_ep_ops *new_ep_ops;
+ int ret = 0;
+ u8 bam_pipe;
+ bool producer;
+ bool disable_wb;
+ bool internal_mem;
+ bool ioc;
+ unsigned long flags;
+ spin_lock_irqsave(&dwc->lock, flags);
/* Save original ep ops for future restore*/
if (mdwc->original_ep_ops[dep->number]) {
dev_err(mdwc->dev,
"ep [%s,%d] already configured as msm endpoint\n",
ep->name, dep->number);
+ spin_unlock_irqrestore(&dwc->lock, flags);
return -EPERM;
}
mdwc->original_ep_ops[dep->number] = ep->ops;
/* Set new usb ops as we like */
new_ep_ops = kzalloc(sizeof(struct usb_ep_ops), GFP_ATOMIC);
- if (!new_ep_ops)
+ if (!new_ep_ops) {
+ spin_unlock_irqrestore(&dwc->lock, flags);
return -ENOMEM;
+ }
(*new_ep_ops) = (*ep->ops);
new_ep_ops->queue = dwc3_msm_ep_queue;
new_ep_ops->gsi_ep_op = dwc3_msm_gsi_ep_op;
ep->ops = new_ep_ops;
+ if (!mdwc->dbm || !request || (dep->endpoint.ep_type == EP_TYPE_GSI)) {
+ spin_unlock_irqrestore(&dwc->lock, flags);
+ return 0;
+ }
+
/*
- * Do HERE more usb endpoint configurations
- * which are specific to MSM.
+ * Configure the DBM endpoint if required.
*/
+ bam_pipe = request->udc_priv & MSM_PIPE_ID_MASK;
+ producer = ((request->udc_priv & MSM_PRODUCER) ? true : false);
+ disable_wb = ((request->udc_priv & MSM_DISABLE_WB) ? true : false);
+ internal_mem = ((request->udc_priv & MSM_INTERNAL_MEM) ? true : false);
+ ioc = ((request->udc_priv & MSM_ETD_IOC) ? true : false);
+
+ ret = dbm_ep_config(mdwc->dbm, dep->number, bam_pipe, producer,
+ disable_wb, internal_mem, ioc);
+ if (ret < 0) {
+ dev_err(mdwc->dev,
+ "error %d after calling dbm_ep_config\n", ret);
+ spin_unlock_irqrestore(&dwc->lock, flags);
+ return ret;
+ }
+
+ spin_unlock_irqrestore(&dwc->lock, flags);
return 0;
}
@@ -1522,12 +1557,15 @@
struct dwc3 *dwc = dep->dwc;
struct dwc3_msm *mdwc = dev_get_drvdata(dwc->dev->parent);
struct usb_ep_ops *old_ep_ops;
+ unsigned long flags;
+ spin_lock_irqsave(&dwc->lock, flags);
/* Restore original ep ops */
if (!mdwc->original_ep_ops[dep->number]) {
dev_err(mdwc->dev,
"ep [%s,%d] was not configured as msm endpoint\n",
ep->name, dep->number);
+ spin_unlock_irqrestore(&dwc->lock, flags);
return -EINVAL;
}
old_ep_ops = (struct usb_ep_ops *)ep->ops;
@@ -1539,6 +1577,32 @@
* Do HERE more usb endpoint un-configurations
* which are specific to MSM.
*/
+ if (!mdwc->dbm || (dep->endpoint.ep_type == EP_TYPE_GSI)) {
+ spin_unlock_irqrestore(&dwc->lock, flags);
+ return 0;
+ }
+
+ if (dep->trb_dequeue == dep->trb_enqueue
+ && list_empty(&dep->pending_list)
+ && list_empty(&dep->started_list)) {
+ dev_dbg(mdwc->dev,
+ "%s: request is not queued, disable DBM ep for ep %s\n",
+ __func__, ep->name);
+ /* Unconfigure dbm ep */
+ dbm_ep_unconfig(mdwc->dbm, dep->number);
+
+ /*
+ * If this is the last endpoint we unconfigured, than reset also
+ * the event buffers; unless unconfiguring the ep due to lpm,
+ * in which case the event buffer only gets reset during the
+ * block reset.
+ */
+ if (dbm_get_num_of_eps_configured(mdwc->dbm) == 0 &&
+ !dbm_reset_ep_after_lpm(mdwc->dbm))
+ dbm_event_buffer_config(mdwc->dbm, 0, 0, 0);
+ }
+
+ spin_unlock_irqrestore(&dwc->lock, flags);
return 0;
}
@@ -1764,7 +1828,8 @@
dwc3_msm_gadget_vbus_draw(mdwc, dwc->vbus_draw);
}
-static void dwc3_msm_notify_event(struct dwc3 *dwc, unsigned int event)
+static void dwc3_msm_notify_event(struct dwc3 *dwc, unsigned int event,
+ unsigned int value)
{
struct dwc3_msm *mdwc = dev_get_drvdata(dwc->dev->parent);
struct dwc3_event_buffer *evt;
@@ -1951,6 +2016,9 @@
evt->buf, evt->dma);
}
break;
+ case DWC3_CONTROLLER_NOTIFY_DISABLE_UPDXFER:
+ dwc3_msm_dbm_disable_updxfer(dwc, value);
+ break;
default:
dev_dbg(mdwc->dev, "unknown dwc3 event\n");
break;
@@ -3819,6 +3887,9 @@
if (on) {
dev_dbg(mdwc->dev, "%s: turn on host\n", __func__);
+ pm_runtime_get_sync(mdwc->dev);
+ dbg_event(0xFF, "StrtHost gync",
+ atomic_read(&mdwc->dev->power.usage_count));
mdwc->hs_phy->flags |= PHY_HOST_MODE;
if (dwc->maximum_speed == USB_SPEED_SUPER) {
mdwc->ss_phy->flags |= PHY_HOST_MODE;
@@ -3827,9 +3898,6 @@
}
usb_phy_notify_connect(mdwc->hs_phy, USB_SPEED_HIGH);
- pm_runtime_get_sync(mdwc->dev);
- dbg_event(0xFF, "StrtHost gync",
- atomic_read(&mdwc->dev->power.usage_count));
if (!IS_ERR_OR_NULL(mdwc->vbus_reg))
ret = regulator_enable(mdwc->vbus_reg);
if (ret) {
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 8f0ca3f..3157195 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -416,7 +416,7 @@
if (cmd != DWC3_DEPCMD_ENDTRANSFER) {
dwc->ep_cmd_timeout_cnt++;
dwc3_notify_event(dwc,
- DWC3_CONTROLLER_RESTART_USB_SESSION);
+ DWC3_CONTROLLER_RESTART_USB_SESSION, 0);
}
cmd_status = -ETIMEDOUT;
}
@@ -2074,7 +2074,7 @@
dwc->vbus_draw = mA;
dev_dbg(dwc->dev, "Notify controller from %s. mA = %u\n", __func__, mA);
dbg_event(0xFF, "currentDraw", mA);
- dwc3_notify_event(dwc, DWC3_CONTROLLER_SET_CURRENT_DRAW_EVENT);
+ dwc3_notify_event(dwc, DWC3_CONTROLLER_SET_CURRENT_DRAW_EVENT, 0);
return 0;
}
@@ -2105,7 +2105,8 @@
* during enumeration.
*/
dwc->b_suspend = false;
- dwc3_notify_event(dwc, DWC3_CONTROLLER_NOTIFY_OTG_EVENT);
+ dwc3_notify_event(dwc, DWC3_CONTROLLER_NOTIFY_OTG_EVENT, 0);
+
ret = dwc3_gadget_run_stop(dwc, is_on, false);
spin_unlock_irqrestore(&dwc->lock, flags);
@@ -2416,7 +2417,7 @@
struct dwc3 *dwc = gadget_to_dwc(g);
dbg_event(0xFF, "RestartUSBSession", 0);
- return dwc3_notify_event(dwc, DWC3_CONTROLLER_RESTART_USB_SESSION);
+ return dwc3_notify_event(dwc, DWC3_CONTROLLER_RESTART_USB_SESSION, 0);
}
static const struct usb_gadget_ops dwc3_gadget_ops = {
@@ -2969,6 +2970,10 @@
if (!dep->resource_index)
return;
+ if (dep->endpoint.endless)
+ dwc3_notify_event(dwc, DWC3_CONTROLLER_NOTIFY_DISABLE_UPDXFER,
+ dep->number);
+
/*
* NOTICE: We are violating what the Databook says about the
* EndTransfer command. Ideally we would _always_ wait for the
@@ -3062,7 +3067,7 @@
dbg_event(0xFF, "DISCONNECT INT", 0);
dev_dbg(dwc->dev, "Notify OTG from %s\n", __func__);
dwc->b_suspend = false;
- dwc3_notify_event(dwc, DWC3_CONTROLLER_NOTIFY_OTG_EVENT);
+ dwc3_notify_event(dwc, DWC3_CONTROLLER_NOTIFY_OTG_EVENT, 0);
reg = dwc3_readl(dwc->regs, DWC3_DCTL);
reg &= ~DWC3_DCTL_INITU1ENA;
@@ -3122,7 +3127,7 @@
dbg_event(0xFF, "BUS RESET", 0);
dev_dbg(dwc->dev, "Notify OTG from %s\n", __func__);
dwc->b_suspend = false;
- dwc3_notify_event(dwc, DWC3_CONTROLLER_NOTIFY_OTG_EVENT);
+ dwc3_notify_event(dwc, DWC3_CONTROLLER_NOTIFY_OTG_EVENT, 0);
dwc3_usb3_phy_suspend(dwc, false);
usb_gadget_vbus_draw(&dwc->gadget, 100);
@@ -3297,7 +3302,8 @@
return;
}
- dwc3_notify_event(dwc, DWC3_CONTROLLER_CONNDONE_EVENT);
+ dwc3_notify_event(dwc, DWC3_CONTROLLER_CONNDONE_EVENT, 0);
+
/*
* Configure PHY via GUSB3PIPECTLn if required.
*
@@ -3332,7 +3338,8 @@
*/
dev_dbg(dwc->dev, "Notify OTG from %s\n", __func__);
dwc->b_suspend = false;
- dwc3_notify_event(dwc, DWC3_CONTROLLER_NOTIFY_OTG_EVENT);
+ dwc3_notify_event(dwc,
+ DWC3_CONTROLLER_NOTIFY_OTG_EVENT, 0);
/*
* set state to U0 as function level resume is trying to queue
@@ -3476,7 +3483,7 @@
dev_dbg(dwc->dev, "Notify OTG from %s\n", __func__);
dwc->b_suspend = true;
- dwc3_notify_event(dwc, DWC3_CONTROLLER_NOTIFY_OTG_EVENT);
+ dwc3_notify_event(dwc, DWC3_CONTROLLER_NOTIFY_OTG_EVENT, 0);
}
dwc->link_state = next;
@@ -3640,7 +3647,8 @@
evt->lpos = (evt->lpos + left) %
DWC3_EVENT_BUFFERS_SIZE;
dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(0), left);
- if (dwc3_notify_event(dwc, DWC3_CONTROLLER_ERROR_EVENT))
+ if (dwc3_notify_event(dwc,
+ DWC3_CONTROLLER_ERROR_EVENT, 0))
dwc->err_evt_seen = 0;
break;
}
diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index e85f24d..ae9e5e8 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -1773,7 +1773,8 @@
value = min(w_length, (u16) value);
break;
case USB_DT_BOS:
- if (gadget_is_superspeed(gadget) ||
+ if ((gadget_is_superspeed(gadget) &&
+ (gadget->speed >= USB_SPEED_SUPER)) ||
!disable_l1_for_hs) {
value = bos_desc(cdev);
value = min(w_length, (u16) value);
diff --git a/drivers/usb/gadget/function/f_gsi.c b/drivers/usb/gadget/function/f_gsi.c
index e7f072a..f40cfc9 100644
--- a/drivers/usb/gadget/function/f_gsi.c
+++ b/drivers/usb/gadget/function/f_gsi.c
@@ -2380,7 +2380,7 @@
if (!ep)
goto fail;
gsi->d_port.in_ep = ep;
- msm_ep_config(gsi->d_port.in_ep);
+ msm_ep_config(gsi->d_port.in_ep, NULL);
ep->driver_data = cdev; /* claim */
}
@@ -2390,7 +2390,7 @@
if (!ep)
goto fail;
gsi->d_port.out_ep = ep;
- msm_ep_config(gsi->d_port.out_ep);
+ msm_ep_config(gsi->d_port.out_ep, NULL);
ep->driver_data = cdev; /* claim */
}
diff --git a/drivers/usb/gadget/function/u_data_ipa.c b/drivers/usb/gadget/function/u_data_ipa.c
index 32e8cc9..7af152b3 100644
--- a/drivers/usb/gadget/function/u_data_ipa.c
+++ b/drivers/usb/gadget/function/u_data_ipa.c
@@ -477,7 +477,7 @@
configure_fifo(port->usb_bam_type,
port->src_connection_idx,
port->port_usb->out);
- ret = msm_ep_config(gport->out);
+ ret = msm_ep_config(gport->out, port->rx_req);
if (ret) {
pr_err("msm_ep_config() failed for OUT EP\n");
spin_unlock_irqrestore(&port->port_lock, flags);
@@ -502,7 +502,7 @@
port->tx_req->udc_priv = sps_params;
configure_fifo(port->usb_bam_type,
port->dst_connection_idx, gport->in);
- ret = msm_ep_config(gport->in);
+ ret = msm_ep_config(gport->in, port->tx_req);
if (ret) {
pr_err("msm_ep_config() failed for IN EP\n");
spin_unlock_irqrestore(&port->port_lock, flags);
diff --git a/drivers/usb/gadget/function/u_qdss.c b/drivers/usb/gadget/function/u_qdss.c
index b4353ac..d445e51 100644
--- a/drivers/usb/gadget/function/u_qdss.c
+++ b/drivers/usb/gadget/function/u_qdss.c
@@ -131,11 +131,12 @@
static int init_data(struct usb_ep *ep)
{
+ struct f_qdss *qdss = ep->driver_data;
int res = 0;
pr_debug("init_data\n");
- res = msm_ep_config(ep);
+ res = msm_ep_config(ep, qdss->endless_req);
if (res)
pr_err("msm_ep_config failed\n");
diff --git a/drivers/usb/phy/phy-msm-qusb-v2.c b/drivers/usb/phy/phy-msm-qusb-v2.c
index bfe50ac..02bf1eb 100644
--- a/drivers/usb/phy/phy-msm-qusb-v2.c
+++ b/drivers/usb/phy/phy-msm-qusb-v2.c
@@ -489,6 +489,12 @@
writel_relaxed(DEBUG_CTRL1_OVERRIDE_VAL,
qphy->base + qphy->phy_reg[DEBUG_CTRL1]);
}
+
+ if (qphy->refgen_north_bg_reg)
+ if (readl_relaxed(qphy->refgen_north_bg_reg) & BANDGAP_BYPASS)
+ writel_relaxed(BIAS_CTRL_2_OVERRIDE_VAL,
+ qphy->base + qphy->phy_reg[BIAS_CTRL_2]);
+
/* Ensure above write is completed before turning ON ref clk */
wmb();
diff --git a/drivers/usb/phy/phy-msm-snps-hs.c b/drivers/usb/phy/phy-msm-snps-hs.c
index 3482c93..e625839 100644
--- a/drivers/usb/phy/phy-msm-snps-hs.c
+++ b/drivers/usb/phy/phy-msm-snps-hs.c
@@ -96,6 +96,9 @@
bool suspended;
bool cable_connected;
+ int *param_override_seq;
+ int param_override_seq_cnt;
+
/* emulation targets specific */
void __iomem *emu_phy_base;
int *emu_init_seq;
@@ -381,6 +384,11 @@
msm_usb_write_readback(phy->base, USB2_PHY_USB_PHY_HS_PHY_CTRL1,
VBUSVLDEXT0, VBUSVLDEXT0);
+ /* set parameter ovrride if needed */
+ if (phy->param_override_seq)
+ hsusb_phy_write_seq(phy->base, phy->param_override_seq,
+ phy->param_override_seq_cnt, 0);
+
msm_usb_write_readback(phy->base, USB2_PHY_USB_PHY_HS_PHY_CTRL_COMMON2,
VREGBYPASS, VREGBYPASS);
@@ -576,6 +584,34 @@
}
}
+ phy->param_override_seq_cnt = of_property_count_elems_of_size(
+ dev->of_node,
+ "qcom,param-override-seq",
+ sizeof(*phy->param_override_seq));
+ if (phy->param_override_seq_cnt > 0) {
+ phy->param_override_seq = devm_kcalloc(dev,
+ phy->param_override_seq_cnt,
+ sizeof(*phy->param_override_seq),
+ GFP_KERNEL);
+ if (!phy->param_override_seq)
+ return -ENOMEM;
+
+ if (phy->param_override_seq_cnt % 2) {
+ dev_err(dev, "invalid param_override_seq_len\n");
+ return -EINVAL;
+ }
+
+ ret = of_property_read_u32_array(dev->of_node,
+ "qcom,param-override-seq",
+ phy->param_override_seq,
+ phy->param_override_seq_cnt);
+ if (ret) {
+ dev_err(dev, "qcom,param-override-seq read failed %d\n",
+ ret);
+ return ret;
+ }
+ }
+
ret = of_property_read_u32_array(dev->of_node, "qcom,vdd-voltage-level",
(u32 *) phy->vdd_levels,
ARRAY_SIZE(phy->vdd_levels));
diff --git a/drivers/video/fbdev/msm/mdss.h b/drivers/video/fbdev/msm/mdss.h
index 17bad06..12a3171 100644
--- a/drivers/video/fbdev/msm/mdss.h
+++ b/drivers/video/fbdev/msm/mdss.h
@@ -232,6 +232,13 @@
u32 *dest_scaler_off;
u32 *dest_scaler_lut_off;
struct mdss_mdp_qseed3_lut_tbl lut_tbl;
+
+ /*
+ * Lock is mainly to serialize access to LUT.
+ * LUT values come asynchronously from userspace
+ * via ioctl.
+ */
+ struct mutex scaler_lock;
};
struct mdss_data_type;
diff --git a/drivers/video/fbdev/msm/mdss_mdp.c b/drivers/video/fbdev/msm/mdss_mdp.c
index a9a5d8f..13a4bb6 100644
--- a/drivers/video/fbdev/msm/mdss_mdp.c
+++ b/drivers/video/fbdev/msm/mdss_mdp.c
@@ -2124,6 +2124,7 @@
return -EINVAL;
}
+ mutex_init(&mdata->scaler_off->scaler_lock);
return 0;
}
diff --git a/drivers/video/fbdev/msm/mdss_mdp_overlay.c b/drivers/video/fbdev/msm/mdss_mdp_overlay.c
index 3144b6c..3da2a07 100644
--- a/drivers/video/fbdev/msm/mdss_mdp_overlay.c
+++ b/drivers/video/fbdev/msm/mdss_mdp_overlay.c
@@ -6792,14 +6792,18 @@
if (!mdata->scaler_off)
return -EFAULT;
+ mutex_lock(&mdata->scaler_off->scaler_lock);
+
qseed3_lut_tbl = &mdata->scaler_off->lut_tbl;
if ((lut_tbl->dir_lut_size !=
DIR_LUT_IDX * DIR_LUT_COEFFS * sizeof(uint32_t)) ||
(lut_tbl->cir_lut_size !=
CIR_LUT_IDX * CIR_LUT_COEFFS * sizeof(uint32_t)) ||
(lut_tbl->sep_lut_size !=
- SEP_LUT_IDX * SEP_LUT_COEFFS * sizeof(uint32_t)))
+ SEP_LUT_IDX * SEP_LUT_COEFFS * sizeof(uint32_t))) {
+ mutex_unlock(&mdata->scaler_off->scaler_lock);
return -EINVAL;
+ }
if (!qseed3_lut_tbl->dir_lut) {
qseed3_lut_tbl->dir_lut = devm_kzalloc(&mdata->pdev->dev,
@@ -6807,7 +6811,7 @@
GFP_KERNEL);
if (!qseed3_lut_tbl->dir_lut) {
ret = -ENOMEM;
- goto fail;
+ goto err;
}
}
@@ -6817,7 +6821,7 @@
GFP_KERNEL);
if (!qseed3_lut_tbl->cir_lut) {
ret = -ENOMEM;
- goto fail;
+ goto fail_free_dir_lut;
}
}
@@ -6827,44 +6831,52 @@
GFP_KERNEL);
if (!qseed3_lut_tbl->sep_lut) {
ret = -ENOMEM;
- goto fail;
+ goto fail_free_cir_lut;
}
}
/* Invalidate before updating */
qseed3_lut_tbl->valid = false;
-
if (copy_from_user(qseed3_lut_tbl->dir_lut,
(void *)(unsigned long)lut_tbl->dir_lut,
lut_tbl->dir_lut_size)) {
ret = -EINVAL;
- goto err;
+ goto fail_free_sep_lut;
}
if (copy_from_user(qseed3_lut_tbl->cir_lut,
(void *)(unsigned long)lut_tbl->cir_lut,
lut_tbl->cir_lut_size)) {
ret = -EINVAL;
- goto err;
+ goto fail_free_sep_lut;
}
if (copy_from_user(qseed3_lut_tbl->sep_lut,
(void *)(unsigned long)lut_tbl->sep_lut,
lut_tbl->sep_lut_size)) {
ret = -EINVAL;
- goto err;
+ goto fail_free_sep_lut;
}
qseed3_lut_tbl->valid = true;
+ mutex_unlock(&mdata->scaler_off->scaler_lock);
+
return ret;
-fail:
- kfree(qseed3_lut_tbl->dir_lut);
- kfree(qseed3_lut_tbl->cir_lut);
- kfree(qseed3_lut_tbl->sep_lut);
+fail_free_sep_lut:
+ devm_kfree(&mdata->pdev->dev, qseed3_lut_tbl->sep_lut);
+fail_free_cir_lut:
+ devm_kfree(&mdata->pdev->dev, qseed3_lut_tbl->cir_lut);
+fail_free_dir_lut:
+ devm_kfree(&mdata->pdev->dev, qseed3_lut_tbl->dir_lut);
err:
+ qseed3_lut_tbl->dir_lut = NULL;
+ qseed3_lut_tbl->cir_lut = NULL;
+ qseed3_lut_tbl->sep_lut = NULL;
qseed3_lut_tbl->valid = false;
+ mutex_unlock(&mdata->scaler_off->scaler_lock);
+
return ret;
}
diff --git a/drivers/video/fbdev/msm/mdss_mdp_pp.c b/drivers/video/fbdev/msm/mdss_mdp_pp.c
index 74b698c..6b03f1d 100644
--- a/drivers/video/fbdev/msm/mdss_mdp_pp.c
+++ b/drivers/video/fbdev/msm/mdss_mdp_pp.c
@@ -1578,11 +1578,16 @@
};
mdata = mdss_mdp_get_mdata();
+
+ mutex_lock(&mdata->scaler_off->scaler_lock);
+
lut_tbl = &mdata->scaler_off->lut_tbl;
if ((!lut_tbl) || (!lut_tbl->valid)) {
+ mutex_unlock(&mdata->scaler_off->scaler_lock);
pr_err("%s:Invalid QSEED3 LUT TABLE\n", __func__);
return -EINVAL;
}
+
if ((scaler->lut_flag & SCALER_LUT_DIR_WR) ||
(scaler->lut_flag & SCALER_LUT_Y_CIR_WR) ||
(scaler->lut_flag & SCALER_LUT_UV_CIR_WR) ||
@@ -1632,6 +1637,7 @@
if (scaler->lut_flag & SCALER_LUT_SWAP)
writel_relaxed(BIT(0), MDSS_MDP_REG_SCALER_COEF_LUT_CTRL +
offset);
+ mutex_unlock(&mdata->scaler_off->scaler_lock);
return 0;
}
diff --git a/fs/block_dev.c b/fs/block_dev.c
index cb936c9..9900693 100644
--- a/fs/block_dev.c
+++ b/fs/block_dev.c
@@ -614,6 +614,7 @@
#ifdef CONFIG_SYSFS
INIT_LIST_HEAD(&bdev->bd_holder_disks);
#endif
+ bdev->bd_bdi = &noop_backing_dev_info;
inode_init_once(&ei->vfs_inode);
/* Initialize mutex for freeze. */
mutex_init(&bdev->bd_fsfreeze_mutex);
@@ -628,6 +629,12 @@
spin_lock(&bdev_lock);
list_del_init(&bdev->bd_list);
spin_unlock(&bdev_lock);
+ /* Detach inode from wb early as bdi_put() may free bdi->wb */
+ inode_detach_wb(inode);
+ if (bdev->bd_bdi != &noop_backing_dev_info) {
+ bdi_put(bdev->bd_bdi);
+ bdev->bd_bdi = &noop_backing_dev_info;
+ }
}
static const struct super_operations bdev_sops = {
@@ -698,6 +705,21 @@
static LIST_HEAD(all_bdevs);
+/*
+ * If there is a bdev inode for this device, unhash it so that it gets evicted
+ * as soon as last inode reference is dropped.
+ */
+void bdev_unhash_inode(dev_t dev)
+{
+ struct inode *inode;
+
+ inode = ilookup5(blockdev_superblock, hash(dev), bdev_test, &dev);
+ if (inode) {
+ remove_inode_hash(inode);
+ iput(inode);
+ }
+}
+
struct block_device *bdget(dev_t dev)
{
struct block_device *bdev;
@@ -769,13 +791,22 @@
spin_lock(&bdev_lock);
bdev = inode->i_bdev;
- if (bdev) {
+ if (bdev && !inode_unhashed(bdev->bd_inode)) {
bdgrab(bdev);
spin_unlock(&bdev_lock);
return bdev;
}
spin_unlock(&bdev_lock);
+ /*
+ * i_bdev references block device inode that was already shut down
+ * (corresponding device got removed). Remove the reference and look
+ * up block device inode again just in case new device got
+ * reestablished under the same device number.
+ */
+ if (bdev)
+ bd_forget(inode);
+
bdev = bdget(inode->i_rdev);
if (bdev) {
spin_lock(&bdev_lock);
@@ -1334,6 +1365,9 @@
}
bd_set_size(bdev, (loff_t)bdev->bd_part->nr_sects << 9);
}
+
+ if (bdev->bd_bdi == &noop_backing_dev_info)
+ bdev->bd_bdi = bdi_get(disk->queue->backing_dev_info);
} else {
if (bdev->bd_contains == bdev) {
ret = 0;
@@ -1586,12 +1620,6 @@
kill_bdev(bdev);
bdev_write_inode(bdev);
- /*
- * Detaching bdev inode from its wb in __destroy_inode()
- * is too late: the queue which embeds its bdi (along with
- * root wb) can be gone as soon as we put_disk() below.
- */
- inode_detach_wb(bdev->bd_inode);
}
if (bdev->bd_contains == bdev) {
if (disk->fops->release)
diff --git a/fs/btrfs/disk-io.c b/fs/btrfs/disk-io.c
index 1cd3257..c66054c 100644
--- a/fs/btrfs/disk-io.c
+++ b/fs/btrfs/disk-io.c
@@ -1816,7 +1816,7 @@
list_for_each_entry_rcu(device, &info->fs_devices->devices, dev_list) {
if (!device->bdev)
continue;
- bdi = blk_get_backing_dev_info(device->bdev);
+ bdi = device->bdev->bd_bdi;
if (bdi_congested(bdi, bdi_bits)) {
ret = 1;
break;
diff --git a/fs/btrfs/volumes.c b/fs/btrfs/volumes.c
index 06a77e4..fad7b37 100644
--- a/fs/btrfs/volumes.c
+++ b/fs/btrfs/volumes.c
@@ -366,7 +366,7 @@
*/
blk_start_plug(&plug);
- bdi = blk_get_backing_dev_info(device->bdev);
+ bdi = device->bdev->bd_bdi;
fs_info = device->dev_root->fs_info;
limit = btrfs_async_submit_limit(fs_info);
limit = limit * 2 / 3;
diff --git a/fs/gfs2/ops_fstype.c b/fs/gfs2/ops_fstype.c
index ff72ac6..77f1e25 100644
--- a/fs/gfs2/ops_fstype.c
+++ b/fs/gfs2/ops_fstype.c
@@ -1226,7 +1226,7 @@
* We set the bdi here to the queue backing, file systems can
* overwrite this in ->fill_super()
*/
- s->s_bdi = &bdev_get_queue(s->s_bdev)->backing_dev_info;
+ s->s_bdi = bdev_get_queue(s->s_bdev)->backing_dev_info;
return 0;
}
diff --git a/fs/nilfs2/super.c b/fs/nilfs2/super.c
index c95d369..ff158f0 100644
--- a/fs/nilfs2/super.c
+++ b/fs/nilfs2/super.c
@@ -1068,7 +1068,7 @@
sb->s_time_gran = 1;
sb->s_max_links = NILFS_LINK_MAX;
- sb->s_bdi = &bdev_get_queue(sb->s_bdev)->backing_dev_info;
+ sb->s_bdi = bdev_get_queue(sb->s_bdev)->backing_dev_info;
err = load_nilfs(nilfs, sb);
if (err)
diff --git a/fs/super.c b/fs/super.c
index 2987fe3..847d82d 100644
--- a/fs/super.c
+++ b/fs/super.c
@@ -1030,7 +1030,7 @@
* We set the bdi here to the queue backing, file systems can
* overwrite this in ->fill_super()
*/
- s->s_bdi = &bdev_get_queue(s->s_bdev)->backing_dev_info;
+ s->s_bdi = bdev_get_queue(s->s_bdev)->backing_dev_info;
return 0;
}
diff --git a/fs/xfs/xfs_buf.c b/fs/xfs/xfs_buf.c
index 3f45d98..7a04b03 100644
--- a/fs/xfs/xfs_buf.c
+++ b/fs/xfs/xfs_buf.c
@@ -744,7 +744,7 @@
int nmaps,
const struct xfs_buf_ops *ops)
{
- if (bdi_read_congested(target->bt_bdi))
+ if (bdi_read_congested(target->bt_bdev->bd_bdi))
return;
xfs_buf_read_map(target, map, nmaps,
@@ -1782,7 +1782,6 @@
btp->bt_mount = mp;
btp->bt_dev = bdev->bd_dev;
btp->bt_bdev = bdev;
- btp->bt_bdi = blk_get_backing_dev_info(bdev);
if (xfs_setsize_buftarg_early(btp, bdev))
goto error_free;
diff --git a/fs/xfs/xfs_buf.h b/fs/xfs/xfs_buf.h
index f961b19..c26b36a 100644
--- a/fs/xfs/xfs_buf.h
+++ b/fs/xfs/xfs_buf.h
@@ -107,7 +107,6 @@
typedef struct xfs_buftarg {
dev_t bt_dev;
struct block_device *bt_bdev;
- struct backing_dev_info *bt_bdi;
struct xfs_mount *bt_mount;
unsigned int bt_meta_sectorsize;
size_t bt_meta_sectormask;
diff --git a/include/dt-bindings/clock/qcom,cpucc-sdm845.h b/include/dt-bindings/clock/qcom,cpucc-sdm845.h
index f039284..bbfb849 100644
--- a/include/dt-bindings/clock/qcom,cpucc-sdm845.h
+++ b/include/dt-bindings/clock/qcom,cpucc-sdm845.h
@@ -30,5 +30,6 @@
#define L3_MISC_VOTE_CLK 13
#define CPU4_PWRCL_CLK 14
#define CPU5_PWRCL_CLK 15
+#define L3_GPU_VOTE_CLK 16
#endif
diff --git a/include/linux/backing-dev-defs.h b/include/linux/backing-dev-defs.h
index c357f27..0691068 100644
--- a/include/linux/backing-dev-defs.h
+++ b/include/linux/backing-dev-defs.h
@@ -10,6 +10,7 @@
#include <linux/flex_proportions.h>
#include <linux/timer.h>
#include <linux/workqueue.h>
+#include <linux/kref.h>
struct page;
struct device;
@@ -20,6 +21,7 @@
*/
enum wb_state {
WB_registered, /* bdi_register() was done */
+ WB_shutting_down, /* wb_shutdown() in progress */
WB_writeback_running, /* Writeback is in progress */
WB_has_dirty_io, /* Dirty inodes on ->b_{dirty|io|more_io} */
};
@@ -53,7 +55,9 @@
atomic_t refcnt; /* nr of attached wb's and blkg */
#ifdef CONFIG_CGROUP_WRITEBACK
- struct backing_dev_info *bdi; /* the associated bdi */
+ struct backing_dev_info *__bdi; /* the associated bdi, set to NULL
+ * on bdi unregistration. For memcg-wb
+ * internal use only! */
int blkcg_id; /* ID of the associated blkcg */
struct rb_node rb_node; /* on bdi->cgwb_congestion_tree */
#endif
@@ -142,6 +146,7 @@
char *name;
+ struct kref refcnt; /* Reference counter for the structure */
unsigned int min_ratio;
unsigned int max_ratio, max_prop_frac;
@@ -156,7 +161,6 @@
#ifdef CONFIG_CGROUP_WRITEBACK
struct radix_tree_root cgwb_tree; /* radix tree of active cgroup wbs */
struct rb_root cgwb_congested_tree; /* their congested states */
- atomic_t usage_cnt; /* counts both cgwbs and cgwb_contested's */
#else
struct bdi_writeback_congested *wb_congested;
#endif
diff --git a/include/linux/backing-dev.h b/include/linux/backing-dev.h
index 43b93a9..c52a48c 100644
--- a/include/linux/backing-dev.h
+++ b/include/linux/backing-dev.h
@@ -18,7 +18,14 @@
#include <linux/slab.h>
int __must_check bdi_init(struct backing_dev_info *bdi);
-void bdi_exit(struct backing_dev_info *bdi);
+
+static inline struct backing_dev_info *bdi_get(struct backing_dev_info *bdi)
+{
+ kref_get(&bdi->refcnt);
+ return bdi;
+}
+
+void bdi_put(struct backing_dev_info *bdi);
__printf(3, 4)
int bdi_register(struct backing_dev_info *bdi, struct device *parent,
@@ -29,6 +36,7 @@
int __must_check bdi_setup_and_register(struct backing_dev_info *, char *);
void bdi_destroy(struct backing_dev_info *bdi);
+struct backing_dev_info *bdi_alloc_node(gfp_t gfp_mask, int node_id);
void wb_start_writeback(struct bdi_writeback *wb, long nr_pages,
bool range_cyclic, enum wb_reason reason);
@@ -183,7 +191,7 @@
sb = inode->i_sb;
#ifdef CONFIG_BLOCK
if (sb_is_blkdev_sb(sb))
- return blk_get_backing_dev_info(I_BDEV(inode));
+ return I_BDEV(inode)->bd_bdi;
#endif
return sb->s_bdi;
}
diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h
index 0693c3e..46cd13d 100644
--- a/include/linux/blkdev.h
+++ b/include/linux/blkdev.h
@@ -345,7 +345,7 @@
*/
struct delayed_work delay_work;
- struct backing_dev_info backing_dev_info;
+ struct backing_dev_info *backing_dev_info;
/*
* The queue owner gets to use this for whatever they like.
@@ -1031,7 +1031,6 @@
extern void blk_queue_rq_timeout(struct request_queue *, unsigned int);
extern void blk_queue_flush_queueable(struct request_queue *q, bool queueable);
extern void blk_queue_write_cache(struct request_queue *q, bool enabled, bool fua);
-extern struct backing_dev_info *blk_get_backing_dev_info(struct block_device *bdev);
extern int blk_rq_map_sg(struct request_queue *, struct request *, struct scatterlist *);
extern int blk_rq_map_sg_no_cluster(struct request_queue *q, struct request *rq,
diff --git a/include/linux/fs.h b/include/linux/fs.h
index 4f6ec47..7fb621f 100644
--- a/include/linux/fs.h
+++ b/include/linux/fs.h
@@ -475,6 +475,7 @@
int bd_invalidated;
struct gendisk * bd_disk;
struct request_queue * bd_queue;
+ struct backing_dev_info *bd_bdi;
struct list_head bd_list;
/*
* Private data. You must have bd_claim'ed the block_device
@@ -2398,6 +2399,7 @@
#ifdef CONFIG_BLOCK
extern int register_blkdev(unsigned int, const char *);
extern void unregister_blkdev(unsigned int, const char *);
+extern void bdev_unhash_inode(dev_t dev);
extern struct block_device *bdget(dev_t);
extern struct block_device *bdgrab(struct block_device *bdev);
extern void bd_set_size(struct block_device *, loff_t size);
diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h
index 3562047..bbc65ef 100644
--- a/include/linux/interrupt.h
+++ b/include/linux/interrupt.h
@@ -14,7 +14,6 @@
#include <linux/hrtimer.h>
#include <linux/kref.h>
#include <linux/workqueue.h>
-#include <linux/sched.h>
#include <linux/atomic.h>
#include <asm/ptrace.h>
@@ -499,13 +498,6 @@
return this_cpu_read(ksoftirqd);
}
-static inline bool ksoftirqd_running_on(int cpu)
-{
- struct task_struct *tsk = per_cpu(ksoftirqd, cpu);
-
- return tsk && (tsk->state == TASK_RUNNING);
-}
-
/* Tasklets --- multithreaded analogue of BHs.
Main feature differing them of generic softirqs: tasklet
diff --git a/include/linux/kobject.h b/include/linux/kobject.h
index 74de8b6..5c8b65a 100644
--- a/include/linux/kobject.h
+++ b/include/linux/kobject.h
@@ -108,6 +108,8 @@
extern int __must_check kobject_move(struct kobject *, struct kobject *);
extern struct kobject *kobject_get(struct kobject *kobj);
+extern struct kobject * __must_check kobject_get_unless_zero(
+ struct kobject *kobj);
extern void kobject_put(struct kobject *kobj);
extern const void *kobject_namespace(struct kobject *kobj);
diff --git a/include/linux/qpnp/qpnp-revid.h b/include/linux/qpnp/qpnp-revid.h
index 8933742..c1206c6 100644
--- a/include/linux/qpnp/qpnp-revid.h
+++ b/include/linux/qpnp/qpnp-revid.h
@@ -162,6 +162,9 @@
#define PM8950_V2P0_REV4 0x02
+/* PM8953 */
+#define PM8953_SUBTYPE 0x16
+
/* PMI8950 */
#define PMI8950_SUBTYPE 0x11
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 290e2b2..8933c9f 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -2754,11 +2754,6 @@
return 0;
}
-static inline void
-sched_set_cpu_cstate(int cpu, int cstate, int wakeup_energy, int wakeup_latency)
-{
-}
-
#ifdef CONFIG_SCHED_WALT
extern int register_cpu_cycle_counter_cb(struct cpu_cycle_counter_cb *cb);
extern void sched_set_io_is_busy(int val);
diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h
index 6acd229..a074fd3 100644
--- a/include/linux/usb/gadget.h
+++ b/include/linux/usb/gadget.h
@@ -1133,7 +1133,7 @@
const char *ep_name);
#ifdef CONFIG_USB_DWC3_MSM
-int msm_ep_config(struct usb_ep *ep);
+int msm_ep_config(struct usb_ep *ep, struct usb_request *request);
int msm_ep_unconfig(struct usb_ep *ep);
void dwc3_tx_fifo_resize_request(struct usb_ep *ep, bool qdss_enable);
int msm_data_fifo_config(struct usb_ep *ep, unsigned long addr, u32 size,
@@ -1145,7 +1145,7 @@
u32 size, u8 dst_pipe_idx)
{ return -ENODEV; }
-static inline int msm_ep_config(struct usb_ep *ep)
+static inline int msm_ep_config(struct usb_ep *ep, struct usb_request *request)
{ return -ENODEV; }
static inline int msm_ep_unconfig(struct usb_ep *ep)
diff --git a/include/linux/writeback.h b/include/linux/writeback.h
index 797100e..9a8eb83 100644
--- a/include/linux/writeback.h
+++ b/include/linux/writeback.h
@@ -224,6 +224,7 @@
static inline void inode_detach_wb(struct inode *inode)
{
if (inode->i_wb) {
+ WARN_ON_ONCE(!(inode->i_state & I_CLEAR));
wb_put(inode->i_wb);
inode->i_wb = NULL;
}
diff --git a/include/soc/qcom/clock-alpha-pll.h b/include/soc/qcom/clock-alpha-pll.h
index f8130f1..20f8a2f 100644
--- a/include/soc/qcom/clock-alpha-pll.h
+++ b/include/soc/qcom/clock-alpha-pll.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -27,6 +27,7 @@
u32 alpha_en_mask; /* alpha_en bit */
u32 output_mask; /* pllout_* bits */
u32 post_div_mask;
+ u32 cal_l_val_mask;
u32 test_ctl_lo_mask;
u32 test_ctl_hi_mask;
@@ -61,6 +62,7 @@
u32 config_ctl_val; /* config register init value */
u32 test_ctl_lo_val; /* test control settings */
u32 test_ctl_hi_val;
+ u32 cal_l_val; /* Calibration L value */
struct alpha_pll_vco_tbl *vco_tbl;
u32 num_vco;
diff --git a/include/uapi/linux/hbtp_input.h b/include/uapi/linux/hbtp_input.h
index 3b124ff..8bc189f 100644
--- a/include/uapi/linux/hbtp_input.h
+++ b/include/uapi/linux/hbtp_input.h
@@ -9,6 +9,7 @@
#define MAX_ROI_SIZE 144
#define MAX_ACCEL_SIZE 128
+#define HBTP_FLAG_ACTIVE_BLOB 0x01
#define HBTP_EVENT_TYPE_DISPLAY "EVENT_TYPE=HBTP_DISPLAY"
struct hbtp_input_touch {
@@ -33,6 +34,13 @@
struct timeval time_val;
};
+struct hbtp_input_mt_ext {
+ __s32 num_touches;
+ struct hbtp_input_touch touches[HBTP_MAX_FINGER];
+ struct timeval time_val;
+ __u32 flag;
+};
+
struct hbtp_input_absinfo {
bool active;
__u16 code;
@@ -77,6 +85,8 @@
enum hbtp_afe_power_ctrl)
#define HBTP_SET_SENSORDATA _IOW(HBTP_INPUT_IOCTL_BASE, 207, \
struct hbtp_sensor_data)
+#define HBTP_SET_TOUCHDATA_EXT _IOW(HBTP_INPUT_IOCTL_BASE, 208, \
+ struct hbtp_input_mt_ext)
#endif /* _UAPI_HBTP_INPUT_H */
diff --git a/include/uapi/linux/qg.h b/include/uapi/linux/qg.h
index c0b2b6e..54488ff 100644
--- a/include/uapi/linux/qg.h
+++ b/include/uapi/linux/qg.h
@@ -38,6 +38,8 @@
};
struct qg_kernel_data {
+ unsigned int seq_no;
+ unsigned int fifo_time;
unsigned int fifo_length;
struct fifo_data fifo[MAX_FIFO_LENGTH];
struct qg_param param[QG_MAX];
diff --git a/kernel/power/qos.c b/kernel/power/qos.c
index 5183134..0469d80 100644
--- a/kernel/power/qos.c
+++ b/kernel/power/qos.c
@@ -597,12 +597,11 @@
#ifdef CONFIG_SMP
case PM_QOS_REQ_AFFINE_IRQ:
if (irq_can_set_affinity(req->irq)) {
- int ret = 0;
struct irq_desc *desc = irq_to_desc(req->irq);
struct cpumask *mask;
if (!desc)
- break;
+ return;
mask = desc->irq_data.common->affinity;
@@ -612,13 +611,6 @@
req->irq_notify.notify = pm_qos_irq_notify;
req->irq_notify.release = pm_qos_irq_release;
- ret = irq_set_affinity_notifier(req->irq,
- &req->irq_notify);
- if (ret) {
- WARN(1, KERN_ERR "IRQ affinity notify set failed\n");
- req->type = PM_QOS_REQ_ALL_CORES;
- cpumask_setall(&req->cpus_affine);
- }
} else {
req->type = PM_QOS_REQ_ALL_CORES;
cpumask_setall(&req->cpus_affine);
@@ -640,6 +632,24 @@
trace_pm_qos_add_request(pm_qos_class, value);
pm_qos_update_target(pm_qos_array[pm_qos_class]->constraints,
req, PM_QOS_ADD_REQ, value);
+
+#ifdef CONFIG_SMP
+ if (req->type == PM_QOS_REQ_AFFINE_IRQ &&
+ irq_can_set_affinity(req->irq)) {
+ int ret = 0;
+
+ ret = irq_set_affinity_notifier(req->irq,
+ &req->irq_notify);
+ if (ret) {
+ WARN(1, "IRQ affinity notify set failed\n");
+ req->type = PM_QOS_REQ_ALL_CORES;
+ cpumask_setall(&req->cpus_affine);
+ pm_qos_update_target(
+ pm_qos_array[pm_qos_class]->constraints,
+ req, PM_QOS_UPDATE_REQ, value);
+ }
+ }
+#endif
}
EXPORT_SYMBOL_GPL(pm_qos_add_request);
diff --git a/kernel/time/timer.c b/kernel/time/timer.c
index a6f8a44..41481dc 100644
--- a/kernel/time/timer.c
+++ b/kernel/time/timer.c
@@ -208,6 +208,7 @@
static DEFINE_PER_CPU(struct timer_base, timer_bases[NR_BASES]);
struct timer_base timer_base_deferrable;
+static atomic_t deferrable_pending;
#if defined(CONFIG_SMP) && defined(CONFIG_NO_HZ_COMMON)
unsigned int sysctl_timer_migration = 1;
@@ -1488,8 +1489,6 @@
#ifdef CONFIG_SMP
-static atomic_t deferrable_pending;
-
/*
* check_pending_deferrable_timers - Check for unbound deferrable timer expiry
* @cpu - Current CPU
@@ -1670,27 +1669,6 @@
spin_unlock_irq(&base->lock);
}
-#ifdef CONFIG_SMP
-static inline bool should_this_cpu_run_deferrable_timers(void)
-{
- int tick_cpu = READ_ONCE(tick_do_timer_cpu);
-
- if (atomic_cmpxchg(&deferrable_pending, 1, 0) &&
- tick_cpu == TICK_DO_TIMER_NONE)
- return true;
-
- if (tick_cpu == smp_processor_id())
- return true;
-
- return (tick_cpu >= 0 && ksoftirqd_running_on(tick_cpu));
-}
-#else
-static inline bool should_this_cpu_run_deferrable_timers(void)
-{
- return true;
-}
-#endif
-
/*
* This function runs timers and the timer-tq in bottom half context.
*/
@@ -1715,7 +1693,9 @@
if (IS_ENABLED(CONFIG_NO_HZ_COMMON))
__run_timers(this_cpu_ptr(&timer_bases[BASE_DEF]));
- if (should_this_cpu_run_deferrable_timers())
+ if ((atomic_cmpxchg(&deferrable_pending, 1, 0) &&
+ tick_do_timer_cpu == TICK_DO_TIMER_NONE) ||
+ tick_do_timer_cpu == smp_processor_id())
__run_timers(&timer_base_deferrable);
}
diff --git a/lib/kobject.c b/lib/kobject.c
index 445dcae..763d70a 100644
--- a/lib/kobject.c
+++ b/lib/kobject.c
@@ -601,12 +601,15 @@
}
EXPORT_SYMBOL(kobject_get);
-static struct kobject * __must_check kobject_get_unless_zero(struct kobject *kobj)
+struct kobject * __must_check kobject_get_unless_zero(struct kobject *kobj)
{
+ if (!kobj)
+ return NULL;
if (!kref_get_unless_zero(&kobj->kref))
kobj = NULL;
return kobj;
}
+EXPORT_SYMBOL(kobject_get_unless_zero);
/*
* kobject_cleanup - free kobject resources.
diff --git a/mm/backing-dev.c b/mm/backing-dev.c
index 6ff2d77..62ca907 100644
--- a/mm/backing-dev.c
+++ b/mm/backing-dev.c
@@ -237,6 +237,7 @@
bdi_class->dev_groups = bdi_dev_groups;
bdi_debug_init();
+
return 0;
}
postcore_initcall(bdi_class_init);
@@ -293,6 +294,8 @@
memset(wb, 0, sizeof(*wb));
+ if (wb != &bdi->wb)
+ bdi_get(bdi);
wb->bdi = bdi;
wb->last_old_flush = jiffies;
INIT_LIST_HEAD(&wb->b_dirty);
@@ -312,8 +315,10 @@
INIT_DELAYED_WORK(&wb->dwork, wb_workfn);
wb->congested = wb_congested_get_create(bdi, blkcg_id, gfp);
- if (!wb->congested)
- return -ENOMEM;
+ if (!wb->congested) {
+ err = -ENOMEM;
+ goto out_put_bdi;
+ }
err = fprop_local_init_percpu(&wb->completions, gfp);
if (err)
@@ -333,9 +338,14 @@
fprop_local_destroy_percpu(&wb->completions);
out_put_cong:
wb_congested_put(wb->congested);
+out_put_bdi:
+ if (wb != &bdi->wb)
+ bdi_put(bdi);
return err;
}
+static void cgwb_remove_from_bdi_list(struct bdi_writeback *wb);
+
/*
* Remove bdi from the global list and shutdown any threads we have running
*/
@@ -345,10 +355,18 @@
spin_lock_bh(&wb->work_lock);
if (!test_and_clear_bit(WB_registered, &wb->state)) {
spin_unlock_bh(&wb->work_lock);
+ /*
+ * Wait for wb shutdown to finish if someone else is just
+ * running wb_shutdown(). Otherwise we could proceed to wb /
+ * bdi destruction before wb_shutdown() is finished.
+ */
+ wait_on_bit(&wb->state, WB_shutting_down, TASK_UNINTERRUPTIBLE);
return;
}
+ set_bit(WB_shutting_down, &wb->state);
spin_unlock_bh(&wb->work_lock);
+ cgwb_remove_from_bdi_list(wb);
/*
* Drain work list and shutdown the delayed_work. !WB_registered
* tells wb_workfn() that @wb is dying and its work_list needs to
@@ -357,6 +375,12 @@
mod_delayed_work(bdi_wq, &wb->dwork, 0);
flush_delayed_work(&wb->dwork);
WARN_ON(!list_empty(&wb->work_list));
+ /*
+ * Make sure bit gets cleared after shutdown is finished. Matches with
+ * the barrier provided by test_and_clear_bit() above.
+ */
+ smp_wmb();
+ clear_bit(WB_shutting_down, &wb->state);
}
static void wb_exit(struct bdi_writeback *wb)
@@ -370,6 +394,8 @@
fprop_local_destroy_percpu(&wb->completions);
wb_congested_put(wb->congested);
+ if (wb != &wb->bdi->wb)
+ bdi_put(wb->bdi);
}
#ifdef CONFIG_CGROUP_WRITEBACK
@@ -379,11 +405,9 @@
/*
* cgwb_lock protects bdi->cgwb_tree, bdi->cgwb_congested_tree,
* blkcg->cgwb_list, and memcg->cgwb_list. bdi->cgwb_tree is also RCU
- * protected. cgwb_release_wait is used to wait for the completion of cgwb
- * releases from bdi destruction path.
+ * protected.
*/
static DEFINE_SPINLOCK(cgwb_lock);
-static DECLARE_WAIT_QUEUE_HEAD(cgwb_release_wait);
/**
* wb_congested_get_create - get or create a wb_congested
@@ -436,7 +460,7 @@
return NULL;
atomic_set(&new_congested->refcnt, 0);
- new_congested->bdi = bdi;
+ new_congested->__bdi = bdi;
new_congested->blkcg_id = blkcg_id;
goto retry;
@@ -464,10 +488,10 @@
}
/* bdi might already have been destroyed leaving @congested unlinked */
- if (congested->bdi) {
+ if (congested->__bdi) {
rb_erase(&congested->rb_node,
- &congested->bdi->cgwb_congested_tree);
- congested->bdi = NULL;
+ &congested->__bdi->cgwb_congested_tree);
+ congested->__bdi = NULL;
}
spin_unlock_irqrestore(&cgwb_lock, flags);
@@ -478,11 +502,6 @@
{
struct bdi_writeback *wb = container_of(work, struct bdi_writeback,
release_work);
- struct backing_dev_info *bdi = wb->bdi;
-
- spin_lock_irq(&cgwb_lock);
- list_del_rcu(&wb->bdi_node);
- spin_unlock_irq(&cgwb_lock);
wb_shutdown(wb);
@@ -493,9 +512,6 @@
percpu_ref_exit(&wb->refcnt);
wb_exit(wb);
kfree_rcu(wb, rcu);
-
- if (atomic_dec_and_test(&bdi->usage_cnt))
- wake_up_all(&cgwb_release_wait);
}
static void cgwb_release(struct percpu_ref *refcnt)
@@ -515,6 +531,13 @@
percpu_ref_kill(&wb->refcnt);
}
+static void cgwb_remove_from_bdi_list(struct bdi_writeback *wb)
+{
+ spin_lock_irq(&cgwb_lock);
+ list_del_rcu(&wb->bdi_node);
+ spin_unlock_irq(&cgwb_lock);
+}
+
static int cgwb_create(struct backing_dev_info *bdi,
struct cgroup_subsys_state *memcg_css, gfp_t gfp)
{
@@ -578,7 +601,6 @@
/* we might have raced another instance of this function */
ret = radix_tree_insert(&bdi->cgwb_tree, memcg_css->id, wb);
if (!ret) {
- atomic_inc(&bdi->usage_cnt);
list_add_tail_rcu(&wb->bdi_node, &bdi->wb_list);
list_add(&wb->memcg_node, memcg_cgwb_list);
list_add(&wb->blkcg_node, blkcg_cgwb_list);
@@ -668,7 +690,6 @@
INIT_RADIX_TREE(&bdi->cgwb_tree, GFP_ATOMIC);
bdi->cgwb_congested_tree = RB_ROOT;
- atomic_set(&bdi->usage_cnt, 1);
ret = wb_init(&bdi->wb, bdi, 1, GFP_KERNEL);
if (!ret) {
@@ -678,36 +699,26 @@
return ret;
}
-static void cgwb_bdi_destroy(struct backing_dev_info *bdi)
+static void cgwb_bdi_unregister(struct backing_dev_info *bdi)
{
struct radix_tree_iter iter;
- struct rb_node *rbn;
void **slot;
+ struct bdi_writeback *wb;
WARN_ON(test_bit(WB_registered, &bdi->wb.state));
spin_lock_irq(&cgwb_lock);
-
radix_tree_for_each_slot(slot, &bdi->cgwb_tree, &iter, 0)
cgwb_kill(*slot);
- while ((rbn = rb_first(&bdi->cgwb_congested_tree))) {
- struct bdi_writeback_congested *congested =
- rb_entry(rbn, struct bdi_writeback_congested, rb_node);
-
- rb_erase(rbn, &bdi->cgwb_congested_tree);
- congested->bdi = NULL; /* mark @congested unlinked */
+ while (!list_empty(&bdi->wb_list)) {
+ wb = list_first_entry(&bdi->wb_list, struct bdi_writeback,
+ bdi_node);
+ spin_unlock_irq(&cgwb_lock);
+ wb_shutdown(wb);
+ spin_lock_irq(&cgwb_lock);
}
-
spin_unlock_irq(&cgwb_lock);
-
- /*
- * All cgwb's and their congested states must be shutdown and
- * released before returning. Drain the usage counter to wait for
- * all cgwb's and cgwb_congested's ever created on @bdi.
- */
- atomic_dec(&bdi->usage_cnt);
- wait_event(cgwb_release_wait, !atomic_read(&bdi->usage_cnt));
}
/**
@@ -747,6 +758,28 @@
spin_unlock_irq(&cgwb_lock);
}
+static void cgwb_bdi_exit(struct backing_dev_info *bdi)
+{
+ struct rb_node *rbn;
+
+ spin_lock_irq(&cgwb_lock);
+ while ((rbn = rb_first(&bdi->cgwb_congested_tree))) {
+ struct bdi_writeback_congested *congested =
+ rb_entry(rbn, struct bdi_writeback_congested, rb_node);
+
+ rb_erase(rbn, &bdi->cgwb_congested_tree);
+ congested->__bdi = NULL; /* mark @congested unlinked */
+ }
+ spin_unlock_irq(&cgwb_lock);
+}
+
+static void cgwb_bdi_register(struct backing_dev_info *bdi)
+{
+ spin_lock_irq(&cgwb_lock);
+ list_add_tail_rcu(&bdi->wb.bdi_node, &bdi->wb_list);
+ spin_unlock_irq(&cgwb_lock);
+}
+
#else /* CONFIG_CGROUP_WRITEBACK */
static int cgwb_bdi_init(struct backing_dev_info *bdi)
@@ -767,11 +800,23 @@
return 0;
}
-static void cgwb_bdi_destroy(struct backing_dev_info *bdi)
+static void cgwb_bdi_unregister(struct backing_dev_info *bdi) { }
+
+static void cgwb_bdi_exit(struct backing_dev_info *bdi)
{
wb_congested_put(bdi->wb_congested);
}
+static void cgwb_bdi_register(struct backing_dev_info *bdi)
+{
+ list_add_tail_rcu(&bdi->wb.bdi_node, &bdi->wb_list);
+}
+
+static void cgwb_remove_from_bdi_list(struct bdi_writeback *wb)
+{
+ list_del_rcu(&wb->bdi_node);
+}
+
#endif /* CONFIG_CGROUP_WRITEBACK */
int bdi_init(struct backing_dev_info *bdi)
@@ -780,6 +825,7 @@
bdi->dev = NULL;
+ kref_init(&bdi->refcnt);
bdi->min_ratio = 0;
bdi->max_ratio = 100;
bdi->max_prop_frac = FPROP_FRAC_BASE;
@@ -789,12 +835,26 @@
ret = cgwb_bdi_init(bdi);
- list_add_tail_rcu(&bdi->wb.bdi_node, &bdi->wb_list);
-
return ret;
}
EXPORT_SYMBOL(bdi_init);
+struct backing_dev_info *bdi_alloc_node(gfp_t gfp_mask, int node_id)
+{
+ struct backing_dev_info *bdi;
+
+ bdi = kmalloc_node(sizeof(struct backing_dev_info),
+ gfp_mask | __GFP_ZERO, node_id);
+ if (!bdi)
+ return NULL;
+
+ if (bdi_init(bdi)) {
+ kfree(bdi);
+ return NULL;
+ }
+ return bdi;
+}
+
int bdi_register(struct backing_dev_info *bdi, struct device *parent,
const char *fmt, ...)
{
@@ -810,6 +870,7 @@
if (IS_ERR(dev))
return PTR_ERR(dev);
+ cgwb_bdi_register(bdi);
bdi->dev = dev;
bdi_debug_register(bdi, dev_name(dev));
@@ -838,6 +899,8 @@
MINOR(owner->devt));
if (rc)
return rc;
+ /* Leaking owner reference... */
+ WARN_ON(bdi->owner);
bdi->owner = owner;
get_device(owner);
return 0;
@@ -861,7 +924,7 @@
/* make sure nobody finds us on the bdi_list anymore */
bdi_remove_from_list(bdi);
wb_shutdown(&bdi->wb);
- cgwb_bdi_destroy(bdi);
+ cgwb_bdi_unregister(bdi);
if (bdi->dev) {
bdi_debug_unregister(bdi);
@@ -875,10 +938,25 @@
}
}
-void bdi_exit(struct backing_dev_info *bdi)
+static void bdi_exit(struct backing_dev_info *bdi)
{
WARN_ON_ONCE(bdi->dev);
wb_exit(&bdi->wb);
+ cgwb_bdi_exit(bdi);
+}
+
+static void release_bdi(struct kref *ref)
+{
+ struct backing_dev_info *bdi =
+ container_of(ref, struct backing_dev_info, refcnt);
+
+ bdi_exit(bdi);
+ kfree(bdi);
+}
+
+void bdi_put(struct backing_dev_info *bdi)
+{
+ kref_put(&bdi->refcnt, release_bdi);
}
void bdi_destroy(struct backing_dev_info *bdi)
diff --git a/mm/page-writeback.c b/mm/page-writeback.c
index dd7817cd3..e6fbdf4 100644
--- a/mm/page-writeback.c
+++ b/mm/page-writeback.c
@@ -1987,11 +1987,11 @@
* We want to write everything out, not just down to the dirty
* threshold
*/
- if (!bdi_has_dirty_io(&q->backing_dev_info))
+ if (!bdi_has_dirty_io(q->backing_dev_info))
return;
rcu_read_lock();
- list_for_each_entry_rcu(wb, &q->backing_dev_info.wb_list, bdi_node)
+ list_for_each_entry_rcu(wb, &q->backing_dev_info->wb_list, bdi_node)
if (wb_has_dirty_io(wb))
wb_start_writeback(wb, nr_pages, true,
WB_REASON_LAPTOP_TIMER);
diff --git a/net/rmnet_data/rmnet_data_handlers.c b/net/rmnet_data/rmnet_data_handlers.c
index 50dd516..98b2511 100644
--- a/net/rmnet_data/rmnet_data_handlers.c
+++ b/net/rmnet_data/rmnet_data_handlers.c
@@ -356,6 +356,7 @@
napi = get_current_napi_context();
skb_size = skb->len;
+ skb_get_hash(skb);
gro_res = napi_gro_receive(napi, skb);
trace_rmnet_gro_downlink(gro_res);
rmnet_optional_gro_flush(napi, ep, skb_size);
diff --git a/net/rmnet_data/rmnet_map_data.c b/net/rmnet_data/rmnet_map_data.c
index cc377bb..771a6b7 100644
--- a/net/rmnet_data/rmnet_map_data.c
+++ b/net/rmnet_data/rmnet_map_data.c
@@ -292,7 +292,7 @@
config->agg_count = 1;
getnstimeofday(&config->agg_time);
trace_rmnet_start_aggregation(skb);
- rmnet_kfree_skb(skb, RMNET_STATS_SKBFREE_AGG_CPY_EXPAND);
+ dev_kfree_skb_any(skb);
goto schedule;
}
diff = timespec_sub(config->agg_last, config->agg_time);
@@ -321,7 +321,7 @@
dest_buff = skb_put(config->agg_skb, skb->len);
memcpy(dest_buff, skb->data, skb->len);
config->agg_count++;
- rmnet_kfree_skb(skb, RMNET_STATS_SKBFREE_AGG_INTO_BUFF);
+ dev_kfree_skb_any(skb);
schedule:
if (config->agg_state != RMNET_MAP_TXFER_SCHEDULED) {