Revert "MIPS: Avoid pipeline stalls on some MIPS32R2 cores."
For a discussion, see http://patchwork.linux-mips.org/patch/9539/.
This reverts commit 625c0a21700bdb90844d926a1508a17a77e369c9.
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 7709920..971b1ee 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -512,26 +512,9 @@
case tlb_indexed: tlbw = uasm_i_tlbwi; break;
}
- if (cpu_has_mips_r2_exec_hazard) {
- /*
- * The architecture spec says an ehb is required here,
- * but a number of cores do not have the hazard and
- * using an ehb causes an expensive pipeline stall.
- */
- switch (current_cpu_type()) {
- case CPU_M14KC:
- case CPU_74K:
- case CPU_1074K:
- case CPU_PROAPTIV:
- case CPU_P5600:
- case CPU_M5150:
- case CPU_QEMU_GENERIC:
- break;
-
- default:
+ if (cpu_has_mips_r2_r6) {
+ if (cpu_has_mips_r2_exec_hazard)
uasm_i_ehb(p);
- break;
- }
tlbw(p);
return;
}