| commit | a02cc84a31d3bd46a10546ff7024e7b5a186d339 | [log] [tgz] |
|---|---|---|
| author | Lucas Stach <dev@lynxeye.de> | Mon Feb 29 21:46:06 2016 +0100 |
| committer | Thierry Reding <treding@nvidia.com> | Thu Apr 28 12:41:51 2016 +0200 |
| tree | cf51407240888a2c212593cd89541e97ba88a014 | |
| parent | 926655f929063619b13db8b4f2ef8c9a08605492 [diff] |
clk: tegra: Initialize PLL_C to sane rate on Tegra30 If the bootloader does not touch PLL_C it will stay in its reset state, failing to lock when enabled. This leads to consumers of this clock to fail probing. Fix this by always programming the PLL with a sane rate, which allows it to lock, at startup. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Thierry Reding <treding@nvidia.com>