tree b57a67eab4799e63e7fc699acd7682b8148ebbb8
parent c825dda905bac330c2da7fabdf5c0ac28758b3cd
author Will Deacon <will.deacon@arm.com> 1317999475 +0100
committer Russell King <rmk+kernel@arm.linux.org.uk> 1318064734 +0100

ARM: 7127/1: hw_breakpoint: skip v7-specific reset on v6 cores

ARMv6 cores do not implement the DBGOSLAR register, so we don't need to
try and clear it on boot. Furthermore, the VCR is zeroed out of reset,
so we don't need to zero it explicitly when a CPU comes online.

Tested-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>