| /* Copyright (c) 2017, The Linux Foundation. All rights reserved. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 and |
| * only version 2 as published by the Free Software Foundation. |
| * |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| */ |
| |
| #include "sdm845.dtsi" |
| |
| / { |
| model = "Qualcomm Technologies, Inc. SDM845 V2"; |
| qcom,msm-id = <321 0x20000>; |
| }; |
| |
| &sdhc_2 { |
| qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 |
| 100000000 200000000 4294967295>; |
| qcom,clk-rates = <400000 20000000 25000000 50000000 |
| 100000000 200000000>; |
| qcom,devfreq,freq-table = <50000000 200000000>; |
| /delete-property/ qcom,sdr104-wa; |
| }; |
| |
| /delete-node/ &apc0_cpr; |
| /delete-node/ &apc1_cpr; |
| |
| &soc { |
| /* CPR controller regulators */ |
| apc0_cpr: cprh-ctrl@17dc0000 { |
| compatible = "qcom,cprh-sdm845-v2-kbss-regulator"; |
| reg = <0x17dc0000 0x4000>, |
| <0x00784000 0x1000>, |
| <0x17840000 0x1000>; |
| reg-names = "cpr_ctrl", "fuse_base", "saw"; |
| clocks = <&clock_gcc GCC_CPUSS_RBCPR_CLK>; |
| clock-names = "core_clk"; |
| qcom,cpr-ctrl-name = "apc0"; |
| qcom,cpr-controller-id = <0>; |
| |
| qcom,cpr-sensor-time = <1000>; |
| qcom,cpr-loop-time = <5000000>; |
| qcom,cpr-idle-cycles = <15>; |
| qcom,cpr-up-down-delay-time = <3000>; |
| qcom,cpr-step-quot-init-min = <11>; |
| qcom,cpr-step-quot-init-max = <12>; |
| qcom,cpr-count-mode = <0>; /* All at once */ |
| qcom,cpr-count-repeat = <20>; |
| qcom,cpr-down-error-step-limit = <1>; |
| qcom,cpr-up-error-step-limit = <1>; |
| qcom,cpr-corner-switch-delay-time = <1042>; |
| qcom,cpr-voltage-settling-time = <1760>; |
| qcom,cpr-reset-step-quot-loop-en; |
| |
| qcom,voltage-step = <4000>; |
| qcom,voltage-base = <352000>; |
| qcom,cpr-saw-use-unit-mV; |
| |
| qcom,saw-avs-ctrl = <0x101C031>; |
| qcom,saw-avs-limit = <0x3B803B8>; |
| |
| qcom,cpr-enable; |
| qcom,cpr-hw-closed-loop; |
| |
| qcom,cpr-panic-reg-addr-list = |
| <0x17dc3a84 0x17dc3a88 0x17840c18>; |
| qcom,cpr-panic-reg-name-list = |
| "APSS_SILVER_CPRH_STATUS_0", |
| "APSS_SILVER_CPRH_STATUS_1", |
| "SILVER_SAW4_PMIC_STS"; |
| |
| qcom,cpr-aging-ref-voltage = <952000>; |
| vdd-supply = <&pm8998_s13>; |
| |
| thread@0 { |
| qcom,cpr-thread-id = <0>; |
| qcom,cpr-consecutive-up = <0>; |
| qcom,cpr-consecutive-down = <0>; |
| qcom,cpr-up-threshold = <2>; |
| qcom,cpr-down-threshold = <2>; |
| |
| apc0_pwrcl_vreg: regulator { |
| regulator-name = "apc0_pwrcl_corner"; |
| regulator-min-microvolt = <1>; |
| regulator-max-microvolt = <18>; |
| |
| qcom,cpr-fuse-corners = <4>; |
| qcom,cpr-fuse-combos = <16>; |
| qcom,cpr-speed-bins = <2>; |
| qcom,cpr-speed-bin-corners = <18 18>; |
| qcom,cpr-corners = <18>; |
| |
| qcom,cpr-corner-fmax-map = <6 12 15 18>; |
| |
| qcom,cpr-voltage-ceiling = |
| <828000 828000 828000 828000 828000 |
| 828000 828000 828000 828000 828000 |
| 828000 828000 828000 828000 828000 |
| 884000 952000 952000>; |
| |
| qcom,cpr-voltage-floor = |
| <568000 568000 568000 568000 568000 |
| 568000 568000 568000 568000 568000 |
| 568000 568000 568000 568000 568000 |
| 568000 568000 568000>; |
| |
| qcom,cpr-floor-to-ceiling-max-range = |
| <32000 32000 32000 32000 32000 |
| 32000 32000 32000 32000 32000 |
| 32000 32000 32000 32000 32000 |
| 32000 40000 40000>; |
| |
| qcom,corner-frequencies = |
| <300000000 403200000 480000000 |
| 576000000 652800000 748800000 |
| 825600000 902400000 979200000 |
| 1056000000 1132800000 1228800000 |
| 1324800000 1420800000 1516800000 |
| 1612800000 1689600000 1766400000>; |
| |
| qcom,cpr-ro-scaling-factor = |
| <2594 2795 2576 2761 2469 2673 2198 |
| 2553 3188 3255 3191 2962 3055 2984 |
| 2043 2947>, |
| <2594 2795 2576 2761 2469 2673 2198 |
| 2553 3188 3255 3191 2962 3055 2984 |
| 2043 2947>, |
| <2259 2389 2387 2531 2294 2464 2218 |
| 2476 2525 2855 2817 2836 2740 2490 |
| 1950 2632>, |
| <2259 2389 2387 2531 2294 2464 2218 |
| 2476 2525 2855 2817 2836 2740 2490 |
| 1950 2632>; |
| |
| qcom,cpr-open-loop-voltage-fuse-adjustment = |
| <100000 100000 100000 100000>; |
| |
| qcom,cpr-closed-loop-voltage-fuse-adjustment = |
| <100000 100000 100000 100000>; |
| |
| qcom,allow-voltage-interpolation; |
| qcom,allow-quotient-interpolation; |
| qcom,cpr-scaled-open-loop-voltage-as-ceiling; |
| |
| qcom,cpr-aging-max-voltage-adjustment = <15000>; |
| qcom,cpr-aging-ref-corner = <18>; |
| qcom,cpr-aging-ro-scaling-factor = <1620>; |
| qcom,allow-aging-voltage-adjustment = |
| /* Speed bin 0 */ |
| <0 1 1 1 1 1 1 1>, |
| /* Speed bin 1 */ |
| <0 1 1 1 1 1 1 1>; |
| qcom,allow-aging-open-loop-voltage-adjustment = |
| <1>; |
| }; |
| }; |
| |
| thread@1 { |
| qcom,cpr-thread-id = <1>; |
| qcom,cpr-consecutive-up = <0>; |
| qcom,cpr-consecutive-down = <0>; |
| qcom,cpr-up-threshold = <2>; |
| qcom,cpr-down-threshold = <2>; |
| |
| apc0_l3_vreg: regulator { |
| regulator-name = "apc0_l3_corner"; |
| regulator-min-microvolt = <1>; |
| regulator-max-microvolt = <14>; |
| |
| qcom,cpr-fuse-corners = <4>; |
| qcom,cpr-fuse-combos = <16>; |
| qcom,cpr-speed-bins = <2>; |
| qcom,cpr-speed-bin-corners = <14 14>; |
| qcom,cpr-corners = <14>; |
| |
| qcom,cpr-corner-fmax-map = <4 8 11 14>; |
| |
| qcom,cpr-voltage-ceiling = |
| <828000 828000 828000 828000 828000 |
| 828000 828000 828000 828000 828000 |
| 828000 884000 884000 952000>; |
| |
| qcom,cpr-voltage-floor = |
| <568000 568000 568000 568000 568000 |
| 568000 568000 568000 568000 568000 |
| 568000 568000 568000 568000>; |
| |
| qcom,cpr-floor-to-ceiling-max-range = |
| <32000 32000 32000 32000 32000 |
| 32000 32000 32000 32000 32000 |
| 32000 32000 32000 40000>; |
| |
| qcom,corner-frequencies = |
| <300000000 403200000 480000000 |
| 576000000 652800000 748800000 |
| 844800000 940800000 1036800000 |
| 1132800000 1209600000 1305600000 |
| 1401600000 1478400000>; |
| |
| qcom,cpr-ro-scaling-factor = |
| <2857 3056 2828 2952 2699 2796 2447 |
| 2631 2630 2579 2244 3343 3287 3137 |
| 3164 2656>, |
| <2857 3056 2828 2952 2699 2796 2447 |
| 2631 2630 2579 2244 3343 3287 3137 |
| 3164 2656>, |
| <2439 2577 2552 2667 2461 2577 2394 |
| 2536 2132 2307 2191 2903 2838 2912 |
| 2501 2095>, |
| <2439 2577 2552 2667 2461 2577 2394 |
| 2536 2132 2307 2191 2903 2838 2912 |
| 2501 2095>; |
| |
| qcom,cpr-open-loop-voltage-fuse-adjustment = |
| <100000 100000 100000 100000>; |
| |
| qcom,cpr-closed-loop-voltage-fuse-adjustment = |
| <100000 100000 100000 100000>; |
| |
| qcom,allow-voltage-interpolation; |
| qcom,allow-quotient-interpolation; |
| qcom,cpr-scaled-open-loop-voltage-as-ceiling; |
| |
| qcom,cpr-aging-max-voltage-adjustment = <15000>; |
| qcom,cpr-aging-ref-corner = <14>; |
| qcom,cpr-aging-ro-scaling-factor = <1620>; |
| qcom,allow-aging-voltage-adjustment = |
| /* Speed bin 0 */ |
| <0 1 1 1 1 1 1 1>, |
| /* Speed bin 1 */ |
| <0 1 1 1 1 1 1 1>; |
| qcom,allow-aging-open-loop-voltage-adjustment = |
| <1>; |
| }; |
| }; |
| }; |
| |
| apc1_cpr: cprh-ctrl@17db0000 { |
| compatible = "qcom,cprh-sdm845-v2-kbss-regulator"; |
| reg = <0x17db0000 0x4000>, |
| <0x00784000 0x1000>, |
| <0x17830000 0x1000>; |
| reg-names = "cpr_ctrl", "fuse_base", "saw"; |
| clocks = <&clock_gcc GCC_CPUSS_RBCPR_CLK>; |
| clock-names = "core_clk"; |
| qcom,cpr-ctrl-name = "apc1"; |
| qcom,cpr-controller-id = <1>; |
| |
| qcom,cpr-sensor-time = <1000>; |
| qcom,cpr-loop-time = <5000000>; |
| qcom,cpr-idle-cycles = <15>; |
| qcom,cpr-up-down-delay-time = <3000>; |
| qcom,cpr-step-quot-init-min = <9>; |
| qcom,cpr-step-quot-init-max = <14>; |
| qcom,cpr-count-mode = <0>; /* All at once */ |
| qcom,cpr-count-repeat = <20>; |
| qcom,cpr-down-error-step-limit = <1>; |
| qcom,cpr-up-error-step-limit = <1>; |
| qcom,cpr-corner-switch-delay-time = <1042>; |
| qcom,cpr-voltage-settling-time = <1760>; |
| qcom,cpr-reset-step-quot-loop-en; |
| |
| qcom,apm-threshold-voltage = <800000>; |
| qcom,apm-crossover-voltage = <880000>; |
| qcom,mem-acc-threshold-voltage = <852000>; |
| qcom,mem-acc-crossover-voltage = <852000>; |
| |
| qcom,voltage-step = <4000>; |
| qcom,voltage-base = <352000>; |
| qcom,cpr-saw-use-unit-mV; |
| |
| qcom,saw-avs-ctrl = <0x101C031>; |
| qcom,saw-avs-limit = <0x4700470>; |
| |
| qcom,cpr-enable; |
| qcom,cpr-hw-closed-loop; |
| |
| qcom,cpr-panic-reg-addr-list = |
| <0x17db3a84 0x17830c18>; |
| qcom,cpr-panic-reg-name-list = |
| "APSS_GOLD_CPRH_STATUS_0", "GOLD_SAW4_PMIC_STS"; |
| |
| qcom,cpr-aging-ref-voltage = <1136000>; |
| vdd-supply = <&pm8998_s12>; |
| |
| thread@0 { |
| qcom,cpr-thread-id = <0>; |
| qcom,cpr-consecutive-up = <0>; |
| qcom,cpr-consecutive-down = <0>; |
| qcom,cpr-up-threshold = <2>; |
| qcom,cpr-down-threshold = <2>; |
| |
| apc1_perfcl_vreg: regulator { |
| regulator-name = "apc1_perfcl_corner"; |
| regulator-min-microvolt = <1>; |
| regulator-max-microvolt = <33>; |
| |
| qcom,cpr-fuse-corners = <5>; |
| qcom,cpr-fuse-combos = <16>; |
| qcom,cpr-speed-bins = <2>; |
| qcom,cpr-speed-bin-corners = <28 31>; |
| qcom,cpr-corners = |
| /* Speed bin 0 */ |
| <28 28 28 28 28 28 28 28>, |
| /* Speed bin 1 */ |
| <31 31 31 31 31 31 31 31>; |
| |
| qcom,cpr-corner-fmax-map = |
| /* Speed bin 0 */ |
| <7 14 22 27 28>, |
| /* Speed bin 1 */ |
| <7 14 22 27 31>; |
| |
| qcom,cpr-voltage-ceiling = |
| /* Speed bin 0 */ |
| <828000 828000 828000 828000 828000 |
| 828000 828000 828000 828000 828000 |
| 828000 828000 828000 828000 828000 |
| 828000 828000 828000 884000 884000 |
| 884000 884000 1104000 1104000 1104000 |
| 1104000 1136000 1136000>, |
| /* Speed bin 1 */ |
| <828000 828000 828000 828000 828000 |
| 828000 828000 828000 828000 828000 |
| 828000 828000 828000 828000 828000 |
| 828000 828000 828000 884000 884000 |
| 884000 884000 1104000 1104000 1104000 |
| 1104000 1136000 1136000 1136000 1136000 |
| 1136000>; |
| |
| qcom,cpr-voltage-floor = |
| /* Speed bin 0 */ |
| <568000 568000 568000 568000 568000 |
| 568000 568000 568000 568000 568000 |
| 568000 568000 568000 568000 568000 |
| 568000 568000 568000 568000 568000 |
| 568000 568000 568000 568000 568000 |
| 568000 568000 568000>, |
| /* Speed bin 1 */ |
| <568000 568000 568000 568000 568000 |
| 568000 568000 568000 568000 568000 |
| 568000 568000 568000 568000 568000 |
| 568000 568000 568000 568000 568000 |
| 568000 568000 568000 568000 568000 |
| 568000 568000 568000 568000 568000 |
| 568000>; |
| |
| qcom,cpr-floor-to-ceiling-max-range = |
| /* Speed bin 0 */ |
| <32000 32000 32000 32000 32000 |
| 32000 32000 32000 32000 32000 |
| 32000 32000 32000 32000 32000 |
| 32000 32000 32000 32000 32000 |
| 32000 32000 32000 32000 32000 |
| 32000 32000 32000>, |
| /* Speed bin 1 */ |
| <32000 32000 32000 32000 32000 |
| 32000 32000 32000 32000 32000 |
| 32000 32000 32000 32000 32000 |
| 32000 32000 32000 32000 32000 |
| 32000 32000 32000 32000 32000 |
| 32000 32000 40000 40000 40000 |
| 40000>; |
| |
| qcom,corner-frequencies = |
| /* Speed bin 0 */ |
| <300000000 403200000 480000000 |
| 576000000 652800000 748800000 |
| 825600000 902400000 979200000 |
| 1056000000 1132800000 1209600000 |
| 1286400000 1363200000 1459200000 |
| 1536000000 1612800000 1689600000 |
| 1766400000 1843200000 1920000000 |
| 1996800000 2092800000 2169600000 |
| 2246400000 2323200000 2400000000 |
| 2400000000>, |
| /* Speed bin 1 */ |
| <300000000 403200000 480000000 |
| 576000000 652800000 748800000 |
| 825600000 902400000 979200000 |
| 1056000000 1132800000 1209600000 |
| 1286400000 1363200000 1459200000 |
| 1536000000 1612800000 1689600000 |
| 1766400000 1843200000 1920000000 |
| 1996800000 2092800000 2169600000 |
| 2246400000 2323200000 2400000000 |
| 2476800000 2553600000 2630400000 |
| 2707200000>; |
| |
| qcom,cpr-ro-scaling-factor = |
| <2857 3056 2828 2952 2699 2796 2447 |
| 2631 2630 2579 2244 3343 3287 3137 |
| 3164 2656>, |
| <2857 3056 2828 2952 2699 2796 2447 |
| 2631 2630 2579 2244 3343 3287 3137 |
| 3164 2656>, |
| <2086 2208 2273 2408 2203 2327 2213 |
| 2340 1755 2039 2049 2474 2437 2618 |
| 2003 1675>, |
| <2086 2208 2273 2408 2203 2327 2213 |
| 2340 1755 2039 2049 2474 2437 2618 |
| 2003 1675>, |
| <2086 2208 2273 2408 2203 2327 2213 |
| 2340 1755 2039 2049 2474 2437 2618 |
| 2003 1675>; |
| |
| qcom,cpr-open-loop-voltage-fuse-adjustment = |
| <100000 100000 100000 100000 100000>; |
| |
| qcom,cpr-closed-loop-voltage-fuse-adjustment = |
| <100000 100000 100000 100000 100000>; |
| |
| qcom,allow-voltage-interpolation; |
| qcom,allow-quotient-interpolation; |
| qcom,cpr-scaled-open-loop-voltage-as-ceiling; |
| |
| qcom,cpr-aging-max-voltage-adjustment = <15000>; |
| qcom,cpr-aging-ref-corner = <27 31>; |
| qcom,cpr-aging-ro-scaling-factor = <1700>; |
| qcom,allow-aging-voltage-adjustment = |
| /* Speed bin 0 */ |
| <0 1 1 1 1 1 1 1>, |
| /* Speed bin 1 */ |
| <0 1 1 1 1 1 1 1>; |
| qcom,allow-aging-open-loop-voltage-adjustment = |
| <1>; |
| }; |
| }; |
| }; |
| }; |
| |
| &clock_cpucc { |
| compatible = "qcom,clk-cpu-osm-v2"; |
| |
| vdd-l3-supply = <&apc0_l3_vreg>; |
| vdd-pwrcl-supply = <&apc0_pwrcl_vreg>; |
| vdd-perfcl-supply = <&apc1_perfcl_vreg>; |
| |
| qcom,l3-speedbin0-v0 = |
| < 300000000 0x000c000f 0x00002020 0x1 1 >, |
| < 403200000 0x500c0115 0x00002020 0x1 2 >, |
| < 480000000 0x50140219 0x00002020 0x1 3 >, |
| < 576000000 0x5014031e 0x00002020 0x1 4 >, |
| < 652800000 0x401c0422 0x00002020 0x1 5 >, |
| < 748800000 0x401c0527 0x00002020 0x1 6 >, |
| < 844800000 0x4024062c 0x00002323 0x2 7 >, |
| < 940800000 0x40240731 0x00002727 0x2 8 >, |
| < 1036800000 0x40240836 0x00002b2b 0x2 9 >, |
| < 1132800000 0x402c093b 0x00002f2f 0x2 10 >, |
| < 1209600000 0x402c0a3f 0x00003232 0x2 11 >, |
| < 1305600000 0x40340b44 0x00003636 0x2 12 >, |
| < 1401600000 0x40340c49 0x00003a3a 0x2 13 >, |
| < 1478400000 0x403c0d4d 0x00003e3e 0x2 14 >; |
| |
| qcom,pwrcl-speedbin0-v0 = |
| < 300000000 0x000c000f 0x00002020 0x1 1 >, |
| < 403200000 0x500c0115 0x00002020 0x1 2 >, |
| < 480000000 0x50140219 0x00002020 0x1 3 >, |
| < 576000000 0x5014031e 0x00002020 0x1 4 >, |
| < 652800000 0x401c0422 0x00002020 0x1 5 >, |
| < 748800000 0x401c0527 0x00002020 0x1 6 >, |
| < 825600000 0x401c062b 0x00002222 0x1 7 >, |
| < 902400000 0x4024072f 0x00002626 0x1 8 >, |
| < 979200000 0x40240833 0x00002929 0x1 9 >, |
| < 1056000000 0x402c0937 0x00002c2c 0x2 10 >, |
| < 1132800000 0x402c0a3b 0x00002f2f 0x2 11 >, |
| < 1228800000 0x402c0b40 0x00003333 0x2 12 >, |
| < 1324800000 0x40340c45 0x00003737 0x2 13 >, |
| < 1420800000 0x40340d4a 0x00003b3b 0x2 14 >, |
| < 1516800000 0x403c0e4f 0x00003f3f 0x2 15 >, |
| < 1612800000 0x403c0f54 0x00004343 0x2 16 >, |
| < 1689600000 0x40441058 0x00004646 0x2 17 >, |
| < 1766400000 0x4044115c 0x00004a4a 0x2 18 >; |
| |
| qcom,perfcl-speedbin0-v0 = |
| < 300000000 0x000c000f 0x00002020 0x1 1 >, |
| < 403200000 0x500c0115 0x00002020 0x1 2 >, |
| < 480000000 0x50140219 0x00002020 0x1 3 >, |
| < 576000000 0x5014031e 0x00002020 0x1 4 >, |
| < 652800000 0x401c0422 0x00002020 0x1 5 >, |
| < 748800000 0x401c0527 0x00002020 0x1 6 >, |
| < 825600000 0x401c062b 0x00002222 0x1 7 >, |
| < 902400000 0x4024072f 0x00002626 0x1 8 >, |
| < 979200000 0x40240833 0x00002929 0x1 9 >, |
| < 1056000000 0x402c0937 0x00002c2c 0x1 10 >, |
| < 1132800000 0x402c0a3b 0x00002f2f 0x1 11 >, |
| < 1209600000 0x402c0b3f 0x00003232 0x2 12 >, |
| < 1286400000 0x40340c43 0x00003636 0x2 13 >, |
| < 1363200000 0x40340d47 0x00003939 0x2 14 >, |
| < 1459200000 0x403c0e4c 0x00003d3d 0x2 15 >, |
| < 1536000000 0x403c0f50 0x00004040 0x2 16 >, |
| < 1612800000 0x403c1054 0x00004343 0x2 17 >, |
| < 1689600000 0x40441158 0x00004646 0x2 18 >, |
| < 1766400000 0x4044125c 0x00004a4a 0x2 19 >, |
| < 1843200000 0x40441360 0x00004d4d 0x2 20 >, |
| < 1920000000 0x404c1464 0x00005050 0x2 21 >, |
| < 1996800000 0x404c1568 0x00005353 0x2 22 >, |
| < 2092800000 0x4054166d 0x00005757 0x2 23 >, |
| < 2169600000 0x40541771 0x00005a5a 0x2 24 >, |
| < 2246400000 0x40541875 0x00005e5e 0x2 25 >, |
| < 2323200000 0x40541979 0x00006161 0x2 26 >, |
| < 2400000000 0x40541a7d 0x00006464 0x2 27 >; |
| |
| qcom,perfcl-speedbin1-v0 = |
| < 300000000 0x000c000f 0x00002020 0x1 1 >, |
| < 403200000 0x500c0115 0x00002020 0x1 2 >, |
| < 480000000 0x50140219 0x00002020 0x1 3 >, |
| < 576000000 0x5014031e 0x00002020 0x1 4 >, |
| < 652800000 0x401c0422 0x00002020 0x1 5 >, |
| < 748800000 0x401c0527 0x00002020 0x1 6 >, |
| < 825600000 0x401c062b 0x00002222 0x1 7 >, |
| < 902400000 0x4024072f 0x00002626 0x1 8 >, |
| < 979200000 0x40240833 0x00002929 0x1 9 >, |
| < 1056000000 0x402c0937 0x00002c2c 0x1 10 >, |
| < 1132800000 0x402c0a3b 0x00002f2f 0x1 11 >, |
| < 1209600000 0x402c0b3f 0x00003232 0x2 12 >, |
| < 1286400000 0x40340c43 0x00003636 0x2 13 >, |
| < 1363200000 0x40340d47 0x00003939 0x2 14 >, |
| < 1459200000 0x403c0e4c 0x00003d3d 0x2 15 >, |
| < 1536000000 0x403c0f50 0x00004040 0x2 16 >, |
| < 1612800000 0x403c1054 0x00004343 0x2 17 >, |
| < 1689600000 0x40441158 0x00004646 0x2 18 >, |
| < 1766400000 0x4044125c 0x00004a4a 0x2 19 >, |
| < 1843200000 0x40441360 0x00004d4d 0x2 20 >, |
| < 1920000000 0x404c1464 0x00005050 0x2 21 >, |
| < 1996800000 0x404c1568 0x00005353 0x2 22 >, |
| < 2092800000 0x4054166d 0x00005757 0x2 23 >, |
| < 2169600000 0x40541771 0x00005a5a 0x2 24 >, |
| < 2246400000 0x40541875 0x00005e5e 0x2 25 >, |
| < 2323200000 0x40541979 0x00006161 0x2 26 >, |
| < 2400000000 0x40541a7d 0x00006464 0x2 27 >, |
| < 2476800000 0x40541b81 0x00006767 0x2 28 >, |
| < 2553600000 0x40541c85 0x00006a6a 0x2 29 >, |
| < 2630400000 0x40541d89 0x00006e6e 0x2 30 >, |
| < 2707200000 0x40541e8d 0x00007171 0x2 31 >; |
| }; |
| |
| &clock_gcc { |
| compatible = "qcom,gcc-sdm845-v2"; |
| }; |
| |
| &clock_camcc { |
| compatible = "qcom,cam_cc-sdm845-v2"; |
| }; |
| |
| &clock_dispcc { |
| compatible = "qcom,dispcc-sdm845-v2"; |
| }; |
| |
| &clock_videocc { |
| compatible = "qcom,video_cc-sdm845-v2"; |
| }; |
| |
| &msm_vidc { |
| qcom,allowed-clock-rates = <100000000 200000000 330000000 |
| 404000000 444000000 533000000>; |
| }; |
| |
| &spss_utils { |
| qcom,spss-dev-firmware-name = "spss2d"; /* 8 chars max */ |
| qcom,spss-test-firmware-name = "spss2t"; /* 8 chars max */ |
| qcom,spss-prod-firmware-name = "spss2p"; /* 8 chars max */ |
| }; |