| commit | 923587aafc2c41ed516d39651d5750ea402cfc06 | [log] [tgz] |
|---|---|---|
| author | Jose Abreu <Jose.Abreu@synopsys.com> | Mon May 02 10:39:05 2016 +0100 |
| committer | Stephen Boyd <sboyd@codeaurora.org> | Fri May 06 10:35:04 2016 -0700 |
| tree | 533a48d7ef3592984d117786b7de2900a1abf554 | |
| parent | c47265ad64fa793657ce7ecf1a8f636c794e9f40 [diff] |
clk/axs10x: Add I2S PLL clock driver The ARC SDP I2S clock can be programmed using a specific PLL. This patch has the goal of adding a clock driver that programs this PLL. At this moment the rate values are hardcoded in a table but in the future it would be ideal to use a function which determines the PLL values given the desired rate. Signed-off-by: Jose Abreu <joabreu@synopsys.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>