| commit | a4ca2b2fe7252032022d14b4efd462161c91165b | [log] [tgz] |
|---|---|---|
| author | Bill Huang <bilhuang@nvidia.com> | Thu Jun 18 17:28:38 2015 -0400 |
| committer | Thierry Reding <treding@nvidia.com> | Thu Dec 17 13:37:57 2015 +0100 |
| tree | b7752b39cefa957f4e0cbc6821df27c5916d6f5a | |
| parent | afff455cf4f2501d30446eefbfd0aecb14b8a0b8 [diff] |
clk: tegra: Fix WARN_ON in PLL_RE registration This fixes two things. - Read the correct IDDQ register - Check the correct IDDQ bit position Signed-off-by: Bill Huang <bilhuang@nvidia.com> Reviewed-by: Benson Leung <bleung@chromium.org> Signed-off-by: Rhyland Klein <rklein@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>