msm: kgsl: Dump the CP mem pool debug data in A6XX
Add the CP mem pool debug data to the A6XX snapshot.
Change-Id: I294896555c6a17a0b78e5ab3b0355c6ac9355867
Signed-off-by: Lynus Vaz <lvaz@codeaurora.org>
diff --git a/drivers/gpu/msm/a6xx_reg.h b/drivers/gpu/msm/a6xx_reg.h
index c0e01df..2639c49 100644
--- a/drivers/gpu/msm/a6xx_reg.h
+++ b/drivers/gpu/msm/a6xx_reg.h
@@ -80,6 +80,8 @@
#define A6XX_CP_DRAW_STATE_DATA 0x90B
#define A6XX_CP_ROQ_DBG_ADDR 0x90C
#define A6XX_CP_ROQ_DBG_DATA 0x90D
+#define A6XX_CP_MEM_POOL_DBG_ADDR 0x90E
+#define A6XX_CP_MEM_POOL_DBG_DATA 0x90F
#define A6XX_CP_SQE_UCODE_DBG_ADDR 0x910
#define A6XX_CP_SQE_UCODE_DBG_DATA 0x911
#define A6XX_CP_IB1_BASE 0x928
diff --git a/drivers/gpu/msm/adreno_a6xx_snapshot.c b/drivers/gpu/msm/adreno_a6xx_snapshot.c
index cccce12..e82975e 100644
--- a/drivers/gpu/msm/adreno_a6xx_snapshot.c
+++ b/drivers/gpu/msm/adreno_a6xx_snapshot.c
@@ -565,6 +565,23 @@
}
}
+static void a6xx_snapshot_mempool(struct kgsl_device *device,
+ struct kgsl_snapshot *snapshot)
+{
+ unsigned int pool_size;
+
+ /* Save the mempool size to 0 to stabilize it while dumping */
+ kgsl_regread(device, A6XX_CP_MEM_POOL_SIZE, &pool_size);
+ kgsl_regwrite(device, A6XX_CP_MEM_POOL_SIZE, 0);
+
+ kgsl_snapshot_indexed_registers(device, snapshot,
+ A6XX_CP_MEM_POOL_DBG_ADDR, A6XX_CP_MEM_POOL_DBG_DATA,
+ 0, 0x2060);
+
+ /* Restore the saved mempool size */
+ kgsl_regwrite(device, A6XX_CP_MEM_POOL_SIZE, pool_size);
+}
+
static inline unsigned int a6xx_read_dbgahb(struct kgsl_device *device,
unsigned int regbase, unsigned int reg)
{
@@ -1022,6 +1039,9 @@
snapshot, adreno_snapshot_cp_roq,
&snap_data->sect_sizes->roq);
+ /* Mempool debug data */
+ a6xx_snapshot_mempool(device, snapshot);
+
/* Shader memory */
a6xx_snapshot_shader(device, snapshot);