commit a59e385eacd920222756a23c113444fe3063cf81
author Zhao Yakui <yakui.zhao@intel.com> Wed Jan 06 22:05:57 2010 +0800
committer Eric Anholt <eric@anholt.net> Thu Jan 07 10:26:45 2010 -0800
tree 06e15264708e55578efeabf608ffe6805564446d
parent ddc9003c357d1ce10be6ec91bdb8df8ea836087d

drm/i915: Fix Ironlake M/N/P ranges to match the spec

Without this fix, some modes couldn't find appropriate clocks.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Tested-by: Matthew Garrett <mjg@redhat.com>

drivers/gpu/drm/i915/intel_display.c

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 0cf44d6..42e8c03 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -241,11 +241,11 @@
 #define IRONLAKE_VCO_MIN         1760000
 #define IRONLAKE_VCO_MAX         3510000
 #define IRONLAKE_N_MIN           1
-#define IRONLAKE_N_MAX           5
+#define IRONLAKE_N_MAX           6
 #define IRONLAKE_M_MIN           79
-#define IRONLAKE_M_MAX           118
+#define IRONLAKE_M_MAX           127
 #define IRONLAKE_M1_MIN          12
-#define IRONLAKE_M1_MAX          23
+#define IRONLAKE_M1_MAX          22
 #define IRONLAKE_M2_MIN          5
 #define IRONLAKE_M2_MAX          9
 #define IRONLAKE_P_SDVO_DAC_MIN  5