diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index f921235..235d451 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -133,6 +133,7 @@
 	select DMA_NONCOHERENT
 	select SYS_HAS_EARLY_PRINTK
 	select HW_HAS_PCI
+	select IRQ_CPU
 	select PCI_GT64XXX_PCI0
 	select MIPS_NILE4
 	select R5000_CPU_SCACHE
diff --git a/arch/mips/lasat/interrupt.c b/arch/mips/lasat/interrupt.c
index 5f35289..ba9692b 100644
--- a/arch/mips/lasat/interrupt.c
+++ b/arch/mips/lasat/interrupt.c
@@ -26,6 +26,7 @@
 #include <linux/kernel_stat.h>
 
 #include <asm/bootinfo.h>
+#include <asm/irq_cpu.h>
 #include <asm/lasat/lasatint.h>
 #include <asm/time.h>
 #include <asm/gdb-stub.h>
@@ -88,7 +89,7 @@
 	int irq;
 
 	if (cause & CAUSEF_IP7) {	/* R4000 count / compare IRQ */
-		ll_timer_interrupt(7);
+		do_IRQ(7);
 		return;
 	}
 
@@ -96,7 +97,7 @@
 
 	/* if int_status == 0, then the interrupt has already been cleared */
 	if (int_status) {
-		irq = ls1bit32(int_status);
+		irq = LASATINT_BASE + ls1bit32(int_status);
 
 		do_IRQ(irq);
 	}
@@ -125,6 +126,7 @@
 		panic("arch_init_irq: mips_machtype incorrect");
 	}
 
-	for (i = 0; i <= LASATINT_END; i++)
+	mips_cpu_irq_init();
+	for (i = LASATINT_BASE; i <= LASATINT_END; i++)
 		set_irq_chip_and_handler(i, &lasat_irq_type, handle_level_irq);
 }
diff --git a/arch/mips/pci/pci-lasat.c b/arch/mips/pci/pci-lasat.c
index 5abd5c7..174f314 100644
--- a/arch/mips/pci/pci-lasat.c
+++ b/arch/mips/pci/pci-lasat.c
@@ -10,6 +10,7 @@
 #include <linux/pci.h>
 #include <linux/types.h>
 #include <asm/bootinfo.h>
+#include <asm/lasat/lasatint.h>
 
 extern struct pci_ops nile4_pci_ops;
 extern struct pci_ops gt64xxx_pci0_ops;
@@ -54,15 +55,15 @@
 
 arch_initcall(lasat_pci_setup);
 
-#define LASATINT_ETH1   0
-#define LASATINT_ETH0   1
-#define LASATINT_HDC    2
-#define LASATINT_COMP   3
-#define LASATINT_HDLC   4
-#define LASATINT_PCIA   5
-#define LASATINT_PCIB   6
-#define LASATINT_PCIC   7
-#define LASATINT_PCID   8
+#define LASATINT_ETH1   (LASATINT_BASE + 0)
+#define LASATINT_ETH0   (LASATINT_BASE + 1)
+#define LASATINT_HDC    (LASATINT_BASE + 2)
+#define LASATINT_COMP   (LASATINT_BASE + 3)
+#define LASATINT_HDLC   (LASATINT_BASE + 4)
+#define LASATINT_PCIA   (LASATINT_BASE + 5)
+#define LASATINT_PCIB   (LASATINT_BASE + 6)
+#define LASATINT_PCIC   (LASATINT_BASE + 7)
+#define LASATINT_PCID   (LASATINT_BASE + 8)
 
 int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {