tree 81015370d5ad0f15546dc35767a25f3c54cf7bab
parent d60179abbffc5c3e23d326afcb0b36206cb04316
author Ramprasad Katkam <katkam@codeaurora.org> 1494943575 +0530
committer Banajit Goswami <bgoswami@codeaurora.org> 1497373322 -0700

ASoC: sdm660_cdc: Add writeable registers for Dig_cdc and sdw codec regmap

Add Writeable registers list for Digital codec and soundwire codec
regmap config to avoid invalid register access during reg_cache_sync.
Ensure digital codec clock is enabled before regcache sync to avoid
AHB access errors.Modify mutex use to avoid clock disabling during
regmap register access.

Change-Id: I8ab84f80298e01d145395f1347352afe5cfbcc9e
Signed-off-by: Ramprasad Katkam <katkam@codeaurora.org>