Merge "msm: ipa3: Fix some of IPA register names"
diff --git a/drivers/platform/msm/ipa/ipa_v3/ipa_utils.c b/drivers/platform/msm/ipa/ipa_v3/ipa_utils.c
index 61c81cd..554023e 100644
--- a/drivers/platform/msm/ipa/ipa_v3/ipa_utils.c
+++ b/drivers/platform/msm/ipa/ipa_v3/ipa_utils.c
@@ -5417,7 +5417,7 @@
* Before configuring the FIFOs need to unset bit 30 in the
* spare register
*/
- ipahal_write_reg(IPA_SPARE_REG_1_OFST,
+ ipahal_write_reg(IPA_SPARE_REG_1,
(IPA_SPARE_REG_1_VAL & (~(1 << 30))));
/* setup IPA_ENDP_GSI_CFG_TLV_n reg */
@@ -5434,7 +5434,7 @@
IPADBG("Config is true");
reg_val = (gsi_ep_info_cfg->ipa_if_tlv << 16) + start;
start += gsi_ep_info_cfg->ipa_if_tlv;
- ipahal_write_reg_n(IPA_ENDP_GSI_CFG_TLV_OFST_n, i, reg_val);
+ ipahal_write_reg_n(IPA_ENDP_GSI_CFG_TLV_n, i, reg_val);
}
/* setup IPA_ENDP_GSI_CFG_AOS_n reg */
@@ -5446,7 +5446,7 @@
continue;
reg_val = (gsi_ep_info_cfg->ipa_if_aos << 16) + start;
start += gsi_ep_info_cfg->ipa_if_aos;
- ipahal_write_reg_n(IPA_ENDP_GSI_CFG_AOS_OFST_n, i, reg_val);
+ ipahal_write_reg_n(IPA_ENDP_GSI_CFG_AOS_n, i, reg_val);
}
/* setup IPA_ENDP_GSI_CFG1_n reg */
@@ -5458,7 +5458,7 @@
reg_val = (1 << 16) +
((u32)gsi_ep_info_cfg->ipa_gsi_chan_num << 8) +
gsi_ep_info_cfg->ee;
- ipahal_write_reg_n(IPA_ENDP_GSI_CFG1_OFST_n, i, reg_val);
+ ipahal_write_reg_n(IPA_ENDP_GSI_CFG1_n, i, reg_val);
}
/*
@@ -5471,16 +5471,16 @@
if (!gsi_ep_info_cfg)
continue;
reg_val = 1 << 31;
- ipahal_write_reg_n(IPA_ENDP_GSI_CFG2_OFST_n, i, reg_val);
+ ipahal_write_reg_n(IPA_ENDP_GSI_CFG2_n, i, reg_val);
reg_val = 0;
- ipahal_write_reg_n(IPA_ENDP_GSI_CFG2_OFST_n, i, reg_val);
+ ipahal_write_reg_n(IPA_ENDP_GSI_CFG2_n, i, reg_val);
}
/*
* After configuring the FIFOs need to set bit 30 in the spare
* register
*/
- ipahal_write_reg(IPA_SPARE_REG_1_OFST,
+ ipahal_write_reg(IPA_SPARE_REG_1,
(IPA_SPARE_REG_1_VAL | (1 << 30)));
}
diff --git a/drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_reg.c b/drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_reg.c
index 38132d2..cc70ac1 100644
--- a/drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_reg.c
+++ b/drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_reg.c
@@ -134,11 +134,10 @@
__stringify(IPA_MBIM_DEAGGR_FEC_ATTR_EE_n),
__stringify(IPA_GEN_DEAGGR_FEC_ATTR_EE_n),
__stringify(IPA_GSI_CONF),
- __stringify(IPA_ENDP_GSI_CFG1_OFST_n),
- __stringify(IPA_ENDP_GSI_CFG2_OFST_n),
- __stringify(IPA_ENDP_GSI_CFG_AOS_OFST_n),
- __stringify(IPA_ENDP_GSI_CFG_TLV_OFST_n),
- __stringify(IPA_SPARE_REG_1_OFST),
+ __stringify(IPA_ENDP_GSI_CFG1_n),
+ __stringify(IPA_ENDP_GSI_CFG2_n),
+ __stringify(IPA_ENDP_GSI_CFG_AOS_n),
+ __stringify(IPA_ENDP_GSI_CFG_TLV_n),
};
static void ipareg_construct_dummy(enum ipahal_reg_name reg,
@@ -1980,21 +1979,18 @@
[IPA_HW_v3_5][IPA_GSI_CONF] = {
ipareg_construct_dummy, ipareg_parse_dummy,
0x00002790, 0x0, 0, 0, 0 },
- [IPA_HW_v3_5][IPA_ENDP_GSI_CFG1_OFST_n] = {
+ [IPA_HW_v3_5][IPA_ENDP_GSI_CFG1_n] = {
ipareg_construct_dummy, ipareg_parse_dummy,
0x00002794, 0x4, 0, 0, 0 },
- [IPA_HW_v3_5][IPA_ENDP_GSI_CFG2_OFST_n] = {
+ [IPA_HW_v3_5][IPA_ENDP_GSI_CFG2_n] = {
ipareg_construct_dummy, ipareg_parse_dummy,
0x00002A2C, 0x4, 0, 0, 0 },
- [IPA_HW_v3_5][IPA_ENDP_GSI_CFG_AOS_OFST_n] = {
+ [IPA_HW_v3_5][IPA_ENDP_GSI_CFG_AOS_n] = {
ipareg_construct_dummy, ipareg_parse_dummy,
0x000029A8, 0x4, 0, 0, 0 },
- [IPA_HW_v3_5][IPA_ENDP_GSI_CFG_TLV_OFST_n] = {
+ [IPA_HW_v3_5][IPA_ENDP_GSI_CFG_TLV_n] = {
ipareg_construct_dummy, ipareg_parse_dummy,
0x00002924, 0x4, 0, 0, 0 },
- [IPA_HW_v3_5][IPA_SPARE_REG_1_OFST] = {
- ipareg_construct_dummy, ipareg_parse_dummy,
- 0x00002780, 0x0, 0, 0, 0 },
/* IPAv4.0 */
[IPA_HW_v4_0][IPA_IRQ_SUSPEND_INFO_EE_n] = {
diff --git a/drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_reg.h b/drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_reg.h
index da5bbbf..ea741ba 100644
--- a/drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_reg.h
+++ b/drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_reg.h
@@ -135,11 +135,10 @@
IPA_MBIM_DEAGGR_FEC_ATTR_EE_n,
IPA_GEN_DEAGGR_FEC_ATTR_EE_n,
IPA_GSI_CONF,
- IPA_ENDP_GSI_CFG1_OFST_n,
- IPA_ENDP_GSI_CFG2_OFST_n,
- IPA_ENDP_GSI_CFG_AOS_OFST_n,
- IPA_ENDP_GSI_CFG_TLV_OFST_n,
- IPA_SPARE_REG_1_OFST,
+ IPA_ENDP_GSI_CFG1_n,
+ IPA_ENDP_GSI_CFG2_n,
+ IPA_ENDP_GSI_CFG_AOS_n,
+ IPA_ENDP_GSI_CFG_TLV_n,
IPA_REG_MAX,
};