[POWERPC] Spelling fixes: arch/ppc/
Spelling fixes in arch/ppc/.
Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
Signed-off-by: Paul Mackerras <paulus@samba.org>
diff --git a/arch/ppc/syslib/harrier.c b/arch/ppc/syslib/harrier.c
index c1583f4..45b797b 100644
--- a/arch/ppc/syslib/harrier.c
+++ b/arch/ppc/syslib/harrier.c
@@ -210,7 +210,7 @@
* This assumes that PPCBug has initialized the memory controller (SMC)
* on the Harrier correctly (i.e., it does no sanity checking).
* It also assumes that the memory base registers are set to configure the
- * memory as contigous starting with "RAM A BASE", "RAM B BASE", etc.
+ * memory as contiguous starting with "RAM A BASE", "RAM B BASE", etc.
* however, RAM base registers can be skipped (e.g. A, B, C are set,
* D is skipped but E is set is okay).
*/
diff --git a/arch/ppc/syslib/hawk_common.c b/arch/ppc/syslib/hawk_common.c
index c5bf16b..86821d8 100644
--- a/arch/ppc/syslib/hawk_common.c
+++ b/arch/ppc/syslib/hawk_common.c
@@ -165,7 +165,7 @@
processor_pci_mem_start +
hose->mem_space.start) | 0x0);
- /* Map MPIC into vitual memory */
+ /* Map MPIC into virtual memory */
OpenPIC_Addr = ioremap(processor_mpic_base, HAWK_MPIC_SIZE);
return 0;
@@ -176,7 +176,7 @@
* This assumes that PPCBug has initialized the memory controller (SMC)
* on the Falcon/HAWK correctly (i.e., it does no sanity checking).
* It also assumes that the memory base registers are set to configure the
- * memory as contigous starting with "RAM A BASE", "RAM B BASE", etc.
+ * memory as contiguous starting with "RAM A BASE", "RAM B BASE", etc.
* however, RAM base registers can be skipped (e.g. A, B, C are set,
* D is skipped but E is set is okay).
*/
diff --git a/arch/ppc/syslib/m82xx_pci.c b/arch/ppc/syslib/m82xx_pci.c
index e3b586b..fe860d5 100644
--- a/arch/ppc/syslib/m82xx_pci.c
+++ b/arch/ppc/syslib/m82xx_pci.c
@@ -197,7 +197,7 @@
CPM high 0b0000
CPM middle 0b0001
CPM low 0b0010
- PCI reguest 0b0011
+ PCI request 0b0011
Reserved 0b0100
Reserved 0b0101
Internal Core 0b0110
diff --git a/arch/ppc/syslib/mpc10x_common.c b/arch/ppc/syslib/mpc10x_common.c
index 2fc7c41..437a294 100644
--- a/arch/ppc/syslib/mpc10x_common.c
+++ b/arch/ppc/syslib/mpc10x_common.c
@@ -432,7 +432,7 @@
phys_eumb_base);
}
- /* IRQ's are determined at runtime */
+ /* IRQs are determined at runtime */
ppc_sys_platform_devices[MPC10X_IIC1].resource[1].start = MPC10X_I2C_IRQ;
ppc_sys_platform_devices[MPC10X_IIC1].resource[1].end = MPC10X_I2C_IRQ;
ppc_sys_platform_devices[MPC10X_DMA0].resource[1].start = MPC10X_DMA0_IRQ;
@@ -646,7 +646,7 @@
openpic_set_sources(EPIC_IRQ_BASE, 3, OpenPIC_Addr + 0x11020);
/* Skip reserved space and map Message Unit Interrupt (I2O) */
openpic_set_sources(EPIC_IRQ_BASE + 3, 1, OpenPIC_Addr + 0x110C0);
- /* Skip reserved space and map Serial Interupts */
+ /* Skip reserved space and map Serial Interrupts */
openpic_set_sources(EPIC_IRQ_BASE + 4, 2, OpenPIC_Addr + 0x11120);
openpic_init(NUM_8259_INTERRUPTS);
diff --git a/arch/ppc/syslib/mpc52xx_setup.c b/arch/ppc/syslib/mpc52xx_setup.c
index 80c6090..ecfa2c0 100644
--- a/arch/ppc/syslib/mpc52xx_setup.c
+++ b/arch/ppc/syslib/mpc52xx_setup.c
@@ -252,7 +252,7 @@
out_be32(&xlb->snoop_window, MPC52xx_PCI_TARGET_MEM | 0x1d);
/* Disable XLB pipelining */
- /* (cfr errate 292. We could do this only just before ATA PIO
+ /* (cfr errata 292. We could do this only just before ATA PIO
transaction and re-enable it after ...) */
out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_PLDIS);
diff --git a/arch/ppc/syslib/mpc8xx_devices.c b/arch/ppc/syslib/mpc8xx_devices.c
index 31fb565..c05ac87 100644
--- a/arch/ppc/syslib/mpc8xx_devices.c
+++ b/arch/ppc/syslib/mpc8xx_devices.c
@@ -21,7 +21,7 @@
#include <asm/irq.h>
#include <asm/ppc_sys.h>
-/* We use offsets for IORESOURCE_MEM to do not set dependences at compile time.
+/* We use offsets for IORESOURCE_MEM to do not set dependencies at compile time.
* They will get fixed up by mach_mpc8xx_fixup
*/
diff --git a/arch/ppc/syslib/mv64x60.c b/arch/ppc/syslib/mv64x60.c
index a6f8b68..8485a68 100644
--- a/arch/ppc/syslib/mv64x60.c
+++ b/arch/ppc/syslib/mv64x60.c
@@ -490,7 +490,7 @@
/*
* mv64x60_init()
*
- * Initialze the bridge based on setting passed in via 'si'. The bridge
+ * Initialize the bridge based on setting passed in via 'si'. The bridge
* handle, 'bh', will be set so that it can be used to make subsequent
* calls to routines in this file.
*/
@@ -1704,7 +1704,7 @@
/*
* gt64260a_chip_specific_init()
*
- * Implement errata work arounds for the GT64260A.
+ * Implement errata workarounds for the GT64260A.
*/
static void __init
gt64260a_chip_specific_init(struct mv64x60_handle *bh,
@@ -1776,7 +1776,7 @@
/*
* gt64260b_chip_specific_init()
*
- * Implement errata work arounds for the GT64260B.
+ * Implement errata workarounds for the GT64260B.
*/
static void __init
gt64260b_chip_specific_init(struct mv64x60_handle *bh,
@@ -2316,7 +2316,7 @@
/*
* mv64360_chip_specific_init()
*
- * Implement errata work arounds for the MV64360.
+ * Implement errata workarounds for the MV64360.
*/
static void __init
mv64360_chip_specific_init(struct mv64x60_handle *bh,
@@ -2336,7 +2336,7 @@
/*
* mv64460_chip_specific_init()
*
- * Implement errata work arounds for the MV64460.
+ * Implement errata workarounds for the MV64460.
*/
static void __init
mv64460_chip_specific_init(struct mv64x60_handle *bh,
diff --git a/arch/ppc/syslib/ocp.c b/arch/ppc/syslib/ocp.c
index 50c5562..491fe9a 100644
--- a/arch/ppc/syslib/ocp.c
+++ b/arch/ppc/syslib/ocp.c
@@ -27,7 +27,7 @@
* device model. The devices on the OCP bus are seeded by an
* an initial OCP device array created by the arch-specific
* Device entries can be added/removed/modified through OCP
- * helper functions to accomodate system and board-specific
+ * helper functions to accommodate system and board-specific
* parameters commonly found in embedded systems. OCP also
* provides a standard method for devices to describe extended
* attributes about themselves to the system. A standard access
diff --git a/arch/ppc/syslib/ppc403_pic.c b/arch/ppc/syslib/ppc403_pic.c
index 607ebd1..c3b7b8b 100644
--- a/arch/ppc/syslib/ppc403_pic.c
+++ b/arch/ppc/syslib/ppc403_pic.c
@@ -112,7 +112,7 @@
/*
* Disable all external interrupts until they are
- * explicity requested.
+ * explicitly requested.
*/
ppc_cached_irq_mask[0] = 0;
diff --git a/arch/ppc/syslib/ppc405_pci.c b/arch/ppc/syslib/ppc405_pci.c
index d6d838b..9e90356 100644
--- a/arch/ppc/syslib/ppc405_pci.c
+++ b/arch/ppc/syslib/ppc405_pci.c
@@ -137,7 +137,7 @@
hose_a->pci_mem_offset = 0;
/* Setup bridge memory/IO ranges & resources
- * TODO: Handle firmwares setting up a legacy ISA mem base
+ * TODO: Handle firmware setting up a legacy ISA mem base
*/
hose_a->io_space.start = PPC405_PCI_LOWER_IO;
hose_a->io_space.end = PPC405_PCI_UPPER_IO;
diff --git a/arch/ppc/syslib/ppc4xx_dma.c b/arch/ppc/syslib/ppc4xx_dma.c
index 1eef4ff..bd30186 100644
--- a/arch/ppc/syslib/ppc4xx_dma.c
+++ b/arch/ppc/syslib/ppc4xx_dma.c
@@ -241,7 +241,7 @@
}
/*
- * Returns the number of bytes left to be transfered.
+ * Returns the number of bytes left to be transferred.
* After a DMA transfer, this should return zero.
* Reading this while a DMA transfer is still in progress will return
* unpredictable results.
diff --git a/arch/ppc/syslib/ppc85xx_rio.c b/arch/ppc/syslib/ppc85xx_rio.c
index 2b09780..af2425e 100644
--- a/arch/ppc/syslib/ppc85xx_rio.c
+++ b/arch/ppc/syslib/ppc85xx_rio.c
@@ -349,7 +349,7 @@
* @dev_instance: Pointer to interrupt-specific data
*
* Handles outbound message interrupts. Executes a register outbound
- * mailbox event handler and acks the interrupt occurence.
+ * mailbox event handler and acks the interrupt occurrence.
*/
static irqreturn_t
mpc85xx_rio_tx_handler(int irq, void *dev_instance)
@@ -516,7 +516,7 @@
* @dev_instance: Pointer to interrupt-specific data
*
* Handles inbound message interrupts. Executes a registered inbound
- * mailbox event handler and acks the interrupt occurence.
+ * mailbox event handler and acks the interrupt occurrence.
*/
static irqreturn_t
mpc85xx_rio_rx_handler(int irq, void *dev_instance)
diff --git a/arch/ppc/syslib/xilinx_pic.c b/arch/ppc/syslib/xilinx_pic.c
index 6fd4cdb..3b82333 100644
--- a/arch/ppc/syslib/xilinx_pic.c
+++ b/arch/ppc/syslib/xilinx_pic.c
@@ -130,7 +130,7 @@
/*
* Disable all external interrupts until they are
- * explicity requested.
+ * explicitly requested.
*/
intc_out_be32(intc + IER, 0);