tree 2127e811b50ddf23f21ae678abc129b34e52ded7
parent cbc908ef8e6babc40cb929f46ea1b8a26cbdbce0
author Will Deacon <will.deacon@arm.com> 1378294208 +0100
committer Will Deacon <will.deacon@arm.com> 1413827358 +0100

documentation: memory-barriers: clarify relaxed io accessor semantics

This patch extends the paragraph describing the relaxed read io accessors
so that the relaxed accessors are defined to be:

 - Ordered with respect to each other if accessing the same peripheral

 - Unordered with respect to normal memory accesses

 - Unordered with respect to LOCK/UNLOCK operations

Whilst many architectures will provide stricter semantics, ARM, Alpha and
PPC can achieve significant performance gains by taking advantage of some
or all of the above relaxations.

Cc: Randy Dunlap <rdunlap@infradead.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: David Howells <dhowells@redhat.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>