include/asm-x86/bitops_32.h - kernel/msm-4.9 - Gitiles

 #ifndef _I386_BITOPS_H
 #define _I386_BITOPS_H

 /*
  * Copyright 1992, Linus Torvalds.
  */

 #ifndef _LINUX_BITOPS_H
 #error only <linux/bitops.h> can be included directly
 #endif

 #include <linux/compiler.h>
 #include <asm/alternative.h>

 /*
  * These have to be done with inline assembly: that way the bit-setting
  * is guaranteed to be atomic. All bit operations return 0 if the bit
  * was cleared before the operation and != 0 if it was not.
  *
  * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
  */

 #define ADDR (*(volatile long *) addr)

 /**
  * set_bit - Atomically set a bit in memory
  * @nr: the bit to set
  * @addr: the address to start counting from
  *
  * This function is atomic and may not be reordered.  See __set_bit()
  * if you do not require the atomic guarantees.
  *
  * Note: there are no guarantees that this function will not be reordered
  * on non x86 architectures, so if you are writing portable code,
  * make sure not to rely on its reordering guarantees.
  *
  * Note that @nr may be almost arbitrarily large; this function is not
  * restricted to acting on a single-word quantity.
  */
 static inline void set_bit(int nr, volatile unsigned long * addr)
 {
 	__asm__ __volatile__( LOCK_PREFIX
 		"btsl %1,%0"
 		:"+m" (ADDR)
 		:"Ir" (nr));
 }

 /**
  * __set_bit - Set a bit in memory
  * @nr: the bit to set
  * @addr: the address to start counting from
  *
  * Unlike set_bit(), this function is non-atomic and may be reordered.
  * If it's called on the same region of memory simultaneously, the effect
  * may be that only one operation succeeds.
  */
 static inline void __set_bit(int nr, volatile unsigned long * addr)
 {
 	__asm__(
 		"btsl %1,%0"
 		:"+m" (ADDR)
 		:"Ir" (nr));
 }

 /**
  * clear_bit - Clears a bit in memory
  * @nr: Bit to clear
  * @addr: Address to start counting from
  *
  * clear_bit() is atomic and may not be reordered.  However, it does
  * not contain a memory barrier, so if it is used for locking purposes,
  * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
  * in order to ensure changes are visible on other processors.
  */
 static inline void clear_bit(int nr, volatile unsigned long * addr)
 {
 	__asm__ __volatile__( LOCK_PREFIX
 		"btrl %1,%0"
 		:"+m" (ADDR)
 		:"Ir" (nr));
 }

 static inline void __clear_bit(int nr, volatile unsigned long * addr)
 {
 	__asm__ __volatile__(
 		"btrl %1,%0"
 		:"+m" (ADDR)
 		:"Ir" (nr));
 }
 #define smp_mb__before_clear_bit()	barrier()
 #define smp_mb__after_clear_bit()	barrier()

 /**
  * __change_bit - Toggle a bit in memory
  * @nr: the bit to change
  * @addr: the address to start counting from
  *
  * Unlike change_bit(), this function is non-atomic and may be reordered.
  * If it's called on the same region of memory simultaneously, the effect
  * may be that only one operation succeeds.
  */
 static inline void __change_bit(int nr, volatile unsigned long * addr)
 {
 	__asm__ __volatile__(
 		"btcl %1,%0"
 		:"+m" (ADDR)
 		:"Ir" (nr));
 }

 /**
  * change_bit - Toggle a bit in memory
  * @nr: Bit to change
  * @addr: Address to start counting from
  *
  * change_bit() is atomic and may not be reordered. It may be
  * reordered on other architectures than x86.
  * Note that @nr may be almost arbitrarily large; this function is not
  * restricted to acting on a single-word quantity.
  */
 static inline void change_bit(int nr, volatile unsigned long * addr)
 {
 	__asm__ __volatile__( LOCK_PREFIX
 		"btcl %1,%0"
 		:"+m" (ADDR)
 		:"Ir" (nr));
 }

 /**
  * test_and_set_bit - Set a bit and return its old value
  * @nr: Bit to set
  * @addr: Address to count from
  *
  * This operation is atomic and cannot be reordered.
  * It may be reordered on other architectures than x86.
  * It also implies a memory barrier.
  */
 static inline int test_and_set_bit(int nr, volatile unsigned long * addr)
 {
 	int oldbit;

 	__asm__ __volatile__( LOCK_PREFIX
 		"btsl %2,%1\n\tsbbl %0,%0"
 		:"=r" (oldbit),"+m" (ADDR)
 		:"Ir" (nr) : "memory");
 	return oldbit;
 }

 /**
  * __test_and_set_bit - Set a bit and return its old value
  * @nr: Bit to set
  * @addr: Address to count from
  *
  * This operation is non-atomic and can be reordered.
  * If two examples of this operation race, one can appear to succeed
  * but actually fail.  You must protect multiple accesses with a lock.
  */
 static inline int __test_and_set_bit(int nr, volatile unsigned long * addr)
 {
 	int oldbit;

 	__asm__(
 		"btsl %2,%1\n\tsbbl %0,%0"
 		:"=r" (oldbit),"+m" (ADDR)
 		:"Ir" (nr));
 	return oldbit;
 }

 /**
  * test_and_clear_bit - Clear a bit and return its old value
  * @nr: Bit to clear
  * @addr: Address to count from
  *
  * This operation is atomic and cannot be reordered.
  * It can be reorderdered on other architectures other than x86.
  * It also implies a memory barrier.
  */
 static inline int test_and_clear_bit(int nr, volatile unsigned long * addr)
 {
 	int oldbit;

 	__asm__ __volatile__( LOCK_PREFIX
 		"btrl %2,%1\n\tsbbl %0,%0"
 		:"=r" (oldbit),"+m" (ADDR)
 		:"Ir" (nr) : "memory");
 	return oldbit;
 }

 /**
  * __test_and_clear_bit - Clear a bit and return its old value
  * @nr: Bit to clear
  * @addr: Address to count from
  *
  * This operation is non-atomic and can be reordered.
  * If two examples of this operation race, one can appear to succeed
  * but actually fail.  You must protect multiple accesses with a lock.
  */
 static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr)
 {
 	int oldbit;

 	__asm__(
 		"btrl %2,%1\n\tsbbl %0,%0"
 		:"=r" (oldbit),"+m" (ADDR)
 		:"Ir" (nr));
 	return oldbit;
 }

 /* WARNING: non atomic and it can be reordered! */
 static inline int __test_and_change_bit(int nr, volatile unsigned long *addr)
 {
 	int oldbit;

 	__asm__ __volatile__(
 		"btcl %2,%1\n\tsbbl %0,%0"
 		:"=r" (oldbit),"+m" (ADDR)
 		:"Ir" (nr) : "memory");
 	return oldbit;
 }

 /**
  * test_and_change_bit - Change a bit and return its old value
  * @nr: Bit to change
  * @addr: Address to count from
  *
  * This operation is atomic and cannot be reordered.
  * It also implies a memory barrier.
  */
 static inline int test_and_change_bit(int nr, volatile unsigned long* addr)
 {
 	int oldbit;

 	__asm__ __volatile__( LOCK_PREFIX
 		"btcl %2,%1\n\tsbbl %0,%0"
 		:"=r" (oldbit),"+m" (ADDR)
 		:"Ir" (nr) : "memory");
 	return oldbit;
 }

 #if 0 /* Fool kernel-doc since it doesn't do macros yet */
 /**
  * test_bit - Determine whether a bit is set
  * @nr: bit number to test
  * @addr: Address to start counting from
  */
 static int test_bit(int nr, const volatile void * addr);
 #endif

 static __always_inline int constant_test_bit(int nr, const volatile unsigned long *addr)
 {
 	return ((1UL << (nr & 31)) & (addr[nr >> 5])) != 0;
 }

 static inline int variable_test_bit(int nr, const volatile unsigned long * addr)
 {
 	int oldbit;

 	__asm__ __volatile__(
 		"btl %2,%1\n\tsbbl %0,%0"
 		:"=r" (oldbit)
 		:"m" (ADDR),"Ir" (nr));
 	return oldbit;
 }

 #define test_bit(nr,addr) \
 (__builtin_constant_p(nr) ? \
  constant_test_bit((nr),(addr)) : \
  variable_test_bit((nr),(addr)))

 #undef ADDR

 /**
  * find_first_zero_bit - find the first zero bit in a memory region
  * @addr: The address to start the search at
  * @size: The maximum size to search
  *
  * Returns the bit-number of the first zero bit, not the number of the byte
  * containing a bit.
  */
 static inline int find_first_zero_bit(const unsigned long *addr, unsigned size)
 {
 	int d0, d1, d2;
 	int res;

 	if (!size)
 		return 0;
 	/* This looks at memory. Mark it volatile to tell gcc not to move it around */
 	__asm__ __volatile__(
 		"movl $-1,%%eax\n\t"
 		"xorl %%edx,%%edx\n\t"
 		"repe; scasl\n\t"
 		"je 1f\n\t"
 		"xorl -4(%%edi),%%eax\n\t"
 		"subl $4,%%edi\n\t"
 		"bsfl %%eax,%%edx\n"
 		"1:\tsubl %%ebx,%%edi\n\t"
 		"shll $3,%%edi\n\t"
 		"addl %%edi,%%edx"
 		:"=d" (res), "=&c" (d0), "=&D" (d1), "=&a" (d2)
 		:"1" ((size + 31) >> 5), "2" (addr), "b" (addr) : "memory");
 	return res;
 }

 /**
  * find_next_zero_bit - find the first zero bit in a memory region
  * @addr: The address to base the search on
  * @offset: The bitnumber to start searching at
  * @size: The maximum size to search
  */
 int find_next_zero_bit(const unsigned long *addr, int size, int offset);

 /**
  * __ffs - find first bit in word.
  * @word: The word to search
  *
  * Undefined if no bit exists, so code should check against 0 first.
  */
 static inline unsigned long __ffs(unsigned long word)
 {
 	__asm__("bsfl %1,%0"
 		:"=r" (word)
 		:"rm" (word));
 	return word;
 }

 /**
  * find_first_bit - find the first set bit in a memory region
  * @addr: The address to start the search at
  * @size: The maximum size to search
  *
  * Returns the bit-number of the first set bit, not the number of the byte
  * containing a bit.
  */
 static inline unsigned find_first_bit(const unsigned long *addr, unsigned size)
 {
 	unsigned x = 0;

 	while (x < size) {
 		unsigned long val = *addr++;
 		if (val)
 			return __ffs(val) + x;
 		x += (sizeof(*addr)<<3);
 	}
 	return x;
 }

 /**
  * find_next_bit - find the first set bit in a memory region
  * @addr: The address to base the search on
  * @offset: The bitnumber to start searching at
  * @size: The maximum size to search
  */
 int find_next_bit(const unsigned long *addr, int size, int offset);

 /**
  * ffz - find first zero in word.
  * @word: The word to search
  *
  * Undefined if no zero exists, so code should check against ~0UL first.
  */
 static inline unsigned long ffz(unsigned long word)
 {
 	__asm__("bsfl %1,%0"
 		:"=r" (word)
 		:"r" (~word));
 	return word;
 }

 #ifdef __KERNEL__

 #include <asm-generic/bitops/sched.h>

 /**
  * ffs - find first bit set
  * @x: the word to search
  *
  * This is defined the same way as
  * the libc and compiler builtin ffs routines, therefore
  * differs in spirit from the above ffz() (man ffs).
  */
 static inline int ffs(int x)
 {
 	int r;

 	__asm__("bsfl %1,%0\n\t"
 		"jnz 1f\n\t"
 		"movl $-1,%0\n"
 		"1:" : "=r" (r) : "rm" (x));
 	return r+1;
 }

 /**
  * fls - find last bit set
  * @x: the word to search
  *
  * This is defined the same way as ffs().
  */
 static inline int fls(int x)
 {
 	int r;

 	__asm__("bsrl %1,%0\n\t"
 		"jnz 1f\n\t"
 		"movl $-1,%0\n"
 		"1:" : "=r" (r) : "rm" (x));
 	return r+1;
 }

 #include <asm-generic/bitops/hweight.h>
 #include <asm-generic/bitops/lock.h>

 #endif /* __KERNEL__ */

 #include <asm-generic/bitops/fls64.h>

 #ifdef __KERNEL__

 #include <asm-generic/bitops/ext2-non-atomic.h>

 #define ext2_set_bit_atomic(lock,nr,addr) \
         test_and_set_bit((nr),(unsigned long*)addr)
 #define ext2_clear_bit_atomic(lock,nr, addr) \
 	        test_and_clear_bit((nr),(unsigned long*)addr)

 #include <asm-generic/bitops/minix.h>

 #endif /* __KERNEL__ */

 #endif /* _I386_BITOPS_H */
	#ifndef _I386_BITOPS_H
	#define _I386_BITOPS_H

	/*
	* Copyright 1992, Linus Torvalds.
	*/

	#ifndef _LINUX_BITOPS_H
	#error only <linux/bitops.h> can be included directly
	#endif

	#include <linux/compiler.h>
	#include <asm/alternative.h>

	/*
	* These have to be done with inline assembly: that way the bit-setting
	* is guaranteed to be atomic. All bit operations return 0 if the bit
	* was cleared before the operation and != 0 if it was not.
	*
	* bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
	*/

	#define ADDR ((volatile long ) addr)

	/**
	* set_bit - Atomically set a bit in memory
	* @nr: the bit to set
	* @addr: the address to start counting from
	*
	* This function is atomic and may not be reordered. See __set_bit()
	* if you do not require the atomic guarantees.
	*
	* Note: there are no guarantees that this function will not be reordered
	* on non x86 architectures, so if you are writing portable code,
	* make sure not to rely on its reordering guarantees.
	*
	* Note that @nr may be almost arbitrarily large; this function is not
	* restricted to acting on a single-word quantity.
	*/
	static inline void set_bit(int nr, volatile unsigned long * addr)
	{
	__asm__ __volatile__( LOCK_PREFIX
	"btsl %1,%0"
	:"+m" (ADDR)
	:"Ir" (nr));
	}

	/**
	* __set_bit - Set a bit in memory
	* @nr: the bit to set
	* @addr: the address to start counting from
	*
	* Unlike set_bit(), this function is non-atomic and may be reordered.
	* If it's called on the same region of memory simultaneously, the effect
	* may be that only one operation succeeds.
	*/
	static inline void __set_bit(int nr, volatile unsigned long * addr)
	{
	__asm__(
	"btsl %1,%0"
	:"+m" (ADDR)
	:"Ir" (nr));
	}

	/**
	* clear_bit - Clears a bit in memory
	* @nr: Bit to clear
	* @addr: Address to start counting from
	*
	* clear_bit() is atomic and may not be reordered. However, it does
	* not contain a memory barrier, so if it is used for locking purposes,
	* you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
	* in order to ensure changes are visible on other processors.
	*/
	static inline void clear_bit(int nr, volatile unsigned long * addr)
	{
	__asm__ __volatile__( LOCK_PREFIX
	"btrl %1,%0"
	:"+m" (ADDR)
	:"Ir" (nr));
	}

	static inline void __clear_bit(int nr, volatile unsigned long * addr)
	{
	__asm__ __volatile__(
	"btrl %1,%0"
	:"+m" (ADDR)
	:"Ir" (nr));
	}
	#define smp_mb__before_clear_bit() barrier()
	#define smp_mb__after_clear_bit() barrier()

	/**
	* __change_bit - Toggle a bit in memory
	* @nr: the bit to change
	* @addr: the address to start counting from
	*
	* Unlike change_bit(), this function is non-atomic and may be reordered.
	* If it's called on the same region of memory simultaneously, the effect
	* may be that only one operation succeeds.
	*/
	static inline void __change_bit(int nr, volatile unsigned long * addr)
	{
	__asm__ __volatile__(
	"btcl %1,%0"
	:"+m" (ADDR)
	:"Ir" (nr));
	}

	/**
	* change_bit - Toggle a bit in memory
	* @nr: Bit to change
	* @addr: Address to start counting from
	*
	* change_bit() is atomic and may not be reordered. It may be
	* reordered on other architectures than x86.
	* Note that @nr may be almost arbitrarily large; this function is not
	* restricted to acting on a single-word quantity.
	*/
	static inline void change_bit(int nr, volatile unsigned long * addr)
	{
	__asm__ __volatile__( LOCK_PREFIX
	"btcl %1,%0"
	:"+m" (ADDR)
	:"Ir" (nr));
	}

	/**
	* test_and_set_bit - Set a bit and return its old value
	* @nr: Bit to set
	* @addr: Address to count from
	*
	* This operation is atomic and cannot be reordered.
	* It may be reordered on other architectures than x86.
	* It also implies a memory barrier.
	*/
	static inline int test_and_set_bit(int nr, volatile unsigned long * addr)
	{
	int oldbit;

	__asm__ __volatile__( LOCK_PREFIX
	"btsl %2,%1\n\tsbbl %0,%0"
	:"=r" (oldbit),"+m" (ADDR)
	:"Ir" (nr) : "memory");
	return oldbit;
	}

	/**
	* __test_and_set_bit - Set a bit and return its old value
	* @nr: Bit to set
	* @addr: Address to count from
	*
	* This operation is non-atomic and can be reordered.
	* If two examples of this operation race, one can appear to succeed
	* but actually fail. You must protect multiple accesses with a lock.
	*/
	static inline int __test_and_set_bit(int nr, volatile unsigned long * addr)
	{
	int oldbit;

	__asm__(
	"btsl %2,%1\n\tsbbl %0,%0"
	:"=r" (oldbit),"+m" (ADDR)
	:"Ir" (nr));
	return oldbit;
	}

	/**
	* test_and_clear_bit - Clear a bit and return its old value
	* @nr: Bit to clear
	* @addr: Address to count from
	*
	* This operation is atomic and cannot be reordered.
	* It can be reorderdered on other architectures other than x86.
	* It also implies a memory barrier.
	*/
	static inline int test_and_clear_bit(int nr, volatile unsigned long * addr)
	{
	int oldbit;

	__asm__ __volatile__( LOCK_PREFIX
	"btrl %2,%1\n\tsbbl %0,%0"
	:"=r" (oldbit),"+m" (ADDR)
	:"Ir" (nr) : "memory");
	return oldbit;
	}

	/**
	* __test_and_clear_bit - Clear a bit and return its old value
	* @nr: Bit to clear
	* @addr: Address to count from
	*
	* This operation is non-atomic and can be reordered.
	* If two examples of this operation race, one can appear to succeed
	* but actually fail. You must protect multiple accesses with a lock.
	*/
	static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr)
	{
	int oldbit;

	__asm__(
	"btrl %2,%1\n\tsbbl %0,%0"
	:"=r" (oldbit),"+m" (ADDR)
	:"Ir" (nr));
	return oldbit;
	}

	/* WARNING: non atomic and it can be reordered! */
	static inline int __test_and_change_bit(int nr, volatile unsigned long *addr)
	{
	int oldbit;

	__asm__ __volatile__(
	"btcl %2,%1\n\tsbbl %0,%0"
	:"=r" (oldbit),"+m" (ADDR)
	:"Ir" (nr) : "memory");
	return oldbit;
	}

	/**
	* test_and_change_bit - Change a bit and return its old value
	* @nr: Bit to change
	* @addr: Address to count from
	*
	* This operation is atomic and cannot be reordered.
	* It also implies a memory barrier.
	*/
	static inline int test_and_change_bit(int nr, volatile unsigned long* addr)
	{
	int oldbit;

	__asm__ __volatile__( LOCK_PREFIX
	"btcl %2,%1\n\tsbbl %0,%0"
	:"=r" (oldbit),"+m" (ADDR)
	:"Ir" (nr) : "memory");
	return oldbit;
	}

	#if 0 /* Fool kernel-doc since it doesn't do macros yet */
	/**
	* test_bit - Determine whether a bit is set
	* @nr: bit number to test
	* @addr: Address to start counting from
	*/
	static int test_bit(int nr, const volatile void * addr);
	#endif

	static __always_inline int constant_test_bit(int nr, const volatile unsigned long *addr)
	{
	return ((1UL << (nr & 31)) & (addr[nr >> 5])) != 0;
	}

	static inline int variable_test_bit(int nr, const volatile unsigned long * addr)
	{
	int oldbit;

	__asm__ __volatile__(
	"btl %2,%1\n\tsbbl %0,%0"
	:"=r" (oldbit)
	:"m" (ADDR),"Ir" (nr));
	return oldbit;
	}

	#define test_bit(nr,addr) \
	(__builtin_constant_p(nr) ? \
	constant_test_bit((nr),(addr)) : \
	variable_test_bit((nr),(addr)))

	#undef ADDR

	/**
	* find_first_zero_bit - find the first zero bit in a memory region
	* @addr: The address to start the search at
	* @size: The maximum size to search
	*
	* Returns the bit-number of the first zero bit, not the number of the byte
	* containing a bit.
	*/
	static inline int find_first_zero_bit(const unsigned long *addr, unsigned size)
	{
	int d0, d1, d2;
	int res;

	if (!size)
	return 0;
	/* This looks at memory. Mark it volatile to tell gcc not to move it around */
	__asm__ __volatile__(
	"movl $-1,%%eax\n\t"
	"xorl %%edx,%%edx\n\t"
	"repe; scasl\n\t"
	"je 1f\n\t"
	"xorl -4(%%edi),%%eax\n\t"
	"subl $4,%%edi\n\t"
	"bsfl %%eax,%%edx\n"
	"1:\tsubl %%ebx,%%edi\n\t"
	"shll $3,%%edi\n\t"
	"addl %%edi,%%edx"
	:"=d" (res), "=&c" (d0), "=&D" (d1), "=&a" (d2)
	:"1" ((size + 31) >> 5), "2" (addr), "b" (addr) : "memory");
	return res;
	}

	/**
	* find_next_zero_bit - find the first zero bit in a memory region
	* @addr: The address to base the search on
	* @offset: The bitnumber to start searching at
	* @size: The maximum size to search
	*/
	int find_next_zero_bit(const unsigned long *addr, int size, int offset);

	/**
	* __ffs - find first bit in word.
	* @word: The word to search
	*
	* Undefined if no bit exists, so code should check against 0 first.
	*/
	static inline unsigned long __ffs(unsigned long word)
	{
	__asm__("bsfl %1,%0"
	:"=r" (word)
	:"rm" (word));
	return word;
	}

	/**
	* find_first_bit - find the first set bit in a memory region
	* @addr: The address to start the search at
	* @size: The maximum size to search
	*
	* Returns the bit-number of the first set bit, not the number of the byte
	* containing a bit.
	*/
	static inline unsigned find_first_bit(const unsigned long *addr, unsigned size)
	{
	unsigned x = 0;

	while (x < size) {
	unsigned long val = *addr++;
	if (val)
	return __ffs(val) + x;
	x += (sizeof(*addr)<<3);
	}
	return x;
	}

	/**
	* find_next_bit - find the first set bit in a memory region
	* @addr: The address to base the search on
	* @offset: The bitnumber to start searching at
	* @size: The maximum size to search
	*/
	int find_next_bit(const unsigned long *addr, int size, int offset);

	/**
	* ffz - find first zero in word.
	* @word: The word to search
	*
	* Undefined if no zero exists, so code should check against ~0UL first.
	*/
	static inline unsigned long ffz(unsigned long word)
	{
	__asm__("bsfl %1,%0"
	:"=r" (word)
	:"r" (~word));
	return word;
	}

	#ifdef __KERNEL__

	#include <asm-generic/bitops/sched.h>

	/**
	* ffs - find first bit set
	* @x: the word to search
	*
	* This is defined the same way as
	* the libc and compiler builtin ffs routines, therefore
	* differs in spirit from the above ffz() (man ffs).
	*/
	static inline int ffs(int x)
	{
	int r;

	__asm__("bsfl %1,%0\n\t"
	"jnz 1f\n\t"
	"movl $-1,%0\n"
	"1:" : "=r" (r) : "rm" (x));
	return r+1;
	}

	/**
	* fls - find last bit set
	* @x: the word to search
	*
	* This is defined the same way as ffs().
	*/
	static inline int fls(int x)
	{
	int r;

	__asm__("bsrl %1,%0\n\t"
	"jnz 1f\n\t"
	"movl $-1,%0\n"
	"1:" : "=r" (r) : "rm" (x));
	return r+1;
	}

	#include <asm-generic/bitops/hweight.h>
	#include <asm-generic/bitops/lock.h>

	#endif /* __KERNEL__ */

	#include <asm-generic/bitops/fls64.h>

	#ifdef __KERNEL__

	#include <asm-generic/bitops/ext2-non-atomic.h>

	#define ext2_set_bit_atomic(lock,nr,addr) \
	test_and_set_bit((nr),(unsigned long*)addr)
	#define ext2_clear_bit_atomic(lock,nr, addr) \
	test_and_clear_bit((nr),(unsigned long*)addr)

	#include <asm-generic/bitops/minix.h>

	#endif /* __KERNEL__ */

	#endif /* _I386_BITOPS_H */