drm/msm/sde: check for missed irqs in command encoder
Modify the way that the waiting for previous kickoffs is handled
for the command encoder case. Instead of doing waiting in the
virtual encoder, do the waiting in the command encoder directly.
That way we can check whether we have missed the IRQ. Also
allows waiting for idle before disabling the encoder.
Change-Id: I6cdb9c961a0ffd8e9ea2aaf1ad9686757edd7142
Signed-off-by: Lloyd Atkinson <latkinso@codeaurora.org>
diff --git a/drivers/gpu/drm/msm/sde/sde_encoder.c b/drivers/gpu/drm/msm/sde/sde_encoder.c
index 622a2fc..e5b5e06 100644
--- a/drivers/gpu/drm/msm/sde/sde_encoder.c
+++ b/drivers/gpu/drm/msm/sde/sde_encoder.c
@@ -45,9 +45,6 @@
#define MAX_CHANNELS_PER_ENC 2
-/* Wait timeout sized on worst case of 4 60fps frames ~= 67ms */
-#define WAIT_TIMEOUT_MSEC 67
-
/**
* struct sde_encoder_virt - virtual encoder. Container of one or more physical
* encoders. Virtual encoder manages one "logical" display. Physical
@@ -66,19 +63,9 @@
* @crtc_vblank_cb: Callback into the upper layer / CRTC for
* notification of the VBLANK
* @crtc_vblank_cb_data: Data from upper layer for VBLANK notification
- * @pending_kickoff_mask: Bitmask used to track which physical encoders
- * still have pending transmissions before we can
- * trigger the next kickoff. Bitmask tracks the
- * index of the phys_enc table. Protect since
- * shared between irq and commit thread
* @crtc_kickoff_cb: Callback into CRTC that will flush & start
* all CTL paths
* @crtc_kickoff_cb_data: Opaque user data given to crtc_kickoff_cb
- * @pending_kickoff_mask: Bitmask tracking which phys_enc we are still
- * waiting on before we can trigger the next
- * kickoff. Bit0 = phys_encs[0] etc.
- * @pending_kickoff_wq: Wait queue commit thread to wait on phys_encs
- * become ready for kickoff in IRQ contexts
* @debugfs_root: Debug file system root file node
* @enc_lock: Lock around physical encoder create/destroy and
access.
@@ -98,9 +85,6 @@
void (*crtc_vblank_cb)(void *);
void *crtc_vblank_cb_data;
- unsigned int pending_kickoff_mask;
- wait_queue_head_t pending_kickoff_wq;
-
struct dentry *debugfs_root;
struct mutex enc_lock;
};
@@ -590,29 +574,6 @@
}
}
-static void sde_encoder_handle_phys_enc_ready_for_kickoff(
- struct drm_encoder *drm_enc,
- struct sde_encoder_phys *ready_phys)
-{
- struct sde_encoder_virt *sde_enc = to_sde_encoder_virt(drm_enc);
- unsigned long lock_flags;
- unsigned int i, mask;
-
- /* One of the physical encoders has become ready for kickoff */
- for (i = 0; i < sde_enc->num_phys_encs; i++) {
- if (sde_enc->phys_encs[i] == ready_phys) {
- spin_lock_irqsave(&sde_enc->spin_lock, lock_flags);
- sde_enc->pending_kickoff_mask &= ~(1 << i);
- mask = sde_enc->pending_kickoff_mask;
- spin_unlock_irqrestore(&sde_enc->spin_lock, lock_flags);
- SDE_EVT32(DRMID(drm_enc), i, mask);
- }
- }
-
- /* Wake the commit thread to check if they all ready for kickoff */
- wake_up_all(&sde_enc->pending_kickoff_wq);
-}
-
/**
* _sde_encoder_trigger_flush - trigger flush for a physical encoder
* drm_enc: Pointer to drm encoder structure
@@ -678,6 +639,30 @@
SDE_EVT32(DRMID(phys_enc->parent), ctl_idx);
}
+int sde_encoder_helper_wait_event_timeout(
+ int32_t drm_id,
+ int32_t hw_id,
+ wait_queue_head_t *wq,
+ atomic_t *cnt,
+ s64 timeout_ms)
+{
+ int rc = 0;
+ s64 expected_time = ktime_to_ms(ktime_get()) + timeout_ms;
+ s64 jiffies = msecs_to_jiffies(timeout_ms);
+ s64 time;
+
+ do {
+ rc = wait_event_timeout(*wq, atomic_read(cnt) == 0, jiffies);
+ time = ktime_to_ms(ktime_get());
+
+ SDE_EVT32(drm_id, hw_id, rc, time, expected_time,
+ atomic_read(cnt));
+ /* If we timed out, counter is valid and time is less, wait again */
+ } while (atomic_read(cnt) && (rc == 0) && (time < expected_time));
+
+ return rc;
+}
+
/**
* _sde_encoder_kickoff_phys - handle physical encoder kickoff
* Iterate through the physical encoders and perform consolidated flush
@@ -729,10 +714,7 @@
{
struct sde_encoder_virt *sde_enc;
struct sde_encoder_phys *phys;
- unsigned long lock_flags;
- bool need_to_wait;
unsigned int i;
- int ret;
if (!drm_enc) {
SDE_ERROR("invalid encoder\n");
@@ -743,52 +725,19 @@
SDE_DEBUG_ENC(sde_enc, "\n");
SDE_EVT32(DRMID(drm_enc));
- spin_lock_irqsave(&sde_enc->spin_lock, lock_flags);
- sde_enc->pending_kickoff_mask = 0;
- spin_unlock_irqrestore(&sde_enc->spin_lock, lock_flags);
-
+ /* prepare for next kickoff, may include waiting on previous kickoff */
for (i = 0; i < sde_enc->num_phys_encs; i++) {
- need_to_wait = false;
phys = sde_enc->phys_encs[i];
-
if (phys && phys->ops.prepare_for_kickoff)
- phys->ops.prepare_for_kickoff(phys, &need_to_wait);
-
- if (need_to_wait) {
- spin_lock_irqsave(&sde_enc->spin_lock, lock_flags);
- sde_enc->pending_kickoff_mask |= 1 << i;
- spin_unlock_irqrestore(&sde_enc->spin_lock, lock_flags);
- }
+ phys->ops.prepare_for_kickoff(phys);
}
- spin_lock_irqsave(&sde_enc->spin_lock, lock_flags);
- SDE_EVT32(DRMID(drm_enc), sde_enc->pending_kickoff_mask);
- spin_unlock_irqrestore(&sde_enc->spin_lock, lock_flags);
-
- /* Wait for the busy phys encs to be ready */
- ret = -ERESTARTSYS;
- while (ret == -ERESTARTSYS) {
- spin_lock_irqsave(&sde_enc->spin_lock, lock_flags);
- ret = wait_event_interruptible_lock_irq_timeout(
- sde_enc->pending_kickoff_wq,
- sde_enc->pending_kickoff_mask == 0,
- sde_enc->spin_lock,
- msecs_to_jiffies(WAIT_TIMEOUT_MSEC));
- spin_unlock_irqrestore(&sde_enc->spin_lock, lock_flags);
- if (!ret) {
- SDE_ERROR_ENC(sde_enc, "wait %ums timed out\n",
- WAIT_TIMEOUT_MSEC);
- SDE_DBG_DUMP("panic");
- }
- }
-
- /* All phys encs are ready to go, trigger the kickoff */
+ /* all phys encs are ready to go, trigger the kickoff */
_sde_encoder_kickoff_phys(sde_enc);
- /* Allow phys encs to handle any post-kickoff business */
+ /* allow phys encs to handle any post-kickoff business */
for (i = 0; i < sde_enc->num_phys_encs; i++) {
- struct sde_encoder_phys *phys = sde_enc->phys_encs[i];
-
+ phys = sde_enc->phys_encs[i];
if (phys && phys->ops.handle_post_kickoff)
phys->ops.handle_post_kickoff(phys);
}
@@ -1078,7 +1027,6 @@
struct sde_encoder_virt_ops parent_ops = {
sde_encoder_vblank_callback,
sde_encoder_underrun_callback,
- sde_encoder_handle_phys_enc_ready_for_kickoff
};
struct sde_enc_phys_init_params phys_params;
@@ -1209,8 +1157,6 @@
drm_encoder_init(dev, drm_enc, &sde_encoder_funcs, drm_enc_mode);
drm_encoder_helper_add(drm_enc, &sde_encoder_helper_funcs);
bs_init(sde_enc);
- sde_enc->pending_kickoff_mask = 0;
- init_waitqueue_head(&sde_enc->pending_kickoff_wq);
_sde_encoder_init_debugfs(drm_enc, sde_enc, sde_kms);
diff --git a/drivers/gpu/drm/msm/sde/sde_encoder_phys.h b/drivers/gpu/drm/msm/sde/sde_encoder_phys.h
index 5477e81..2076b56 100644
--- a/drivers/gpu/drm/msm/sde/sde_encoder_phys.h
+++ b/drivers/gpu/drm/msm/sde/sde_encoder_phys.h
@@ -15,6 +15,8 @@
#ifndef __SDE_ENCODER_PHYS_H__
#define __SDE_ENCODER_PHYS_H__
+#include <linux/jiffies.h>
+
#include "sde_kms.h"
#include "sde_hw_intf.h"
#include "sde_hw_pingpong.h"
@@ -27,6 +29,10 @@
#define SDE_ENCODER_NAME_MAX 16
+/* wait for at most 2 vsync for lowest refresh rate (24hz) */
+#define KICKOFF_TIMEOUT_MS 84
+#define KICKOFF_TIMEOUT_JIFFIES msecs_to_jiffies(KICKOFF_TIMEOUT_MS)
+
/**
* enum sde_enc_split_role - Role this physical encoder will play in a
* split-panel configuration, where one panel is master, and others slaves.
@@ -50,16 +56,12 @@
* Note: This is called from IRQ handler context.
* @handle_underrun_virt: Notify virtual encoder of underrun IRQ reception
* Note: This is called from IRQ handler context.
- * @handle_ready_for_kickoff: Notify virtual encoder that this phys encoder
- * is now ready for the next kickoff.
*/
struct sde_encoder_virt_ops {
void (*handle_vblank_virt)(struct drm_encoder *,
struct sde_encoder_phys *phys);
void (*handle_underrun_virt)(struct drm_encoder *,
struct sde_encoder_phys *phys);
- void (*handle_ready_for_kickoff)(struct drm_encoder *,
- struct sde_encoder_phys *phys);
};
/**
@@ -82,9 +84,7 @@
* @wait_for_commit_done: Wait for hardware to have flushed the
* current pending frames to hardware
* @prepare_for_kickoff: Do any work necessary prior to a kickoff
- * and report whether need to wait before
- * triggering the next kickoff
- * (ie for previous tx to complete)
+ * For CMD encoder, may wait for previous tx done
* @handle_post_kickoff: Do any work necessary post-kickoff work
* @trigger_start: Process start event on physical encoder
* @needs_split_flush: Whether encoder type needs split flush
@@ -111,8 +111,7 @@
struct drm_connector_state *conn_state);
int (*control_vblank_irq)(struct sde_encoder_phys *enc, bool enable);
int (*wait_for_commit_done)(struct sde_encoder_phys *phys_enc);
- void (*prepare_for_kickoff)(struct sde_encoder_phys *phys_enc,
- bool *wait_until_ready);
+ void (*prepare_for_kickoff)(struct sde_encoder_phys *phys_enc);
void (*handle_post_kickoff)(struct sde_encoder_phys *phys_enc);
void (*trigger_start)(struct sde_encoder_phys *phys_enc);
bool (*needs_split_flush)(struct sde_encoder_phys *phys_enc);
@@ -354,6 +353,24 @@
*/
void sde_encoder_helper_trigger_start(struct sde_encoder_phys *phys_enc);
+/**
+ * sde_encoder_helper_wait_event_timeout - wait for event with timeout
+ * taking into account that jiffies may jump between reads leading to
+ * incorrectly detected timeouts. Prevent failure in this scenario by
+ * making sure that elapsed time during wait is valid.
+ * @drm_id: drm object id for logging
+ * @hw_id: hw instance id for logging
+ * @wq: wait queue structure
+ * @cnt: atomic counter to wait on
+ * @timeout_ms: timeout value in milliseconds
+ */
+int sde_encoder_helper_wait_event_timeout(
+ int32_t drm_id,
+ int32_t hw_id,
+ wait_queue_head_t *wq,
+ atomic_t *cnt,
+ s64 timeout_ms);
+
static inline enum sde_3d_blend_mode sde_encoder_helper_get_3d_blend_mode(
struct sde_encoder_phys *phys_enc)
diff --git a/drivers/gpu/drm/msm/sde/sde_encoder_phys_cmd.c b/drivers/gpu/drm/msm/sde/sde_encoder_phys_cmd.c
index 310f69d..b35d047 100644
--- a/drivers/gpu/drm/msm/sde/sde_encoder_phys_cmd.c
+++ b/drivers/gpu/drm/msm/sde/sde_encoder_phys_cmd.c
@@ -13,9 +13,6 @@
*/
#define pr_fmt(fmt) "[drm:%s:%d] " fmt, __func__, __LINE__
-
-#include <linux/jiffies.h>
-
#include "sde_encoder_phys.h"
#include "sde_hw_interrupts.h"
#include "sde_core_irq.h"
@@ -34,8 +31,6 @@
#define to_sde_encoder_phys_cmd(x) \
container_of(x, struct sde_encoder_phys_cmd, base)
-#define WAIT_TIMEOUT_MSEC 100
-
/*
* Tearcheck sync start and continue thresholds are empirically found
* based on common panels In the future, may want to allow panels to override
@@ -102,23 +97,19 @@
{
struct sde_encoder_phys_cmd *cmd_enc = arg;
struct sde_encoder_phys *phys_enc;
- int new_pending_cnt;
+ int new_cnt;
if (!cmd_enc)
return;
phys_enc = &cmd_enc->base;
- new_pending_cnt = atomic_dec_return(&cmd_enc->pending_cnt);
- SDE_EVT32_IRQ(DRMID(phys_enc->parent), phys_enc->hw_pp->idx,
- new_pending_cnt);
+
+ new_cnt = atomic_add_unless(&cmd_enc->pending_cnt, -1, 0);
+ SDE_EVT32_IRQ(DRMID(phys_enc->parent),
+ phys_enc->hw_pp->idx - PINGPONG_0, new_cnt);
/* Signal any waiting atomic commit thread */
wake_up_all(&cmd_enc->pp_tx_done_wq);
-
- /* Trigger a pending flush */
- if (phys_enc->parent_ops.handle_ready_for_kickoff)
- phys_enc->parent_ops.handle_ready_for_kickoff(phys_enc->parent,
- phys_enc);
}
static void sde_encoder_phys_cmd_pp_rd_ptr_irq(void *arg, int irq_idx)
@@ -134,6 +125,54 @@
phys_enc);
}
+static int _sde_encoder_phys_cmd_wait_for_idle(
+ struct sde_encoder_phys *phys_enc)
+{
+ struct sde_encoder_phys_cmd *cmd_enc =
+ to_sde_encoder_phys_cmd(phys_enc);
+ u32 irq_status;
+ int ret;
+
+ /* return EWOULDBLOCK since we know the wait isn't necessary */
+ if (phys_enc->enable_state != SDE_ENC_ENABLED) {
+ SDE_ERROR_CMDENC(cmd_enc, "encoder not enabled, state: %d\n",
+ phys_enc->enable_state);
+ return -EWOULDBLOCK;
+ }
+
+ /* wait for previous kickoff to complete */
+ ret = sde_encoder_helper_wait_event_timeout(
+ DRMID(phys_enc->parent),
+ phys_enc->hw_pp->idx - PINGPONG_0,
+ &cmd_enc->pp_tx_done_wq,
+ &cmd_enc->pending_cnt,
+ KICKOFF_TIMEOUT_MS);
+ if (ret <= 0) {
+ irq_status = sde_core_irq_read(phys_enc->sde_kms,
+ INTR_IDX_PINGPONG, true);
+ if (irq_status) {
+ SDE_EVT32(DRMID(phys_enc->parent),
+ phys_enc->hw_pp->idx - PINGPONG_0);
+ SDE_DEBUG_CMDENC(cmd_enc,
+ "pp:%d done but irq not triggered\n",
+ phys_enc->hw_pp->idx - PINGPONG_0);
+ sde_encoder_phys_cmd_pp_tx_done_irq(cmd_enc,
+ INTR_IDX_PINGPONG);
+ ret = 0;
+ } else {
+ SDE_EVT32(DRMID(phys_enc->parent),
+ phys_enc->hw_pp->idx - PINGPONG_0);
+ SDE_ERROR_CMDENC(cmd_enc, "pp:%d kickoff timed out\n",
+ phys_enc->hw_pp->idx - PINGPONG_0);
+ ret = -ETIMEDOUT;
+ }
+ } else {
+ ret = 0;
+ }
+
+ return ret;
+}
+
static void sde_encoder_phys_cmd_underrun_irq(void *arg, int irq_idx)
{
struct sde_encoder_phys_cmd *cmd_enc = arg;
@@ -383,8 +422,8 @@
__builtin_return_address(0),
enable, atomic_read(&phys_enc->vblank_refcount));
- SDE_EVT32(DRMID(phys_enc->parent), enable,
- atomic_read(&phys_enc->vblank_refcount));
+ SDE_EVT32(DRMID(phys_enc->parent), phys_enc->hw_pp->idx - PINGPONG_0,
+ enable, atomic_read(&phys_enc->vblank_refcount));
if (enable && atomic_inc_return(&phys_enc->vblank_refcount) == 1)
ret = sde_encoder_phys_cmd_register_irq(phys_enc,
@@ -474,6 +513,7 @@
{
struct sde_encoder_phys_cmd *cmd_enc =
to_sde_encoder_phys_cmd(phys_enc);
+ int ret;
if (!phys_enc) {
SDE_ERROR("invalid encoder\n");
@@ -484,12 +524,19 @@
if (WARN_ON(phys_enc->enable_state == SDE_ENC_DISABLED))
return;
+ SDE_EVT32(DRMID(phys_enc->parent), phys_enc->hw_pp->idx - PINGPONG_0);
+
+ ret = _sde_encoder_phys_cmd_wait_for_idle(phys_enc);
+ if (ret) {
+ atomic_set(&cmd_enc->pending_cnt, 0);
+ SDE_ERROR("failure waiting for idle before disable: %d\n", ret);
+ SDE_EVT32(DRMID(phys_enc->parent), phys_enc->hw_pp->idx, ret);
+ }
+
sde_encoder_phys_cmd_unregister_irq(phys_enc, INTR_IDX_UNDERRUN);
sde_encoder_phys_cmd_control_vblank_irq(phys_enc, false);
sde_encoder_phys_cmd_unregister_irq(phys_enc, INTR_IDX_PINGPONG);
- atomic_set(&cmd_enc->pending_cnt, 0);
- wake_up_all(&cmd_enc->pp_tx_done_wq);
phys_enc->enable_state = SDE_ENC_DISABLED;
if (atomic_read(&phys_enc->vblank_refcount))
@@ -540,31 +587,34 @@
}
static void sde_encoder_phys_cmd_prepare_for_kickoff(
- struct sde_encoder_phys *phys_enc,
- bool *need_to_wait)
+ struct sde_encoder_phys *phys_enc)
{
struct sde_encoder_phys_cmd *cmd_enc =
to_sde_encoder_phys_cmd(phys_enc);
int new_pending_cnt;
+ int ret;
if (!phys_enc) {
SDE_ERROR("invalid encoder\n");
return;
}
SDE_DEBUG_CMDENC(cmd_enc, "pp %d\n", phys_enc->hw_pp->idx - PINGPONG_0);
+ SDE_EVT32(DRMID(phys_enc->parent), phys_enc->hw_pp->idx - PINGPONG_0);
/*
* Mark kickoff request as outstanding. If there are more than one,
* outstanding, then we have to wait for the previous one to complete
*/
- new_pending_cnt = atomic_inc_return(&cmd_enc->pending_cnt);
- *need_to_wait = new_pending_cnt != 1;
+ ret = _sde_encoder_phys_cmd_wait_for_idle(phys_enc);
+ if (ret) {
+ /* force pending_cnt 0 to discard failed kickoff */
+ atomic_set(&cmd_enc->pending_cnt, 0);
+ SDE_EVT32(DRMID(phys_enc->parent),
+ phys_enc->hw_pp->idx - PINGPONG_0);
+ SDE_ERROR("failed wait_for_idle: %d\n", ret);
+ }
- if (*need_to_wait)
- SDE_DEBUG_CMDENC(cmd_enc,
- "pp %d needs to wait, new_pending_cnt %d",
- phys_enc->hw_pp->idx - PINGPONG_0,
- new_pending_cnt);
+ new_pending_cnt = atomic_inc_return(&cmd_enc->pending_cnt);
SDE_EVT32(DRMID(phys_enc->parent), phys_enc->hw_pp->idx,
new_pending_cnt);
}
diff --git a/drivers/gpu/drm/msm/sde/sde_encoder_phys_vid.c b/drivers/gpu/drm/msm/sde/sde_encoder_phys_vid.c
index 70eafca..e25c359 100644
--- a/drivers/gpu/drm/msm/sde/sde_encoder_phys_vid.c
+++ b/drivers/gpu/drm/msm/sde/sde_encoder_phys_vid.c
@@ -11,9 +11,6 @@
*/
#define pr_fmt(fmt) "[drm:%s:%d] " fmt, __func__, __LINE__
-
-#include <linux/jiffies.h>
-
#include "sde_encoder_phys.h"
#include "sde_hw_interrupts.h"
#include "sde_core_irq.h"
@@ -31,13 +28,9 @@
(e) && (e)->hw_intf ? \
(e)->hw_intf->idx - INTF_0 : -1, ##__VA_ARGS__)
-#define VBLANK_TIMEOUT msecs_to_jiffies(100)
-
#define to_sde_encoder_phys_vid(x) \
container_of(x, struct sde_encoder_phys_vid, base)
-#define WAIT_TIMEOUT_MSEC 100
-
static bool sde_encoder_phys_vid_is_master(
struct sde_encoder_phys *phys_enc)
{
@@ -60,7 +53,7 @@
}
SDE_DEBUG_VIDENC(vid_enc, "\n");
rc = wait_for_completion_timeout(&vid_enc->vblank_completion,
- VBLANK_TIMEOUT);
+ KICKOFF_TIMEOUT_JIFFIES);
if (rc == 0) {
SDE_ERROR_VIDENC(vid_enc, "timed out waiting for vblank irq\n");
SDE_DBG_DUMP("panic");
@@ -689,11 +682,12 @@
SDE_EVTLOG_FUNC_ENTRY);
ret = wait_for_completion_timeout(&vid_enc->vblank_completion,
- msecs_to_jiffies(WAIT_TIMEOUT_MSEC));
+ KICKOFF_TIMEOUT_JIFFIES);
if (!ret) {
SDE_DEBUG_VIDENC(vid_enc, "wait %u ms timed out\n",
- WAIT_TIMEOUT_MSEC);
- SDE_EVT32(DRMID(phys_enc->parent), WAIT_TIMEOUT_MSEC);
+ KICKOFF_TIMEOUT_MS);
+ SDE_EVT32(DRMID(phys_enc->parent), vid_enc->hw_intf->idx,
+ KICKOFF_TIMEOUT_MS);
return -ETIMEDOUT;
}
@@ -704,15 +698,11 @@
}
static void sde_encoder_phys_vid_prepare_for_kickoff(
- struct sde_encoder_phys *phys_enc,
- bool *need_to_wait)
+ struct sde_encoder_phys *phys_enc)
{
struct sde_encoder_phys_vid *vid_enc =
to_sde_encoder_phys_vid(phys_enc);
- /* Vid encoder is simple, kickoff is immediate */
- *need_to_wait = false;
-
/* Reset completion to wait for the next vblank */
reinit_completion(&vid_enc->vblank_completion);
}
diff --git a/drivers/gpu/drm/msm/sde/sde_encoder_phys_wb.c b/drivers/gpu/drm/msm/sde/sde_encoder_phys_wb.c
index 970969b..65524ea 100644
--- a/drivers/gpu/drm/msm/sde/sde_encoder_phys_wb.c
+++ b/drivers/gpu/drm/msm/sde/sde_encoder_phys_wb.c
@@ -13,8 +13,6 @@
*/
#define pr_fmt(fmt) "[drm:%s:%d] " fmt, __func__, __LINE__
-
-#include <linux/jiffies.h>
#include <linux/debugfs.h>
#include "sde_encoder_phys.h"
@@ -25,9 +23,6 @@
#include "sde_wb.h"
#include "sde_vbif.h"
-/* wait for at most 2 vsync for lowest refresh rate (24hz) */
-#define WAIT_TIMEOUT_MSEC 84
-
#define to_sde_encoder_phys_wb(x) \
container_of(x, struct sde_encoder_phys_wb, base)
@@ -679,7 +674,7 @@
SDE_EVT32(DRMID(phys_enc->parent), WBID(wb_enc), wb_enc->frame_count);
ret = wait_for_completion_timeout(&wb_enc->wbdone_complete,
- msecs_to_jiffies(wb_enc->wbdone_timeout));
+ KICKOFF_TIMEOUT_JIFFIES);
if (!ret) {
SDE_EVT32(DRMID(phys_enc->parent), WBID(wb_enc),
@@ -730,11 +725,9 @@
/**
* sde_encoder_phys_wb_prepare_for_kickoff - pre-kickoff processing
* @phys_enc: Pointer to physical encoder
- * @need_to_wait: Wait for next submission
*/
static void sde_encoder_phys_wb_prepare_for_kickoff(
- struct sde_encoder_phys *phys_enc,
- bool *need_to_wait)
+ struct sde_encoder_phys *phys_enc)
{
struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
int ret;
@@ -742,8 +735,6 @@
SDE_DEBUG("[wb:%d,%u]\n", wb_enc->hw_wb->idx - WB_0,
wb_enc->kickoff_count);
- *need_to_wait = false;
-
reinit_completion(&wb_enc->wbdone_complete);
ret = sde_encoder_phys_wb_register_irq(phys_enc);
@@ -762,8 +753,7 @@
/* vote for iommu/clk/bus */
wb_enc->start_time = ktime_get();
- SDE_EVT32(DRMID(phys_enc->parent), WBID(wb_enc), *need_to_wait,
- wb_enc->kickoff_count);
+ SDE_EVT32(DRMID(phys_enc->parent), WBID(wb_enc), wb_enc->kickoff_count);
}
/**
@@ -1013,7 +1003,7 @@
goto fail_alloc;
}
wb_enc->irq_idx = -EINVAL;
- wb_enc->wbdone_timeout = WAIT_TIMEOUT_MSEC;
+ wb_enc->wbdone_timeout = KICKOFF_TIMEOUT_MS;
init_completion(&wb_enc->wbdone_complete);
phys_enc = &wb_enc->base;