| commit | aa14138a51ca42eada706d4b9635bd32d1e09ced | [log] [tgz] |
|---|---|---|
| author | Philippe Bergheaud <felix@linux.vnet.ibm.com> | Thu Mar 31 11:19:28 2016 +0200 |
| committer | Michael Ellerman <mpe@ellerman.id.au> | Mon Apr 11 20:30:46 2016 +1000 |
| tree | e72b91e5712e1c8b6ef742d94ba0dbf976ddd585 | |
| parent | 86c9ffcc1ed17497a5df473232a7e654fa8cfa1f [diff] |
cxl: Configure the PSL for two CAPI ports on POWER8NVL The POWER8NVL chip has two CAPI ports. Configure the PSL to route data to the port corresponding to the CAPP unit. Signed-off-by: Philippe Bergheaud <felix@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>