Merge "Merge commit '83ad0691' into msm-4.9 - PC 131"
diff --git a/drivers/media/platform/msm/camera/cam_core/cam_context_utils.c b/drivers/media/platform/msm/camera/cam_core/cam_context_utils.c
index 85e9058..b4f83f7 100644
--- a/drivers/media/platform/msm/camera/cam_core/cam_context_utils.c
+++ b/drivers/media/platform/msm/camera/cam_core/cam_context_utils.c
@@ -535,10 +535,9 @@
CAM_SYNC_STATE_SIGNALED_ERROR);
if (rc == -EALREADY) {
CAM_ERR(CAM_CTXT,
- "Req: %llu already signalled, sync_id:%d",
- req->request_id,
- req->out_map_entries[i].
- sync_id);
+ "Req: %llu already signalled, sync_id:%d",
+ req->request_id,
+ req->out_map_entries[i].sync_id);
break;
}
}
@@ -629,6 +628,7 @@
struct cam_ctx_request *req = NULL;
struct cam_hw_flush_args flush_args;
uint32_t i;
+ int32_t sync_id = 0;
int rc = 0;
CAM_DBG(CAM_CTXT, "[%s] E: NRT flush req", ctx->dev_name);
@@ -683,20 +683,20 @@
if (req) {
if (flush_args.num_req_pending || flush_args.num_req_active) {
- for (i = 0; i < req->num_out_map_entries; i++)
- if (req->out_map_entries[i].sync_id != -1) {
- rc = cam_sync_signal(
- req->out_map_entries[i].sync_id,
+ for (i = 0; i < req->num_out_map_entries; i++) {
+ sync_id =
+ req->out_map_entries[i].sync_id;
+ if (sync_id != -1) {
+ rc = cam_sync_signal(sync_id,
CAM_SYNC_STATE_SIGNALED_ERROR);
if (rc == -EALREADY) {
CAM_ERR(CAM_CTXT,
- "Req: %llu already signalled, sync_id:%d",
- req->request_id,
- req->out_map_entries[i].
- sync_id);
+ "Req: %llu already signalled, sync_id:%d",
+ req->request_id, sync_id);
break;
}
}
+ }
if (flush_args.num_req_active) {
spin_lock(&ctx->lock);
list_add_tail(&req->list, &ctx->free_req_list);
diff --git a/drivers/media/platform/msm/camera/cam_cpas/cam_cpas_hw.c b/drivers/media/platform/msm/camera/cam_cpas/cam_cpas_hw.c
index e7de207..5e4ff0d 100644
--- a/drivers/media/platform/msm/camera/cam_cpas/cam_cpas_hw.c
+++ b/drivers/media/platform/msm/camera/cam_cpas/cam_cpas_hw.c
@@ -873,6 +873,7 @@
if (!CAM_CPAS_CLIENT_VALID(client_indx))
return -EINVAL;
+ mutex_lock(&cpas_hw->hw_mutex);
mutex_lock(&cpas_core->client_mutex[client_indx]);
if (!CAM_CPAS_CLIENT_STARTED(cpas_core, client_indx)) {
@@ -892,6 +893,7 @@
unlock_client:
mutex_unlock(&cpas_core->client_mutex[client_indx]);
+ mutex_unlock(&cpas_hw->hw_mutex);
return rc;
}
@@ -907,6 +909,7 @@
struct cam_axi_vote *axi_vote;
enum cam_vote_level applied_level = CAM_SVS_VOTE;
int rc;
+ struct cam_cpas_private_soc *soc_private = NULL;
if (!hw_priv || !start_args) {
CAM_ERR(CAM_CPAS, "Invalid arguments %pK %pK",
@@ -922,6 +925,8 @@
cpas_hw = (struct cam_hw_info *)hw_priv;
cpas_core = (struct cam_cpas *) cpas_hw->core_info;
+ soc_private = (struct cam_cpas_private_soc *)
+ cpas_hw->soc_info.soc_private;
cmd_hw_start = (struct cam_cpas_hw_cmd_start *)start_args;
client_indx = CAM_CPAS_GET_CLIENT_IDX(cmd_hw_start->client_handle);
ahb_vote = cmd_hw_start->ahb_vote;
@@ -1005,8 +1010,9 @@
cpas_client->started = true;
cpas_core->streamon_clients++;
- CAM_DBG(CAM_CPAS, "client_indx=%d, streamon_clients=%d",
- client_indx, cpas_core->streamon_clients);
+ CAM_DBG(CAM_CPAS, "client=%s, streamon_clients=%d",
+ soc_private->client_name[client_indx],
+ cpas_core->streamon_clients);
done:
mutex_unlock(&cpas_core->client_mutex[client_indx]);
mutex_unlock(&cpas_hw->hw_mutex);
@@ -1028,6 +1034,7 @@
struct cam_cpas_client *cpas_client;
struct cam_ahb_vote ahb_vote;
struct cam_axi_vote axi_vote;
+ struct cam_cpas_private_soc *soc_private = NULL;
int rc = 0;
long result;
@@ -1045,6 +1052,8 @@
cpas_hw = (struct cam_hw_info *)hw_priv;
cpas_core = (struct cam_cpas *) cpas_hw->core_info;
+ soc_private = (struct cam_cpas_private_soc *)
+ cpas_hw->soc_info.soc_private;
cmd_hw_stop = (struct cam_cpas_hw_cmd_stop *)stop_args;
client_indx = CAM_CPAS_GET_CLIENT_IDX(cmd_hw_stop->client_handle);
@@ -1054,8 +1063,9 @@
mutex_lock(&cpas_hw->hw_mutex);
mutex_lock(&cpas_core->client_mutex[client_indx]);
- CAM_DBG(CAM_CPAS, "client_indx=%d, streamon_clients=%d",
- client_indx, cpas_core->streamon_clients);
+ CAM_DBG(CAM_CPAS, "client=%s, streamon_clients=%d",
+ soc_private->client_name[client_indx],
+ cpas_core->streamon_clients);
if (!CAM_CPAS_CLIENT_STARTED(cpas_core, client_indx)) {
CAM_ERR(CAM_CPAS, "Client %d is not started", client_indx);
diff --git a/drivers/media/platform/msm/camera/cam_icp/fw_inc/hfi_session_defs.h b/drivers/media/platform/msm/camera/cam_icp/fw_inc/hfi_session_defs.h
index 7b2cb8b..69e6ccf 100644
--- a/drivers/media/platform/msm/camera/cam_icp/fw_inc/hfi_session_defs.h
+++ b/drivers/media/platform/msm/camera/cam_icp/fw_inc/hfi_session_defs.h
@@ -261,8 +261,8 @@
};
struct frame_buffer {
- uint32_t buffer_ptr[MAX_NUM_OF_IMAGE_PLANES];
- uint32_t meta_buffer_ptr[MAX_NUM_OF_IMAGE_PLANES];
+ uint32_t buf_ptr[MAX_NUM_OF_IMAGE_PLANES];
+ uint32_t meta_buf_ptr[MAX_NUM_OF_IMAGE_PLANES];
} __packed;
struct bps_frame_process_data {
diff --git a/drivers/media/platform/msm/camera/cam_icp/icp_hw/bps_hw/bps_dev.c b/drivers/media/platform/msm/camera/cam_icp/icp_hw/bps_hw/bps_dev.c
index 0e36ec0..feb0bd8 100644
--- a/drivers/media/platform/msm/camera/cam_icp/icp_hw/bps_hw/bps_dev.c
+++ b/drivers/media/platform/msm/camera/cam_icp/icp_hw/bps_hw/bps_dev.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -33,6 +33,40 @@
};
EXPORT_SYMBOL(cam_bps_hw_info);
+static bool cam_bps_cpas_cb(uint32_t client_handle, void *userdata,
+ struct cam_cpas_irq_data *irq_data)
+{
+ bool error_handled = false;
+
+ if (!irq_data)
+ return error_handled;
+
+ switch (irq_data->irq_type) {
+ case CAM_CAMNOC_IRQ_IPE_BPS_UBWC_DECODE_ERROR:
+ CAM_ERR_RATE_LIMIT(CAM_ICP,
+ "IPE/BPS UBWC Decode error type=%d status=%x thr_err=%d, fcl_err=%d, len_md_err=%d, format_err=%d",
+ irq_data->irq_type,
+ irq_data->u.dec_err.decerr_status.value,
+ irq_data->u.dec_err.decerr_status.thr_err,
+ irq_data->u.dec_err.decerr_status.fcl_err,
+ irq_data->u.dec_err.decerr_status.len_md_err,
+ irq_data->u.dec_err.decerr_status.format_err);
+ error_handled = true;
+ break;
+ case CAM_CAMNOC_IRQ_IPE_BPS_UBWC_ENCODE_ERROR:
+ CAM_ERR_RATE_LIMIT(CAM_ICP,
+ "IPE/BPS UBWC Encode error type=%d status=%x",
+ irq_data->irq_type,
+ irq_data->u.enc_err.encerr_status.value);
+ error_handled = true;
+ break;
+ default:
+ break;
+ }
+
+ return error_handled;
+}
+
int cam_bps_register_cpas(struct cam_hw_soc_info *soc_info,
struct cam_bps_device_core_info *core_info,
uint32_t hw_idx)
@@ -42,7 +76,7 @@
cpas_register_params.dev = &soc_info->pdev->dev;
memcpy(cpas_register_params.identifier, "bps", sizeof("bps"));
- cpas_register_params.cam_cpas_client_cb = NULL;
+ cpas_register_params.cam_cpas_client_cb = cam_bps_cpas_cb;
cpas_register_params.cell_index = hw_idx;
cpas_register_params.userdata = NULL;
diff --git a/drivers/media/platform/msm/camera/cam_icp/icp_hw/icp_hw_mgr/cam_icp_hw_mgr.c b/drivers/media/platform/msm/camera/cam_icp/icp_hw/icp_hw_mgr/cam_icp_hw_mgr.c
index c6c9b85..9ed71d2 100644
--- a/drivers/media/platform/msm/camera/cam_icp/icp_hw/icp_hw_mgr/cam_icp_hw_mgr.c
+++ b/drivers/media/platform/msm/camera/cam_icp/icp_hw/icp_hw_mgr/cam_icp_hw_mgr.c
@@ -308,8 +308,9 @@
ctx_data = &hw_mgr->ctx_data[i];
mutex_lock(&ctx_data->ctx_mutex);
if ((ctx_data->state == CAM_ICP_CTX_STATE_ACQUIRED) &&
- (ICP_DEV_TYPE_TO_CLK_TYPE(ctx_data->
- icp_dev_acquire_info->dev_type) == clk_info->hw_type)) {
+ (ICP_DEV_TYPE_TO_CLK_TYPE(
+ ctx_data->icp_dev_acquire_info->dev_type)
+ == clk_info->hw_type)) {
busy = cam_icp_frame_pending(ctx_data);
if (busy) {
mutex_unlock(&ctx_data->ctx_mutex);
@@ -2994,6 +2995,8 @@
uint64_t cpu_addr = 0;
struct ipe_frame_process_data *frame_process_data = NULL;
struct bps_frame_process_data *bps_frame_process_data = NULL;
+ struct frame_set *ipe_set = NULL;
+ struct frame_buffer *bps_bufs = NULL;
cmd_desc = (struct cam_cmd_buf_desc *)
((uint32_t *) &packet->payload + packet->cmd_buf_offset/4);
@@ -3042,14 +3045,11 @@
frame_process_data->cdm_buffer_addr = 0;
frame_process_data->cdm_prog_base = 0;
for (i = 0; i < frame_process_data->frames_in_batch; i++) {
+ ipe_set = &frame_process_data->framesets[i];
for (j = 0; j < IPE_IO_IMAGES_MAX; j++) {
for (k = 0; k < MAX_NUM_OF_IMAGE_PLANES; k++) {
- frame_process_data->
- framesets[i].buffers[j].
- buffer_ptr[k] = 0;
- frame_process_data->
- framesets[i].buffers[j].
- meta_buffer_ptr[k] = 0;
+ ipe_set->buffers[j].buf_ptr[k] = 0;
+ ipe_set->buffers[j].meta_buf_ptr[k] = 0;
}
}
}
@@ -3066,11 +3066,10 @@
bps_frame_process_data->strip_lib_out_addr = 0;
bps_frame_process_data->cdm_prog_addr = 0;
for (i = 0; i < BPS_IO_IMAGES_MAX; i++) {
+ bps_bufs = &bps_frame_process_data->buffers[i];
for (j = 0; j < MAX_NUM_OF_IMAGE_PLANES; j++) {
- bps_frame_process_data->
- buffers[i].buffer_ptr[j] = 0;
- bps_frame_process_data->
- buffers[i].meta_buffer_ptr[j] = 0;
+ bps_bufs->buf_ptr[j] = 0;
+ bps_bufs->meta_buf_ptr[j] = 0;
}
}
}
@@ -4028,8 +4027,8 @@
CAM_ERR(CAM_ICP, "read num bps devices failed");
goto num_bps_failed;
}
- icp_hw_mgr.devices[CAM_ICP_DEV_BPS] = kzalloc(
- sizeof(struct cam_hw_intf *) * num_dev, GFP_KERNEL);
+ icp_hw_mgr.devices[CAM_ICP_DEV_BPS] = kcalloc(num_dev,
+ sizeof(struct cam_hw_intf *), GFP_KERNEL);
if (!icp_hw_mgr.devices[CAM_ICP_DEV_BPS]) {
rc = -ENOMEM;
goto num_bps_failed;
diff --git a/drivers/media/platform/msm/camera/cam_isp/cam_isp_context.c b/drivers/media/platform/msm/camera/cam_isp/cam_isp_context.c
index 8753bbb..1106453 100644
--- a/drivers/media/platform/msm/camera/cam_isp/cam_isp_context.c
+++ b/drivers/media/platform/msm/camera/cam_isp/cam_isp_context.c
@@ -26,6 +26,97 @@
static const char isp_dev_name[] = "isp";
+#define INC_STATE_MONITOR_HEAD(head) \
+ (atomic64_add_return(1, head) % \
+ CAM_ISP_CTX_STATE_MONITOR_MAX_ENTRIES)
+
+static void __cam_isp_ctx_update_state_monitor_array(
+ struct cam_isp_context *ctx_isp,
+ enum cam_isp_state_change_trigger trigger_type,
+ uint32_t req_id)
+{
+ int iterator = 0;
+
+ iterator = INC_STATE_MONITOR_HEAD(&ctx_isp->state_monitor_head);
+ ctx_isp->cam_isp_ctx_state_monitor[iterator].curr_state =
+ ctx_isp->substate_activated;
+ ctx_isp->cam_isp_ctx_state_monitor[iterator].trigger =
+ trigger_type;
+ ctx_isp->cam_isp_ctx_state_monitor[iterator].req_id =
+ req_id;
+ ctx_isp->cam_isp_ctx_state_monitor[iterator].evt_time_stamp =
+ jiffies_to_msecs(jiffies);
+}
+
+static const char *__cam_isp_ctx_substate_val_to_type(
+ uint32_t type)
+{
+ switch (type) {
+ case CAM_ISP_CTX_ACTIVATED_SOF:
+ return "SOF";
+ case CAM_ISP_CTX_ACTIVATED_APPLIED:
+ return "APPLIED";
+ case CAM_ISP_CTX_ACTIVATED_EPOCH:
+ return "EPOCH";
+ case CAM_ISP_CTX_ACTIVATED_BUBBLE:
+ return "BUBBLE";
+ case CAM_ISP_CTX_ACTIVATED_BUBBLE_APPLIED:
+ return "BUBBLE_APPLIED";
+ case CAM_ISP_CTX_ACTIVATED_HALT:
+ return "HALT";
+ default:
+ return "CAM_ISP_CTX_INVALID_STATE";
+ }
+}
+
+static const char *__cam_isp_hw_evt_val_to_type(
+ uint32_t evt_id)
+{
+ switch (evt_id) {
+ case CAM_ISP_STATE_CHANGE_TRIGGER_ERROR:
+ return "ERROR";
+ case CAM_ISP_STATE_CHANGE_TRIGGER_SOF:
+ return "SOF";
+ case CAM_ISP_STATE_CHANGE_TRIGGER_REG_UPDATE:
+ return "REG_UPDATE";
+ case CAM_ISP_STATE_CHANGE_TRIGGER_EPOCH:
+ return "EPOCH";
+ case CAM_ISP_STATE_CHANGE_TRIGGER_EOF:
+ return "EOF";
+ case CAM_ISP_STATE_CHANGE_TRIGGER_DONE:
+ return "DONE";
+ default:
+ return "CAM_ISP_EVENT_INVALID";
+ }
+}
+
+static void __cam_isp_ctx_dump_state_monitor_array(
+ struct cam_isp_context *ctx_isp)
+{
+ int i = 0;
+ uint64_t state_head = 0;
+ uint64_t index;
+
+ state_head = atomic64_read(&ctx_isp->state_monitor_head);
+ CAM_ERR_RATE_LIMIT(CAM_ISP,
+ "Dumping state information for preceding requests");
+
+ for (i = CAM_ISP_CTX_STATE_MONITOR_MAX_ENTRIES - 1; i >= 0;
+ i--) {
+ index = (((state_head - i) +
+ CAM_ISP_CTX_STATE_MONITOR_MAX_ENTRIES) %
+ CAM_ISP_CTX_STATE_MONITOR_MAX_ENTRIES);
+ CAM_ERR_RATE_LIMIT(CAM_ISP,
+ "time[0x%llx] req_id[%u] state[%s] evt_type[%s]",
+ ctx_isp->cam_isp_ctx_state_monitor[index].evt_time_stamp,
+ ctx_isp->cam_isp_ctx_state_monitor[index].req_id,
+ __cam_isp_ctx_substate_val_to_type(
+ ctx_isp->cam_isp_ctx_state_monitor[index].curr_state),
+ __cam_isp_hw_evt_val_to_type(
+ ctx_isp->cam_isp_ctx_state_monitor[index].trigger));
+ }
+}
+
static int __cam_isp_ctx_enqueue_request_in_order(
struct cam_context *ctx, struct cam_ctx_request *req)
{
@@ -134,46 +225,46 @@
return rc;
}
-static const char *__cam_isp_resource_handle_id_to_type
- (uint32_t resource_handle)
+static const char *__cam_isp_resource_handle_id_to_type(
+ uint32_t resource_handle)
{
switch (resource_handle) {
case CAM_ISP_IFE_OUT_RES_FULL:
- return "CAM_ISP_IFE_OUT_RES_FULL";
+ return "FULL";
case CAM_ISP_IFE_OUT_RES_DS4:
- return "CAM_ISP_IFE_OUT_RES_DS4";
+ return "DS4";
case CAM_ISP_IFE_OUT_RES_DS16:
- return "CAM_ISP_IFE_OUT_RES_DS16";
+ return "DS16";
case CAM_ISP_IFE_OUT_RES_RAW_DUMP:
- return "CAM_ISP_IFE_OUT_RES_RAW_DUMP";
+ return "RAW_DUMP";
case CAM_ISP_IFE_OUT_RES_FD:
- return "CAM_ISP_IFE_OUT_RES_FD";
+ return "FD";
case CAM_ISP_IFE_OUT_RES_PDAF:
- return "CAM_ISP_IFE_OUT_RES_PDAF";
+ return "PDAF";
case CAM_ISP_IFE_OUT_RES_RDI_0:
- return "CAM_ISP_IFE_OUT_RES_RDI_0";
+ return "RDI_0";
case CAM_ISP_IFE_OUT_RES_RDI_1:
- return "CAM_ISP_IFE_OUT_RES_RDI_1";
+ return "RDI_1";
case CAM_ISP_IFE_OUT_RES_RDI_2:
- return "CAM_ISP_IFE_OUT_RES_RDI_2";
+ return "RDI_2";
case CAM_ISP_IFE_OUT_RES_RDI_3:
- return "CAM_ISP_IFE_OUT_RES_RDI_3";
+ return "RDI_3";
case CAM_ISP_IFE_OUT_RES_STATS_HDR_BE:
- return "CAM_ISP_IFE_OUT_RES_STATS_HDR_BE";
+ return "STATS_HDR_BE";
case CAM_ISP_IFE_OUT_RES_STATS_HDR_BHIST:
- return "CAM_ISP_IFE_OUT_RES_STATS_HDR_BHIST";
+ return "STATS_HDR_BHIST";
case CAM_ISP_IFE_OUT_RES_STATS_TL_BG:
- return "CAM_ISP_IFE_OUT_RES_STATS_TL_BG";
+ return "STATS_TL_BG";
case CAM_ISP_IFE_OUT_RES_STATS_BF:
- return "CAM_ISP_IFE_OUT_RES_STATS_BF";
+ return "STATS_BF";
case CAM_ISP_IFE_OUT_RES_STATS_AWB_BG:
- return "CAM_ISP_IFE_OUT_RES_STATS_AWB_BG";
+ return "STATS_AWB_BG";
case CAM_ISP_IFE_OUT_RES_STATS_BHIST:
- return "CAM_ISP_IFE_OUT_RES_STATS_BHIST";
+ return "STATS_BHIST";
case CAM_ISP_IFE_OUT_RES_STATS_RS:
- return "CAM_ISP_IFE_OUT_RES_STATS_RS";
+ return "STATS_RS";
case CAM_ISP_IFE_OUT_RES_STATS_CS:
- return "CAM_ISP_IFE_OUT_RES_STATS_CS";
+ return "STATS_CS";
default:
return "CAM_ISP_Invalid_Resource_Type";
}
@@ -350,6 +441,9 @@
}
end:
+ __cam_isp_ctx_update_state_monitor_array(ctx_isp,
+ CAM_ISP_STATE_CHANGE_TRIGGER_DONE,
+ ctx_isp->base->req_list->request_id);
return rc;
}
@@ -510,6 +604,11 @@
{
int rc = 0;
struct cam_isp_hw_sof_event_data *sof_event_data = evt_data;
+ struct cam_ctx_request *req;
+ struct cam_context *ctx = ctx_isp->base;
+
+ req = list_last_entry(&ctx->pending_req_list,
+ struct cam_ctx_request, list);
if (!evt_data) {
CAM_ERR(CAM_ISP, "in valid sof event data");
@@ -518,6 +617,8 @@
ctx_isp->frame_id++;
ctx_isp->sof_timestamp_val = sof_event_data->timestamp;
+ __cam_isp_ctx_update_state_monitor_array(ctx_isp,
+ CAM_ISP_STATE_CHANGE_TRIGGER_SOF, req->request_id);
CAM_DBG(CAM_ISP, "frame id: %lld time stamp:0x%llx",
ctx_isp->frame_id, ctx_isp->sof_timestamp_val);
@@ -528,11 +629,11 @@
void *evt_data)
{
int rc = 0;
- struct cam_ctx_request *req;
+ struct cam_ctx_request *req = NULL;
struct cam_isp_ctx_req *req_isp;
struct cam_context *ctx = ctx_isp->base;
- if (ctx->state != CAM_CTX_ACTIVATED) {
+ if (ctx->state != CAM_CTX_ACTIVATED && ctx_isp->frame_id > 1) {
CAM_DBG(CAM_ISP, "invalid RUP");
goto end;
}
@@ -560,6 +661,11 @@
CAM_ISP_CTX_ACTIVATED_EPOCH;
}
}
+ if (req != NULL) {
+ __cam_isp_ctx_update_state_monitor_array(ctx_isp,
+ CAM_ISP_STATE_CHANGE_TRIGGER_REG_UPDATE,
+ req->request_id);
+ }
end:
return rc;
}
@@ -627,6 +733,15 @@
CAM_DBG(CAM_ISP, "next substate %d",
ctx_isp->substate_activated);
end:
+ if (request_id == 0) {
+ req = list_last_entry(&ctx->active_req_list,
+ struct cam_ctx_request, list);
+ __cam_isp_ctx_update_state_monitor_array(ctx_isp,
+ CAM_ISP_STATE_CHANGE_TRIGGER_EPOCH, req->request_id);
+ } else {
+ __cam_isp_ctx_update_state_monitor_array(ctx_isp,
+ CAM_ISP_STATE_CHANGE_TRIGGER_EPOCH, request_id);
+ }
return 0;
}
@@ -649,6 +764,7 @@
int rc = 0;
struct cam_context *ctx = ctx_isp->base;
struct cam_isp_hw_sof_event_data *sof_event_data = evt_data;
+ struct cam_ctx_request *req;
if (!evt_data) {
CAM_ERR(CAM_ISP, "in valid sof event data");
@@ -663,6 +779,10 @@
else
CAM_DBG(CAM_ISP, "Still need to wait for the buf done");
+ req = list_last_entry(&ctx->active_req_list,
+ struct cam_ctx_request, list);
+ __cam_isp_ctx_update_state_monitor_array(ctx_isp,
+ CAM_ISP_STATE_CHANGE_TRIGGER_SOF, ctx->req_list->request_id);
CAM_DBG(CAM_ISP, "next substate %d",
ctx_isp->substate_activated);
@@ -761,6 +881,10 @@
ctx_isp->substate_activated = CAM_ISP_CTX_ACTIVATED_BUBBLE;
CAM_DBG(CAM_ISP, "next substate %d", ctx_isp->substate_activated);
end:
+ req = list_last_entry(&ctx->active_req_list, struct cam_ctx_request,
+ list);
+ __cam_isp_ctx_update_state_monitor_array(ctx_isp,
+ CAM_ISP_STATE_CHANGE_TRIGGER_EPOCH, req->request_id);
return 0;
}
@@ -772,6 +896,9 @@
(struct cam_isp_hw_done_event_data *) evt_data;
rc = __cam_isp_ctx_handle_buf_done_in_activated_state(ctx_isp, done, 1);
+ __cam_isp_ctx_update_state_monitor_array(ctx_isp,
+ CAM_ISP_STATE_CHANGE_TRIGGER_DONE,
+ ctx_isp->base->req_list->request_id);
return rc;
}
@@ -786,6 +913,7 @@
struct cam_isp_ctx_req *req_isp = NULL;
struct cam_req_mgr_error_notify notify;
uint64_t error_request_id;
+ struct cam_hw_fence_map_entry *fence_map_out = NULL;
struct cam_context *ctx = ctx_isp->base;
struct cam_isp_hw_error_event_data *error_event_data =
@@ -814,18 +942,18 @@
if (!req_isp->bubble_report) {
for (i = 0; i < req_isp->num_fence_map_out;
i++) {
+ fence_map_out =
+ &req_isp->fence_map_out[i];
CAM_ERR(CAM_ISP, "req %llu, Sync fd %x",
- req->request_id,
- req_isp->fence_map_out[i].
- sync_id);
+ req->request_id,
+ req_isp->fence_map_out[i].sync_id);
if (req_isp->fence_map_out[i].sync_id
!= -1) {
rc = cam_sync_signal(
- req_isp->fence_map_out[i].
- sync_id,
+ fence_map_out->sync_id,
CAM_SYNC_STATE_SIGNALED_ERROR);
- req_isp->fence_map_out[i].
- sync_id = -1;
+ fence_map_out->sync_id =
+ -1;
}
}
list_del_init(&req->list);
@@ -893,6 +1021,14 @@
rc = -EFAULT;
}
+
+ list_del_init(&req->list);
+ list_add(&req->list, &ctx->pending_req_list);
+ /* might need to check if active list is empty */
+ if (req != NULL) {
+ __cam_isp_ctx_update_state_monitor_array(ctx_isp,
+ CAM_ISP_STATE_CHANGE_TRIGGER_ERROR, req->request_id);
+ }
CAM_DBG(CAM_ISP, "Exit");
return rc;
}
@@ -1013,7 +1149,7 @@
struct cam_ctx_request *active_req;
struct cam_isp_ctx_req *req_isp;
struct cam_isp_ctx_req *active_req_isp;
- struct cam_isp_context *ctx_isp;
+ struct cam_isp_context *ctx_isp = NULL;
struct cam_hw_config_args cfg;
if (list_empty(&ctx->pending_req_list)) {
@@ -1087,6 +1223,11 @@
spin_unlock_bh(&ctx->lock);
}
end:
+ if (ctx_isp != NULL) {
+ __cam_isp_ctx_update_state_monitor_array(ctx_isp,
+ CAM_ISP_STATE_CHANGE_TRIGGER_SOF,
+ ctx->req_list->request_id);
+ }
return rc;
}
@@ -2390,16 +2531,16 @@
struct cam_req_mgr_apply_request *apply)
{
int rc = 0;
+ struct cam_ctx_ops *ctx_ops = NULL;
struct cam_isp_context *ctx_isp =
(struct cam_isp_context *) ctx->ctx_priv;
trace_cam_apply_req("ISP", apply->request_id);
CAM_DBG(CAM_ISP, "Enter: apply req in Substate %d request _id:%lld",
ctx_isp->substate_activated, apply->request_id);
- if (ctx_isp->substate_machine[ctx_isp->substate_activated].
- crm_ops.apply_req) {
- rc = ctx_isp->substate_machine[ctx_isp->substate_activated].
- crm_ops.apply_req(ctx, apply);
+ ctx_ops = &ctx_isp->substate_machine[ctx_isp->substate_activated];
+ if (ctx_ops->crm_ops.apply_req) {
+ rc = ctx_ops->crm_ops.apply_req(ctx, apply);
} else {
CAM_ERR_RATE_LIMIT(CAM_ISP,
"No handle function in activated substate %d",
@@ -2420,6 +2561,7 @@
uint32_t evt_id, void *evt_data)
{
int rc = 0;
+ struct cam_isp_ctx_irq_ops *irq_ops = NULL;
struct cam_context *ctx = (struct cam_context *)context;
struct cam_isp_context *ctx_isp =
(struct cam_isp_context *)ctx->ctx_priv;
@@ -2431,13 +2573,13 @@
CAM_DBG(CAM_ISP, "Enter: State %d, Substate %d, evt id %d",
ctx->state, ctx_isp->substate_activated, evt_id);
- if (ctx_isp->substate_machine_irq[ctx_isp->substate_activated].
- irq_ops[evt_id]) {
- rc = ctx_isp->substate_machine_irq[ctx_isp->substate_activated].
- irq_ops[evt_id](ctx_isp, evt_data);
+ irq_ops = &ctx_isp->substate_machine_irq[ctx_isp->substate_activated];
+ if (irq_ops->irq_ops[evt_id]) {
+ rc = irq_ops->irq_ops[evt_id](ctx_isp, evt_data);
} else {
CAM_DBG(CAM_ISP, "No handle function for substate %d",
ctx_isp->substate_activated);
+ __cam_isp_ctx_dump_state_monitor_array(ctx_isp);
}
CAM_DBG(CAM_ISP, "Exit: State %d Substate %d",
ctx->state, ctx_isp->substate_activated);
@@ -2551,6 +2693,12 @@
ctx_base->state_machine = cam_isp_ctx_top_state_machine;
ctx_base->ctx_priv = ctx;
+ /* initializing current state for error logging */
+ for (i = 0; i < CAM_ISP_CTX_STATE_MONITOR_MAX_ENTRIES; i++) {
+ ctx->cam_isp_ctx_state_monitor[i].curr_state =
+ CAM_ISP_CTX_ACTIVATED_MAX;
+ }
+ atomic64_set(&ctx->state_monitor_head, -1);
err:
return rc;
}
diff --git a/drivers/media/platform/msm/camera/cam_isp/cam_isp_context.h b/drivers/media/platform/msm/camera/cam_isp/cam_isp_context.h
index 38ea58d..1eae89f 100644
--- a/drivers/media/platform/msm/camera/cam_isp/cam_isp_context.h
+++ b/drivers/media/platform/msm/camera/cam_isp/cam_isp_context.h
@@ -28,11 +28,16 @@
#define CAM_ISP_CTX_RES_MAX 20
/*
- * Maxiimum configuration entry size - This is based on the
+ * Maximum configuration entry size - This is based on the
* worst case DUAL IFE use case plus some margin.
*/
#define CAM_ISP_CTX_CFG_MAX 22
+/*
+ * Maximum entries in state monitoring array for error logging
+ */
+#define CAM_ISP_CTX_STATE_MONITOR_MAX_ENTRIES 20
+
/* forward declaration */
struct cam_isp_context;
@@ -56,6 +61,19 @@
CAM_ISP_CTX_ACTIVATED_MAX,
};
+/**
+ * enum cam_isp_state_change_trigger - Different types of ISP events
+ *
+ */
+enum cam_isp_state_change_trigger {
+ CAM_ISP_STATE_CHANGE_TRIGGER_ERROR,
+ CAM_ISP_STATE_CHANGE_TRIGGER_SOF,
+ CAM_ISP_STATE_CHANGE_TRIGGER_REG_UPDATE,
+ CAM_ISP_STATE_CHANGE_TRIGGER_EPOCH,
+ CAM_ISP_STATE_CHANGE_TRIGGER_EOF,
+ CAM_ISP_STATE_CHANGE_TRIGGER_DONE,
+ CAM_ISP_STATE_CHANGE_TRIGGER_MAX
+};
/**
* struct cam_isp_ctx_irq_ops - Function table for handling IRQ callbacks
@@ -101,23 +119,44 @@
};
/**
- * struct cam_isp_context - ISP context object
+ * struct cam_isp_context_state_monitor - ISP context state
+ * monitoring for
+ * debug purposes
*
- * @base: Common context object pointer
- * @frame_id: Frame id tracking for the isp context
- * @substate_actiavted: Current substate for the activated state.
- * @substate_machine: ISP substate machine for external interface
- * @substate_machine_irq: ISP substate machine for irq handling
- * @req_base: Common request object storage
- * @req_isp: ISP private request object storage
- * @hw_ctx: HW object returned by the acquire device command
- * @sof_timestamp_val: Captured time stamp value at sof hw event
- * @active_req_cnt: Counter for the active request
- * @reported_req_id: Last reported request id
- * @subscribe_event: The irq event mask that CRM subscribes to, IFE will
- * invoke CRM cb at those event.
- * @last_applied_req_id: Last applied request id
- * @frame_skip_count: Number of frame to skip before change state
+ *@curr_state: Current sub state that received req
+ *@req_type: Event type of incoming req
+ *@req_id: Request id
+ *@evt_time_stamp Current time stamp
+ *
+ */
+struct cam_isp_context_state_monitor {
+ enum cam_isp_ctx_activated_substate curr_state;
+ enum cam_isp_state_change_trigger trigger;
+ uint32_t req_id;
+ int64_t frame_id;
+ uint64_t evt_time_stamp;
+};
+
+/**
+ * struct cam_isp_context - ISP context object
+ *
+ * @base: Common context object pointer
+ * @frame_id: Frame id tracking for the isp context
+ * @substate_actiavted: Current substate for the activated state.
+ * @substate_machine: ISP substate machine for external interface
+ * @substate_machine_irq: ISP substate machine for irq handling
+ * @req_base: Common request object storage
+ * @req_isp: ISP private request object storage
+ * @hw_ctx: HW object returned by the acquire device command
+ * @sof_timestamp_val: Captured time stamp value at sof hw event
+ * @active_req_cnt: Counter for the active request
+ * @reported_req_id: Last reported request id
+ * @subscribe_event: The irq event mask that CRM subscribes to, IFE
+ * will invoke CRM cb at those event.
+ * @last_applied_req_id: Last applied request id
+ * @frame_skip_count: Number of frame to skip before change state
+ * @state_monitor_head: Write index to the state monitoring array
+ * @cam_isp_ctx_state_monitor: State monitoring array
*
*/
struct cam_isp_context {
@@ -138,6 +177,9 @@
uint32_t subscribe_event;
int64_t last_applied_req_id;
uint32_t frame_skip_count;
+ atomic64_t state_monitor_head;
+ struct cam_isp_context_state_monitor cam_isp_ctx_state_monitor[
+ CAM_ISP_CTX_STATE_MONITOR_MAX_ENTRIES];
};
/**
diff --git a/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.c b/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.c
index 4628172..6e140e2 100644
--- a/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.c
+++ b/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.c
@@ -1809,7 +1809,6 @@
if (cam_cdm_stream_off(ctx->cdm_handle))
CAM_ERR(CAM_ISP, "CDM stream off failed %d",
ctx->cdm_handle);
- cam_tasklet_stop(ctx->common.tasklet_info);
CAM_DBG(CAM_ISP, "Going to stop IFE Mux");
@@ -1831,6 +1830,8 @@
}
}
+ cam_tasklet_stop(ctx->common.tasklet_info);
+
/*
* If Context does not have PIX resources and has only RDI resource
* then take the first base index.
@@ -4031,6 +4032,8 @@
int rc = -EFAULT;
int i, j;
struct cam_iommu_handle cdm_handles;
+ struct cam_ife_hw_mgr_ctx *ctx_pool;
+ struct cam_ife_hw_mgr_res *res_list_ife_out;
CAM_DBG(CAM_ISP, "Enter");
@@ -4135,9 +4138,10 @@
INIT_LIST_HEAD(&g_ife_hw_mgr.ctx_pool[i].res_list_ife_cid);
INIT_LIST_HEAD(&g_ife_hw_mgr.ctx_pool[i].res_list_ife_csid);
INIT_LIST_HEAD(&g_ife_hw_mgr.ctx_pool[i].res_list_ife_src);
+ ctx_pool = &g_ife_hw_mgr.ctx_pool[i];
for (j = 0; j < CAM_IFE_HW_OUT_RES_MAX; j++) {
- INIT_LIST_HEAD(&g_ife_hw_mgr.ctx_pool[i].
- res_list_ife_out[j].list);
+ res_list_ife_out = &ctx_pool->res_list_ife_out[j];
+ INIT_LIST_HEAD(&res_list_ife_out->list);
}
/* init context pool */
diff --git a/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/hw_utils/cam_isp_packet_parser.c b/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/hw_utils/cam_isp_packet_parser.c
index 3606af9..1d38f3b 100644
--- a/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/hw_utils/cam_isp_packet_parser.c
+++ b/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/hw_utils/cam_isp_packet_parser.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -414,6 +414,8 @@
struct cam_ife_hw_mgr_res *hw_mgr_res;
struct cam_isp_hw_get_cmd_update update_buf;
struct cam_isp_hw_get_wm_update wm_update;
+ struct cam_hw_fence_map_entry *out_map_entries;
+ struct cam_hw_fence_map_entry *in_map_entries;
uint32_t kmd_buf_remain_size;
uint32_t i, j, num_out_buf, num_in_buf;
uint32_t res_id_out, res_id_in, plane_id;
@@ -458,14 +460,15 @@
CAM_DBG(CAM_ISP,
"configure output io with fill fence %d",
fill_fence);
+ out_map_entries =
+ &prepare->out_map_entries[num_out_buf];
if (fill_fence) {
if (num_out_buf <
prepare->max_out_map_entries) {
- prepare->out_map_entries[num_out_buf].
- resource_handle =
- io_cfg[i].resource_type;
- prepare->out_map_entries[num_out_buf].
- sync_id = io_cfg[i].fence;
+ out_map_entries->resource_handle =
+ io_cfg[i].resource_type;
+ out_map_entries->sync_id =
+ io_cfg[i].fence;
num_out_buf++;
} else {
CAM_ERR(CAM_ISP, "ln_out:%d max_ln:%d",
@@ -486,14 +489,14 @@
CAM_DBG(CAM_ISP,
"configure input io with fill fence %d",
fill_fence);
+ in_map_entries =
+ &prepare->in_map_entries[num_in_buf];
if (fill_fence) {
if (num_in_buf < prepare->max_in_map_entries) {
- prepare->in_map_entries[num_in_buf].
- resource_handle =
- io_cfg[i].resource_type;
- prepare->in_map_entries[num_in_buf].
- sync_id =
- io_cfg[i].fence;
+ in_map_entries->resource_handle =
+ io_cfg[i].resource_type;
+ in_map_entries->sync_id =
+ io_cfg[i].fence;
num_in_buf++;
} else {
CAM_ERR(CAM_ISP, "ln_in:%d imax_ln:%d",
diff --git a/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/hw_utils/irq_controller/cam_irq_controller.c b/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/hw_utils/irq_controller/cam_irq_controller.c
index 24df4ce..feb79cc 100644
--- a/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/hw_utils/irq_controller/cam_irq_controller.c
+++ b/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/hw_utils/irq_controller/cam_irq_controller.c
@@ -336,9 +336,11 @@
int cam_irq_controller_enable_irq(void *irq_controller, uint32_t handle)
{
- struct cam_irq_controller *controller = irq_controller;
- struct cam_irq_evt_handler *evt_handler = NULL;
- struct cam_irq_evt_handler *evt_handler_temp;
+ struct cam_irq_controller *controller = irq_controller;
+ struct cam_irq_evt_handler *evt_handler = NULL;
+ struct cam_irq_evt_handler *evt_handler_temp;
+ struct cam_irq_register_obj *irq_register = NULL;
+ enum cam_irq_priority_level priority;
unsigned long flags = 0;
unsigned int i;
uint32_t irq_mask;
@@ -369,14 +371,14 @@
return rc;
}
+ priority = evt_handler->priority;
for (i = 0; i < controller->num_registers; i++) {
- controller->irq_register_arr[i].
- top_half_enable_mask[evt_handler->priority] |=
+ irq_register = &controller->irq_register_arr[i];
+ irq_register->top_half_enable_mask[priority] |=
evt_handler->evt_bit_mask_arr[i];
irq_mask = cam_io_r_mb(controller->mem_base +
- controller->irq_register_arr[i].
- mask_reg_offset);
+ irq_register->mask_reg_offset);
irq_mask |= evt_handler->evt_bit_mask_arr[i];
cam_io_w_mb(irq_mask, controller->mem_base +
@@ -390,9 +392,11 @@
int cam_irq_controller_disable_irq(void *irq_controller, uint32_t handle)
{
- struct cam_irq_controller *controller = irq_controller;
- struct cam_irq_evt_handler *evt_handler = NULL;
- struct cam_irq_evt_handler *evt_handler_temp;
+ struct cam_irq_controller *controller = irq_controller;
+ struct cam_irq_evt_handler *evt_handler = NULL;
+ struct cam_irq_evt_handler *evt_handler_temp;
+ struct cam_irq_register_obj *irq_register;
+ enum cam_irq_priority_level priority;
unsigned long flags = 0;
unsigned int i;
uint32_t irq_mask;
@@ -423,31 +427,27 @@
return rc;
}
+ priority = evt_handler->priority;
for (i = 0; i < controller->num_registers; i++) {
- controller->irq_register_arr[i].
- top_half_enable_mask[evt_handler->priority] &=
+ irq_register = &controller->irq_register_arr[i];
+ irq_register->top_half_enable_mask[priority] &=
~(evt_handler->evt_bit_mask_arr[i]);
irq_mask = cam_io_r_mb(controller->mem_base +
- controller->irq_register_arr[i].
- mask_reg_offset);
+ irq_register->mask_reg_offset);
CAM_DBG(CAM_ISP, "irq_mask 0x%x before disable 0x%x",
- controller->irq_register_arr[i].mask_reg_offset,
- irq_mask);
+ irq_register->mask_reg_offset, irq_mask);
irq_mask &= ~(evt_handler->evt_bit_mask_arr[i]);
cam_io_w_mb(irq_mask, controller->mem_base +
- controller->irq_register_arr[i].
- mask_reg_offset);
+ irq_register->mask_reg_offset);
CAM_DBG(CAM_ISP, "irq_mask 0x%x after disable 0x%x",
- controller->irq_register_arr[i].mask_reg_offset,
- irq_mask);
+ irq_register->mask_reg_offset, irq_mask);
/* Clear the IRQ bits of this handler */
cam_io_w_mb(evt_handler->evt_bit_mask_arr[i],
controller->mem_base +
- controller->irq_register_arr[i].
- clear_reg_offset);
+ irq_register->clear_reg_offset);
if (controller->global_clear_offset)
cam_io_w_mb(
@@ -464,9 +464,11 @@
int cam_irq_controller_unsubscribe_irq(void *irq_controller,
uint32_t handle)
{
- struct cam_irq_controller *controller = irq_controller;
- struct cam_irq_evt_handler *evt_handler = NULL;
- struct cam_irq_evt_handler *evt_handler_temp;
+ struct cam_irq_controller *controller = irq_controller;
+ struct cam_irq_evt_handler *evt_handler = NULL;
+ struct cam_irq_evt_handler *evt_handler_temp;
+ struct cam_irq_register_obj *irq_register;
+ enum cam_irq_priority_level priority;
uint32_t i;
uint32_t found = 0;
uint32_t irq_mask;
@@ -490,26 +492,24 @@
}
}
+ priority = evt_handler->priority;
if (found) {
for (i = 0; i < controller->num_registers; i++) {
- controller->irq_register_arr[i].
- top_half_enable_mask[evt_handler->priority] &=
+ irq_register = &controller->irq_register_arr[i];
+ irq_register->top_half_enable_mask[priority] &=
~(evt_handler->evt_bit_mask_arr[i]);
irq_mask = cam_io_r_mb(controller->mem_base +
- controller->irq_register_arr[i].
- mask_reg_offset);
+ irq_register->mask_reg_offset);
irq_mask &= ~(evt_handler->evt_bit_mask_arr[i]);
cam_io_w_mb(irq_mask, controller->mem_base +
- controller->irq_register_arr[i].
- mask_reg_offset);
+ irq_register->mask_reg_offset);
/* Clear the IRQ bits of this handler */
cam_io_w_mb(evt_handler->evt_bit_mask_arr[i],
controller->mem_base +
- controller->irq_register_arr[i].
- clear_reg_offset);
+ irq_register->clear_reg_offset);
if (controller->global_clear_offset)
cam_io_w_mb(
controller->global_clear_bitmask,
@@ -642,7 +642,8 @@
irqreturn_t cam_irq_controller_handle_irq(int irq_num, void *priv)
{
- struct cam_irq_controller *controller = priv;
+ struct cam_irq_controller *controller = priv;
+ struct cam_irq_register_obj *irq_register;
bool need_th_processing[CAM_IRQ_PRIORITY_MAX] = {false};
int i;
int j;
@@ -654,6 +655,7 @@
controller, controller->name, &controller->lock);
spin_lock(&controller->lock);
for (i = 0; i < controller->num_registers; i++) {
+ irq_register = &controller->irq_register_arr[i];
controller->irq_status_arr[i] = cam_io_r_mb(
controller->mem_base +
controller->irq_register_arr[i].status_reg_offset);
@@ -664,8 +666,7 @@
controller->irq_register_arr[i].status_reg_offset,
controller->irq_status_arr[i]);
for (j = 0; j < CAM_IRQ_PRIORITY_MAX; j++) {
- if (controller->irq_register_arr[i].
- top_half_enable_mask[j] &
+ if (irq_register->top_half_enable_mask[j] &
controller->irq_status_arr[i])
need_th_processing[j] = true;
CAM_DBG(CAM_ISP,
diff --git a/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_core.c b/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_core.c
index 328aaaf..34f8c41 100644
--- a/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_core.c
+++ b/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_core.c
@@ -356,6 +356,8 @@
struct cam_ife_csid_reg_offset *csid_reg;
int rc = 0;
uint32_t val = 0, i;
+ uint32_t status;
+
soc_info = &csid_hw->hw_info->soc_info;
csid_reg = csid_hw->csid_info->csid_reg;
@@ -370,8 +372,6 @@
CAM_DBG(CAM_ISP, "CSID:%d Csid reset",
csid_hw->hw_intf->hw_idx);
- init_completion(&csid_hw->csid_top_complete);
-
/* Mask all interrupts */
cam_io_w_mb(0, soc_info->reg_map[0].mem_base +
csid_reg->csi2_reg->csid_csi2_rx_irq_mask_addr);
@@ -417,21 +417,19 @@
cam_io_w_mb(0x2, soc_info->reg_map[0].mem_base +
csid_reg->rdi_reg[i]->csid_rdi_cfg0_addr);
- /* perform the top CSID HW reset */
- cam_io_w_mb(csid_reg->cmn_reg->csid_rst_stb,
+ /* perform the top CSID HW and SW registers reset */
+ cam_io_w_mb(csid_reg->cmn_reg->csid_rst_stb_sw_all,
soc_info->reg_map[0].mem_base +
csid_reg->cmn_reg->csid_rst_strobes_addr);
- CAM_DBG(CAM_ISP, " Waiting for reset complete from irq handler");
- rc = wait_for_completion_timeout(&csid_hw->csid_top_complete,
- msecs_to_jiffies(IFE_CSID_TIMEOUT));
- if (rc <= 0) {
- CAM_ERR(CAM_ISP, "CSID:%d reset completion in fail rc = %d",
- csid_hw->hw_intf->hw_idx, rc);
- if (rc == 0)
- rc = -ETIMEDOUT;
- } else {
- rc = 0;
+ rc = readl_poll_timeout(soc_info->reg_map[0].mem_base +
+ csid_reg->cmn_reg->csid_top_irq_status_addr,
+ status, (status & 0x1) == 0x1,
+ CAM_IFE_CSID_TIMEOUT_SLEEP_US, CAM_IFE_CSID_TIMEOUT_ALL_US);
+ if (rc < 0) {
+ CAM_ERR(CAM_ISP, "CSID:%d csid_reset fail rc = %d",
+ csid_hw->hw_intf->hw_idx, rc);
+ rc = -ETIMEDOUT;
}
val = cam_io_r_mb(soc_info->reg_map[0].mem_base +
@@ -858,6 +856,11 @@
path_data->height = reserve->in_port->height;
path_data->start_line = reserve->in_port->line_start;
path_data->end_line = reserve->in_port->line_stop;
+ path_data->crop_enable = true;
+ CAM_DBG(CAM_ISP, "Res id: %d height:%d line_start %d line_stop %d",
+ reserve->res_id, reserve->in_port->height,
+ reserve->in_port->line_start, reserve->in_port->line_stop);
+
if (reserve->in_port->res_type == CAM_ISP_IFE_IN_RES_TPG) {
path_data->dt = CAM_IFE_CSID_TPG_DT_VAL;
path_data->vc = CAM_IFE_CSID_TPG_VC_VAL;
@@ -867,7 +870,6 @@
}
if (reserve->sync_mode == CAM_ISP_HW_SYNC_MASTER) {
- path_data->crop_enable = 1;
path_data->start_pixel = reserve->in_port->left_start;
path_data->end_pixel = reserve->in_port->left_stop;
path_data->width = reserve->in_port->left_width;
@@ -878,7 +880,6 @@
csid_hw->hw_intf->hw_idx, path_data->start_line,
path_data->end_line);
} else if (reserve->sync_mode == CAM_ISP_HW_SYNC_SLAVE) {
- path_data->crop_enable = 1;
path_data->start_pixel = reserve->in_port->right_start;
path_data->end_pixel = reserve->in_port->right_stop;
path_data->width = reserve->in_port->right_width;
@@ -889,9 +890,13 @@
csid_hw->hw_intf->hw_idx, path_data->start_line,
path_data->end_line);
} else {
- path_data->crop_enable = 0;
path_data->width = reserve->in_port->left_width;
path_data->start_pixel = reserve->in_port->left_start;
+ path_data->end_pixel = reserve->in_port->left_stop;
+ CAM_DBG(CAM_ISP, "Res id: %d left width %d start: %d stop:%d",
+ reserve->res_id, reserve->in_port->left_width,
+ reserve->in_port->left_start,
+ reserve->in_port->left_stop);
}
CAM_DBG(CAM_ISP, "Res %d width %d height %d", reserve->res_id,
@@ -907,7 +912,7 @@
int rc = 0;
struct cam_ife_csid_reg_offset *csid_reg;
struct cam_hw_soc_info *soc_info;
- uint32_t i, status, val;
+ uint32_t i, val;
csid_reg = csid_hw->csid_info->csid_reg;
soc_info = &csid_hw->hw_info->soc_info;
@@ -936,42 +941,10 @@
goto err;
}
-
- CAM_DBG(CAM_ISP, "CSID:%d enable top irq interrupt",
- csid_hw->hw_intf->hw_idx);
-
csid_hw->hw_info->hw_state = CAM_HW_STATE_POWER_UP;
- /* Enable the top IRQ interrupt */
- cam_io_w_mb(1, soc_info->reg_map[0].mem_base +
- csid_reg->cmn_reg->csid_top_irq_mask_addr);
-
+ /* Reset CSID top */
rc = cam_ife_csid_global_reset(csid_hw);
if (rc) {
- CAM_ERR(CAM_ISP, "CSID:%d csid_reset fail rc = %d",
- csid_hw->hw_intf->hw_idx, rc);
- rc = -ETIMEDOUT;
- goto disable_soc;
- }
-
- /*
- * Reset the SW registers
- * SW register reset also reset the mask irq, so poll the irq status
- * to check the reset complete.
- */
- CAM_DBG(CAM_ISP, "CSID:%d Reset Software registers",
- csid_hw->hw_intf->hw_idx);
-
- cam_io_w_mb(csid_reg->cmn_reg->csid_rst_stb_sw_all,
- soc_info->reg_map[0].mem_base +
- csid_reg->cmn_reg->csid_rst_strobes_addr);
-
- rc = readl_poll_timeout(soc_info->reg_map[0].mem_base +
- csid_reg->cmn_reg->csid_top_irq_status_addr,
- status, (status & 0x1) == 0x1,
- CAM_IFE_CSID_TIMEOUT_SLEEP_US, CAM_IFE_CSID_TIMEOUT_ALL_US);
- if (rc < 0) {
- CAM_ERR(CAM_ISP, "software register reset timeout.....");
- rc = -ETIMEDOUT;
goto disable_soc;
}
@@ -1065,6 +1038,7 @@
int rc = 0;
uint32_t val = 0;
struct cam_hw_soc_info *soc_info;
+ struct cam_ife_csid_reg_offset *csid_reg = NULL;
csid_hw->tpg_start_cnt++;
if (csid_hw->tpg_start_cnt == 1) {
@@ -1109,10 +1083,10 @@
}
/* Enable the IFE force clock on for dual isp case */
+ csid_reg = csid_hw->csid_info->csid_reg;
if (csid_hw->tpg_cfg.usage_type) {
rc = cam_ife_csid_enable_ife_force_clock_on(soc_info,
- csid_hw->csid_info->csid_reg->tpg_reg->
- tpg_cpas_ife_reg_offset);
+ csid_reg->tpg_reg->tpg_cpas_ife_reg_offset);
if (rc)
return rc;
}
@@ -1122,10 +1096,9 @@
val |= (0x80 << 8);
val |= (((csid_hw->csi2_rx_cfg.lane_num - 1) & 0x3) << 4);
val |= 7;
- cam_io_w_mb(val, soc_info->reg_map[0].mem_base +
- csid_hw->csid_info->csid_reg->tpg_reg->
- csid_tpg_ctrl_addr);
+ cam_io_w_mb(val, soc_info->reg_map[0].mem_base +
+ csid_reg->tpg_reg->csid_tpg_ctrl_addr);
val = cam_io_r_mb(soc_info->reg_map[0].mem_base + 0x600);
CAM_DBG(CAM_ISP, "reg 0x%x = 0x%x", 0x600, val);
}
@@ -1138,6 +1111,7 @@
{
int rc = 0;
struct cam_hw_soc_info *soc_info;
+ struct cam_ife_csid_reg_offset *csid_reg = NULL;
if (csid_hw->tpg_start_cnt)
csid_hw->tpg_start_cnt--;
@@ -1146,6 +1120,7 @@
return 0;
soc_info = &csid_hw->hw_info->soc_info;
+ csid_reg = csid_hw->csid_info->csid_reg;
/* disable the TPG */
if (!csid_hw->tpg_start_cnt) {
@@ -1155,8 +1130,7 @@
/* Disable the IFE force clock on for dual isp case */
if (csid_hw->tpg_cfg.usage_type)
rc = cam_ife_csid_disable_ife_force_clock_on(soc_info,
- csid_hw->csid_info->csid_reg->tpg_reg->
- tpg_cpas_ife_reg_offset);
+ csid_reg->tpg_reg->tpg_cpas_ife_reg_offset);
/*stop the TPG */
cam_io_w_mb(0, soc_info->reg_map[0].mem_base +
@@ -1669,6 +1643,10 @@
if (rc)
return rc;
+ /* if path decode format is payload only then RDI crop is not applied */
+ if (path_format == 0xF)
+ path_data->crop_enable = 0;
+
/*
* RDI path config and enable the time stamp capture
* Enable the measurement blocks
@@ -1905,6 +1883,7 @@
struct cam_isp_resource_node *res;
struct cam_ife_csid_reg_offset *csid_reg;
struct cam_hw_soc_info *soc_info;
+ struct cam_ife_csid_rdi_reg_offset *rdi_reg;
uint32_t time_32, id;
time_stamp = (struct cam_csid_get_time_stamp_args *)cmd_args;
@@ -1937,15 +1916,14 @@
time_stamp->time_stamp_val |= time_32;
} else {
id = res->res_id;
+ rdi_reg = csid_reg->rdi_reg[id];
time_32 = cam_io_r_mb(soc_info->reg_map[0].mem_base +
- csid_reg->rdi_reg[id]->
- csid_rdi_timestamp_curr1_sof_addr);
+ rdi_reg->csid_rdi_timestamp_curr1_sof_addr);
time_stamp->time_stamp_val = time_32;
time_stamp->time_stamp_val = time_stamp->time_stamp_val << 32;
time_32 = cam_io_r_mb(soc_info->reg_map[0].mem_base +
- csid_reg->rdi_reg[id]->
- csid_rdi_timestamp_curr0_sof_addr);
+ rdi_reg->csid_rdi_timestamp_curr0_sof_addr);
time_stamp->time_stamp_val |= time_32;
}
@@ -2171,6 +2149,7 @@
struct cam_ife_csid_reg_offset *csid_reg =
csid_hw->csid_info->csid_reg;
+ init_completion(&csid_hw->csid_top_complete);
cam_io_w_mb(csid_reg->cmn_reg->csid_rst_stb,
csid_hw->hw_info->soc_info.reg_map[0].mem_base +
csid_reg->cmn_reg->csid_rst_strobes_addr);
@@ -2490,6 +2469,7 @@
struct cam_ife_csid_hw *csid_hw;
struct cam_hw_soc_info *soc_info;
struct cam_ife_csid_reg_offset *csid_reg;
+ struct cam_ife_csid_csi2_rx_reg_offset *csi2_reg;
uint32_t i, irq_status_top, irq_status_rx, irq_status_ipp = 0;
uint32_t irq_status_rdi[4] = {0, 0, 0, 0};
uint32_t val;
@@ -2505,6 +2485,7 @@
csid_reg = csid_hw->csid_info->csid_reg;
soc_info = &csid_hw->hw_info->soc_info;
+ csi2_reg = csid_reg->csi2_reg;
/* read */
irq_status_top = cam_io_r_mb(soc_info->reg_map[0].mem_base +
@@ -2653,19 +2634,16 @@
CAM_ERR(CAM_ISP, "CSID:%d LONG_PKT_CAPTURED",
csid_hw->hw_intf->hw_idx);
val = cam_io_r_mb(soc_info->reg_map[0].mem_base +
- csid_reg->csi2_reg->
- csid_csi2_rx_captured_long_pkt_0_addr);
+ csi2_reg->csid_csi2_rx_captured_long_pkt_0_addr);
CAM_ERR(CAM_ISP, "CSID:%d long packet VC :%d DT:%d WC:%d",
csid_hw->hw_intf->hw_idx,
(val >> 22), ((val >> 16) & 0x3F), (val & 0xFFFF));
val = cam_io_r_mb(soc_info->reg_map[0].mem_base +
- csid_reg->csi2_reg->
- csid_csi2_rx_captured_long_pkt_1_addr);
+ csi2_reg->csid_csi2_rx_captured_long_pkt_1_addr);
CAM_ERR(CAM_ISP, "CSID:%d long packet ECC :%d",
csid_hw->hw_intf->hw_idx, val);
val = cam_io_r_mb(soc_info->reg_map[0].mem_base +
- csid_reg->csi2_reg->
- csid_csi2_rx_captured_long_pkt_ftr_addr);
+ csi2_reg->csid_csi2_rx_captured_long_pkt_ftr_addr);
CAM_ERR(CAM_ISP, "CSID:%d long pkt cal CRC:%d expected CRC:%d",
csid_hw->hw_intf->hw_idx, (val >> 16), (val & 0xFFFF));
}
@@ -2674,14 +2652,12 @@
CAM_ERR(CAM_ISP, "CSID:%d SHORT_PKT_CAPTURED",
csid_hw->hw_intf->hw_idx);
val = cam_io_r_mb(soc_info->reg_map[0].mem_base +
- csid_reg->csi2_reg->
- csid_csi2_rx_captured_short_pkt_0_addr);
+ csi2_reg->csid_csi2_rx_captured_short_pkt_0_addr);
CAM_ERR(CAM_ISP, "CSID:%d short pkt VC :%d DT:%d LC:%d",
csid_hw->hw_intf->hw_idx,
(val >> 22), ((val >> 16) & 0x1F), (val & 0xFFFF));
val = cam_io_r_mb(soc_info->reg_map[0].mem_base +
- csid_reg->csi2_reg->
- csid_csi2_rx_captured_short_pkt_1_addr);
+ csi2_reg->csid_csi2_rx_captured_short_pkt_1_addr);
CAM_ERR(CAM_ISP, "CSID:%d short packet ECC :%d",
csid_hw->hw_intf->hw_idx, val);
}
@@ -2691,8 +2667,7 @@
CAM_ERR(CAM_ISP, "CSID:%d CPHY_PKT_HDR_CAPTURED",
csid_hw->hw_intf->hw_idx);
val = cam_io_r_mb(soc_info->reg_map[0].mem_base +
- csid_reg->csi2_reg->
- csid_csi2_rx_captured_cphy_pkt_hdr_addr);
+ csi2_reg->csid_csi2_rx_captured_cphy_pkt_hdr_addr);
CAM_ERR(CAM_ISP, "CSID:%d cphy packet VC :%d DT:%d WC:%d",
csid_hw->hw_intf->hw_idx,
(val >> 22), ((val >> 16) & 0x1F), (val & 0xFFFF));
diff --git a/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/cam_vfe_core.c b/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/cam_vfe_core.c
index 2c4fe9d..fd38a96 100644
--- a/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/cam_vfe_core.c
+++ b/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/cam_vfe_core.c
@@ -32,17 +32,17 @@
};
static uint32_t camif_irq_reg_mask[CAM_IFE_IRQ_REGISTERS_MAX] = {
- 0x0003FD1F,
+ 0x00000017,
0x00000000,
};
static uint32_t camif_irq_err_reg_mask[CAM_IFE_IRQ_REGISTERS_MAX] = {
- 0x00000000,
+ 0x0003FC00,
0x0FFF7EBC,
};
static uint32_t rdi_irq_reg_mask[CAM_IFE_IRQ_REGISTERS_MAX] = {
- 0x780000e0,
+ 0x780001e0,
0x00000000,
};
@@ -89,9 +89,10 @@
spin_lock_irqsave(&vfe_core_info->spin_lock, flags);
(*evt_payload)->error_type = 0;
list_add_tail(&(*evt_payload)->list, &vfe_core_info->free_payload_list);
+ *evt_payload = NULL;
spin_unlock_irqrestore(&vfe_core_info->spin_lock, flags);
- *evt_payload = NULL;
+
return 0;
}
@@ -156,6 +157,7 @@
struct cam_vfe_irq_handler_priv *handler_priv;
struct cam_vfe_top_irq_evt_payload *evt_payload;
struct cam_vfe_hw_core_info *core_info;
+ bool error_flag = false;
CAM_DBG(CAM_ISP, "IRQ status_0 = %x, IRQ status_1 = %x",
th_payload->evt_status_arr[0], th_payload->evt_status_arr[1]);
@@ -166,14 +168,20 @@
* need to handle overflow condition here, otherwise irq storm
* will block everything
*/
-
- if (th_payload->evt_status_arr[1]) {
- CAM_ERR(CAM_ISP, "IRQ status_1: %x, Masking all interrupts",
+ if (th_payload->evt_status_arr[1] ||
+ (th_payload->evt_status_arr[0] & camif_irq_err_reg_mask[0])) {
+ CAM_ERR(CAM_ISP,
+ "Encountered Error: vfe:%d: Irq_status0=0x%x Status1=0x%x",
+ handler_priv->core_index, th_payload->evt_status_arr[0],
th_payload->evt_status_arr[1]);
+ CAM_ERR(CAM_ISP,
+ "Stopping further IRQ processing from this HW index=%d",
+ handler_priv->core_index);
cam_irq_controller_disable_irq(core_info->vfe_irq_controller,
core_info->irq_err_handle);
cam_irq_controller_clear_and_mask(evt_id,
core_info->vfe_irq_controller);
+ error_flag = true;
}
rc = cam_vfe_get_evt_payload(handler_priv->core_info, &evt_payload);
@@ -200,7 +208,9 @@
irq_reg_offset[i]);
}
- CAM_DBG(CAM_ISP, "Violation status = %x", evt_payload->irq_reg_val[2]);
+ if (error_flag)
+ CAM_INFO(CAM_ISP, "Violation status = %x",
+ evt_payload->irq_reg_val[2]);
th_payload->evt_payload_priv = evt_payload;
@@ -291,6 +301,8 @@
struct cam_vfe_hw_core_info *core_info = NULL;
struct cam_isp_resource_node *isp_res = NULL;
int rc = 0;
+ uint32_t reset_core_args =
+ CAM_VFE_HW_RESET_HW_AND_REG;
CAM_DBG(CAM_ISP, "Enter");
if (!hw_priv) {
@@ -327,6 +339,8 @@
CAM_ERR(CAM_ISP, "deinit failed");
}
+ rc = cam_vfe_reset(hw_priv, &reset_core_args, sizeof(uint32_t));
+
/* Turn OFF Regulators, Clocks and other SOC resources */
CAM_DBG(CAM_ISP, "Disable SOC resource");
rc = cam_vfe_disable_soc_resources(soc_info);
@@ -373,7 +387,7 @@
reinit_completion(&vfe_hw->hw_complete);
- CAM_DBG(CAM_ISP, "calling RESET");
+ CAM_DBG(CAM_ISP, "calling RESET on vfe %d", soc_info->index);
core_info->vfe_top->hw_ops.reset(core_info->vfe_top->top_priv,
reset_core_args, arg_size);
CAM_DBG(CAM_ISP, "waiting for vfe reset complete");
@@ -416,23 +430,6 @@
CAM_DBG(CAM_ISP, "IRQ status_0 = %x", th_payload->evt_status_arr[0]);
CAM_DBG(CAM_ISP, "IRQ status_1 = %x", th_payload->evt_status_arr[1]);
- /*
- * need to handle non-recoverable condition here, otherwise irq storm
- * will block everything.
- */
- if (th_payload->evt_status_arr[0] & 0x3FC00) {
- CAM_ERR(CAM_ISP,
- "Encountered Error Irq_status0=0x%x Status1=0x%x",
- th_payload->evt_status_arr[0],
- th_payload->evt_status_arr[1]);
- CAM_ERR(CAM_ISP,
- "Stopping further IRQ processing from this HW index=%d",
- handler_priv->core_index);
- cam_io_w(0, handler_priv->mem_base + 0x60);
- cam_io_w(0, handler_priv->mem_base + 0x5C);
- return 0;
- }
-
rc = cam_vfe_get_evt_payload(handler_priv->core_info, &evt_payload);
if (rc) {
CAM_ERR_RATE_LIMIT(CAM_ISP,
@@ -705,6 +702,7 @@
case CAM_ISP_HW_CMD_GET_BUF_UPDATE:
case CAM_ISP_HW_CMD_GET_HFR_UPDATE:
case CAM_ISP_HW_CMD_STRIPE_UPDATE:
+ case CAM_ISP_HW_CMD_STOP_BUS_ERR_IRQ:
rc = core_info->vfe_bus->hw_ops.process_cmd(
core_info->vfe_bus->bus_priv, cmd_type, cmd_args,
arg_size);
diff --git a/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_bus/cam_vfe_bus_ver2.c b/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_bus/cam_vfe_bus_ver2.c
index ed728f5..969b75a 100644
--- a/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_bus/cam_vfe_bus_ver2.c
+++ b/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_bus/cam_vfe_bus_ver2.c
@@ -2291,6 +2291,7 @@
struct cam_buf_io_cfg *io_cfg;
struct cam_vfe_bus_ver2_vfe_out_data *vfe_out_data = NULL;
struct cam_vfe_bus_ver2_wm_resource_data *wm_data = NULL;
+ struct cam_vfe_bus_ver2_reg_offset_ubwc_client *ubwc_client = NULL;
uint32_t *reg_val_pair;
uint32_t i, j, size = 0;
uint32_t frame_inc = 0, ubwc_bw_limit = 0, camera_hw_version, val;
@@ -2326,7 +2327,7 @@
}
wm_data = vfe_out_data->wm_res[i]->res_priv;
-
+ ubwc_client = wm_data->hw_regs->ubwc_regs;
/* update width register */
CAM_VFE_ADD_REG_VAL_PAIR(reg_val_pair, j,
wm_data->hw_regs->buffer_width_cfg,
@@ -2398,9 +2399,8 @@
* update offset value.
*/
CAM_VFE_ADD_REG_VAL_PAIR(reg_val_pair,
- j,
- wm_data->hw_regs->ubwc_regs->
- h_init, wm_data->offset);
+ j, ubwc_client->h_init,
+ wm_data->offset);
wm_data->h_init = wm_data->offset;
}
} else if (wm_data->h_init !=
@@ -2428,8 +2428,7 @@
io_cfg->planes[i].meta_stride ||
!wm_data->init_cfg_done) {
CAM_VFE_ADD_REG_VAL_PAIR(reg_val_pair, j,
- wm_data->hw_regs->ubwc_regs->
- meta_stride,
+ ubwc_client->meta_stride,
io_cfg->planes[i].meta_stride);
wm_data->ubwc_meta_stride =
io_cfg->planes[i].meta_stride;
@@ -2453,8 +2452,7 @@
io_cfg->planes[i].meta_offset ||
!wm_data->init_cfg_done) {
CAM_VFE_ADD_REG_VAL_PAIR(reg_val_pair, j,
- wm_data->hw_regs->ubwc_regs->
- meta_offset,
+ ubwc_client->meta_offset,
io_cfg->planes[i].meta_offset);
wm_data->ubwc_meta_offset =
io_cfg->planes[i].meta_offset;
@@ -2849,7 +2847,7 @@
case CAM_ISP_HW_CMD_STOP_BUS_ERR_IRQ:
bus_priv = (struct cam_vfe_bus_ver2_priv *) priv;
if (bus_priv->error_irq_handle) {
- CAM_INFO(CAM_ISP, "Mask off bus error irq handler");
+ CAM_DBG(CAM_ISP, "Mask off bus error irq handler");
rc = cam_irq_controller_unsubscribe_irq(
bus_priv->common_data.bus_irq_controller,
bus_priv->error_irq_handle);
diff --git a/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_top_ver2.c b/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_top_ver2.c
index 976e6d2..5d6045b 100644
--- a/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_top_ver2.c
+++ b/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_top_ver2.c
@@ -275,7 +275,7 @@
}
if (hw_info->hw_state != CAM_HW_STATE_POWER_UP) {
- CAM_ERR_RATE_LIMIT(CAM_ISP,
+ CAM_DBG(CAM_ISP,
"VFE:%d Not ready to set clocks yet :%d",
res->hw_intf->hw_idx,
hw_info->hw_state);
diff --git a/drivers/media/platform/msm/camera/cam_jpeg/jpeg_hw/cam_jpeg_hw_mgr.c b/drivers/media/platform/msm/camera/cam_jpeg/jpeg_hw/cam_jpeg_hw_mgr.c
index 32f11a7..f172a79 100644
--- a/drivers/media/platform/msm/camera/cam_jpeg/jpeg_hw/cam_jpeg_hw_mgr.c
+++ b/drivers/media/platform/msm/camera/cam_jpeg/jpeg_hw/cam_jpeg_hw_mgr.c
@@ -145,8 +145,7 @@
}
rc = cam_mem_get_cpu_buf(
- p_cfg_req->hw_cfg_args.
- hw_update_entries[CAM_JPEG_PARAM].handle,
+ p_cfg_req->hw_cfg_args.hw_update_entries[CAM_JPEG_PARAM].handle,
(uint64_t *)&kaddr, &cmd_buf_len);
if (rc) {
CAM_ERR(CAM_JPEG, "unable to get info for cmd buf: %x %d",
@@ -157,20 +156,20 @@
cmd_buf_kaddr = (uint32_t *)kaddr;
cmd_buf_kaddr =
- (cmd_buf_kaddr + (p_cfg_req->hw_cfg_args.
- hw_update_entries[CAM_JPEG_PARAM].offset / sizeof(uint32_t)));
+ (cmd_buf_kaddr +
+ (p_cfg_req->hw_cfg_args.hw_update_entries[CAM_JPEG_PARAM].offset
+ / sizeof(uint32_t)));
p_params = (struct cam_jpeg_config_inout_param_info *)cmd_buf_kaddr;
p_params->output_size = task_data->result_size;
CAM_DBG(CAM_JPEG, "Encoded Size %d", task_data->result_size);
- buf_data.num_handles = p_cfg_req->
- hw_cfg_args.num_out_map_entries;
+ buf_data.num_handles =
+ p_cfg_req->hw_cfg_args.num_out_map_entries;
for (i = 0; i < buf_data.num_handles; i++) {
buf_data.resource_handle[i] =
- p_cfg_req->hw_cfg_args.
- out_map_entries[i].resource_handle;
+ p_cfg_req->hw_cfg_args.out_map_entries[i].resource_handle;
}
buf_data.request_id =
(uint64_t)p_cfg_req->hw_cfg_args.priv;
@@ -267,8 +266,8 @@
uint32_t *ch_base_iova_addr;
size_t ch_base_len;
- rc = cam_mem_get_cpu_buf(config_args->
- hw_update_entries[CAM_JPEG_CHBASE].handle,
+ rc = cam_mem_get_cpu_buf(
+ config_args->hw_update_entries[CAM_JPEG_CHBASE].handle,
&iova_addr, &ch_base_len);
if (rc) {
CAM_ERR(CAM_JPEG,
@@ -285,10 +284,10 @@
dev_type = ctx_data->jpeg_dev_acquire_info.dev_type;
mem_cam_base = hw_mgr->cdm_reg_map[dev_type][0]->mem_cam_base;
- size = hw_mgr->cdm_info[dev_type][0].cdm_ops->
- cdm_required_size_changebase();
- hw_mgr->cdm_info[dev_type][0].cdm_ops->
- cdm_write_changebase(ch_base_iova_addr, mem_cam_base);
+ size =
+ hw_mgr->cdm_info[dev_type][0].cdm_ops->cdm_required_size_changebase();
+ hw_mgr->cdm_info[dev_type][0].cdm_ops->cdm_write_changebase(
+ ch_base_iova_addr, mem_cam_base);
cdm_cmd = ctx_data->cdm_cmd;
cdm_cmd->cmd[cdm_cmd->cmd_arrary_count].bl_addr.mem_handle =
@@ -322,6 +321,7 @@
struct cam_jpeg_set_irq_cb irq_cb;
struct cam_jpeg_hw_cfg_req *p_cfg_req = NULL;
struct cam_hw_done_event_data buf_data;
+ struct cam_hw_config_args *hw_cfg_args = NULL;
if (!hw_mgr || !task_data) {
CAM_ERR(CAM_JPEG, "Invalid arguments %pK %pK",
@@ -444,8 +444,8 @@
for (i = CAM_JPEG_CFG; i < (config_args->num_hw_update_entries - 1);
i++) {
cmd = (config_args->hw_update_entries + i);
- cdm_cmd->cmd[cdm_cmd->cmd_arrary_count].
- bl_addr.mem_handle = cmd->handle;
+ cdm_cmd->cmd[cdm_cmd->cmd_arrary_count].bl_addr.mem_handle
+ = cmd->handle;
cdm_cmd->cmd[cdm_cmd->cmd_arrary_count].offset =
cmd->offset;
cdm_cmd->cmd[cdm_cmd->cmd_arrary_count].len =
@@ -456,8 +456,7 @@
}
rc = cam_cdm_submit_bls(
- hw_mgr->cdm_info[dev_type][0].cdm_handle,
- cdm_cmd);
+ hw_mgr->cdm_info[dev_type][0].cdm_handle, cdm_cmd);
if (rc) {
CAM_ERR(CAM_JPEG, "Failed to apply the configs %d", rc);
goto end_callcb;
@@ -483,15 +482,14 @@
end_callcb:
mutex_unlock(&hw_mgr->hw_mgr_mutex);
if (p_cfg_req) {
- buf_data.num_handles = p_cfg_req->
- hw_cfg_args.num_out_map_entries;
+ hw_cfg_args = &p_cfg_req->hw_cfg_args;
+ buf_data.num_handles =
+ hw_cfg_args->num_out_map_entries;
for (i = 0; i < buf_data.num_handles; i++) {
buf_data.resource_handle[i] =
- p_cfg_req->hw_cfg_args.
- out_map_entries[i].resource_handle;
+ hw_cfg_args->out_map_entries[i].resource_handle;
}
- buf_data.request_id =
- (uint64_t)p_cfg_req->hw_cfg_args.priv;
+ buf_data.request_id = (uint64_t)p_cfg_req->hw_cfg_args.priv;
ctx_data->ctxt_event_cb(ctx_data->context_priv, 0, &buf_data);
}
@@ -753,8 +751,8 @@
p_cfg_req = hw_mgr->dev_hw_cfg_args[dev_type][0];
if (hw_mgr->device_in_use[dev_type][0] == true &&
p_cfg_req != NULL) {
- if ((struct cam_jpeg_hw_ctx_data *)p_cfg_req->
- hw_cfg_args.ctxt_to_hw_map == ctx_data) {
+ if ((struct cam_jpeg_hw_ctx_data *)
+ p_cfg_req->hw_cfg_args.ctxt_to_hw_map == ctx_data) {
/* stop reset Unregister CB and deinit */
irq_cb.jpeg_hw_mgr_cb = cam_jpeg_hw_mgr_cb;
irq_cb.data = NULL;
@@ -811,8 +809,8 @@
list_for_each_entry_safe(cfg_req, req_temp,
&hw_mgr->hw_config_req_list, list) {
- if ((cfg_req) && ((struct cam_jpeg_hw_ctx_data *)cfg_req->
- hw_cfg_args.ctxt_to_hw_map != ctx_data))
+ if ((cfg_req) && ((struct cam_jpeg_hw_ctx_data *)
+ cfg_req->hw_cfg_args.ctxt_to_hw_map != ctx_data))
continue;
list_del_init(&cfg_req->list);
@@ -1091,8 +1089,8 @@
hw_mgr->cdm_info[dev_type][0].ref_cnt++;
}
- size = hw_mgr->cdm_info[dev_type][0].
- cdm_ops->cdm_required_size_changebase();
+ size =
+ hw_mgr->cdm_info[dev_type][0].cdm_ops->cdm_required_size_changebase();
if (hw_mgr->cdm_info[dev_type][0].ref_cnt == 1)
if (cam_cdm_stream_on(
diff --git a/drivers/media/platform/msm/camera/cam_jpeg/jpeg_hw/jpeg_dma_hw/jpeg_dma_core.c b/drivers/media/platform/msm/camera/cam_jpeg/jpeg_hw/jpeg_dma_hw/jpeg_dma_core.c
index 2d343dd..bc6dce9 100644
--- a/drivers/media/platform/msm/camera/cam_jpeg/jpeg_hw/jpeg_dma_hw/jpeg_dma_core.c
+++ b/drivers/media/platform/msm/camera/cam_jpeg/jpeg_hw/jpeg_dma_hw/jpeg_dma_core.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -47,9 +47,8 @@
}
soc_info = &jpeg_dma_dev->soc_info;
- core_info =
- (struct cam_jpeg_dma_device_core_info *)jpeg_dma_dev->
- core_info;
+ core_info = (struct cam_jpeg_dma_device_core_info *)
+ jpeg_dma_dev->core_info;
if (!soc_info || !core_info) {
CAM_ERR(CAM_JPEG, "soc_info = %pK core_info = %pK",
@@ -159,9 +158,8 @@
return -EINVAL;
}
- core_info =
- (struct cam_jpeg_dma_device_core_info *)jpeg_dma_dev->
- core_info;
+ core_info = (struct cam_jpeg_dma_device_core_info *)
+ jpeg_dma_dev->core_info;
switch (cmd_type) {
case CAM_JPEG_CMD_SET_IRQ_CB:
diff --git a/drivers/media/platform/msm/camera/cam_jpeg/jpeg_hw/jpeg_dma_hw/jpeg_dma_dev.c b/drivers/media/platform/msm/camera/cam_jpeg/jpeg_hw/jpeg_dma_hw/jpeg_dma_dev.c
index 05ae7cc..ef10406 100644
--- a/drivers/media/platform/msm/camera/cam_jpeg/jpeg_hw/jpeg_dma_hw/jpeg_dma_dev.c
+++ b/drivers/media/platform/msm/camera/cam_jpeg/jpeg_hw/jpeg_dma_hw/jpeg_dma_dev.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -153,8 +153,8 @@
rc = -ENOMEM;
goto error_alloc_core;
}
- core_info = (struct cam_jpeg_dma_device_core_info *)jpeg_dma_dev->
- core_info;
+ core_info = (struct cam_jpeg_dma_device_core_info *)
+ jpeg_dma_dev->core_info;
match_dev = of_match_device(pdev->dev.driver->of_match_table,
&pdev->dev);
diff --git a/drivers/media/platform/msm/camera/cam_jpeg/jpeg_hw/jpeg_enc_hw/jpeg_enc_core.c b/drivers/media/platform/msm/camera/cam_jpeg/jpeg_hw/jpeg_enc_hw/jpeg_enc_core.c
index 934b911..9fa691b 100644
--- a/drivers/media/platform/msm/camera/cam_jpeg/jpeg_hw/jpeg_enc_hw/jpeg_enc_core.c
+++ b/drivers/media/platform/msm/camera/cam_jpeg/jpeg_hw/jpeg_enc_hw/jpeg_enc_core.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -58,9 +58,8 @@
}
soc_info = &jpeg_enc_dev->soc_info;
- core_info =
- (struct cam_jpeg_enc_device_core_info *)jpeg_enc_dev->
- core_info;
+ core_info = (struct cam_jpeg_enc_device_core_info *)
+ jpeg_enc_dev->core_info;
if (!soc_info || !core_info) {
CAM_ERR(CAM_JPEG, "soc_info = %pK core_info = %pK",
@@ -168,9 +167,8 @@
return IRQ_HANDLED;
}
soc_info = &jpeg_enc_dev->soc_info;
- core_info =
- (struct cam_jpeg_enc_device_core_info *)jpeg_enc_dev->
- core_info;
+ core_info = (struct cam_jpeg_enc_device_core_info *)
+ jpeg_enc_dev->core_info;
hw_info = core_info->jpeg_enc_hw_info;
mem_base = soc_info->reg_map[0].mem_base;
@@ -188,8 +186,7 @@
spin_lock(&jpeg_enc_dev->hw_lock);
if (core_info->core_state == CAM_JPEG_ENC_CORE_READY) {
encoded_size = cam_io_r_mb(mem_base +
- core_info->jpeg_enc_hw_info->reg_offset.
- encode_size);
+ core_info->jpeg_enc_hw_info->reg_offset.encode_size);
if (core_info->irq_cb.jpeg_hw_mgr_cb) {
core_info->irq_cb.jpeg_hw_mgr_cb(irq_status,
encoded_size,
@@ -263,9 +260,8 @@
}
/* maskdisable.clrirq.maskenable.resetcmd */
soc_info = &jpeg_enc_dev->soc_info;
- core_info =
- (struct cam_jpeg_enc_device_core_info *)jpeg_enc_dev->
- core_info;
+ core_info = (struct cam_jpeg_enc_device_core_info *)
+ jpeg_enc_dev->core_info;
hw_info = core_info->jpeg_enc_hw_info;
mem_base = soc_info->reg_map[0].mem_base;
@@ -348,9 +344,8 @@
return -EINVAL;
}
soc_info = &jpeg_enc_dev->soc_info;
- core_info =
- (struct cam_jpeg_enc_device_core_info *)jpeg_enc_dev->
- core_info;
+ core_info = (struct cam_jpeg_enc_device_core_info *)
+ jpeg_enc_dev->core_info;
hw_info = core_info->jpeg_enc_hw_info;
mem_base = soc_info->reg_map[0].mem_base;
@@ -398,9 +393,8 @@
return -EINVAL;
}
- core_info =
- (struct cam_jpeg_enc_device_core_info *)jpeg_enc_dev->
- core_info;
+ core_info = (struct cam_jpeg_enc_device_core_info *)
+ jpeg_enc_dev->core_info;
switch (cmd_type) {
case CAM_JPEG_CMD_SET_IRQ_CB:
diff --git a/drivers/media/platform/msm/camera/cam_jpeg/jpeg_hw/jpeg_enc_hw/jpeg_enc_dev.c b/drivers/media/platform/msm/camera/cam_jpeg/jpeg_hw/jpeg_enc_hw/jpeg_enc_dev.c
index 2180448..d1eb526 100644
--- a/drivers/media/platform/msm/camera/cam_jpeg/jpeg_hw/jpeg_enc_hw/jpeg_enc_dev.c
+++ b/drivers/media/platform/msm/camera/cam_jpeg/jpeg_hw/jpeg_enc_hw/jpeg_enc_dev.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -152,8 +152,8 @@
rc = -ENOMEM;
goto error_alloc_core;
}
- core_info = (struct cam_jpeg_enc_device_core_info *)jpeg_enc_dev->
- core_info;
+ core_info = (struct cam_jpeg_enc_device_core_info *)
+ jpeg_enc_dev->core_info;
match_dev = of_match_device(pdev->dev.driver->of_match_table,
&pdev->dev);
diff --git a/drivers/media/platform/msm/camera/cam_lrme/lrme_hw_mgr/cam_lrme_hw_mgr.c b/drivers/media/platform/msm/camera/cam_lrme/lrme_hw_mgr/cam_lrme_hw_mgr.c
index 20b8586..898997a 100644
--- a/drivers/media/platform/msm/camera/cam_lrme/lrme_hw_mgr/cam_lrme_hw_mgr.c
+++ b/drivers/media/platform/msm/camera/cam_lrme/lrme_hw_mgr/cam_lrme_hw_mgr.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -391,13 +391,14 @@
work_data = (struct cam_lrme_mgr_work_data *)data;
hw_device = work_data->hw_device;
- rc = cam_lrme_mgr_util_get_frame_req(&hw_device->
- frame_pending_list_high, &frame_req, &hw_device->high_req_lock);
+ rc = cam_lrme_mgr_util_get_frame_req(
+ &hw_device->frame_pending_list_high, &frame_req,
+ &hw_device->high_req_lock);
if (!frame_req) {
- rc = cam_lrme_mgr_util_get_frame_req(&hw_device->
- frame_pending_list_normal, &frame_req,
- &hw_device->normal_req_lock);
+ rc = cam_lrme_mgr_util_get_frame_req(
+ &hw_device->frame_pending_list_normal, &frame_req,
+ &hw_device->normal_req_lock);
if (frame_req)
req_prio = 1;
}
diff --git a/drivers/media/platform/msm/camera/cam_lrme/lrme_hw_mgr/lrme_hw/cam_lrme_hw_core.c b/drivers/media/platform/msm/camera/cam_lrme/lrme_hw_mgr/lrme_hw/cam_lrme_hw_core.c
index 21e66a2..6f98354 100644
--- a/drivers/media/platform/msm/camera/cam_lrme/lrme_hw_mgr/lrme_hw/cam_lrme_hw_core.c
+++ b/drivers/media/platform/msm/camera/cam_lrme/lrme_hw_mgr/lrme_hw/cam_lrme_hw_core.c
@@ -449,8 +449,8 @@
cb_args.cb_type = CAM_LRME_CB_PUT_FRAME;
cb_args.frame_req = req_submit;
if (lrme_core->hw_mgr_cb.cam_lrme_hw_mgr_cb)
- lrme_core->hw_mgr_cb.cam_lrme_hw_mgr_cb(lrme_core->
- hw_mgr_cb.data, &cb_args);
+ lrme_core->hw_mgr_cb.cam_lrme_hw_mgr_cb(
+ lrme_core->hw_mgr_cb.data, &cb_args);
} else if (req_submit) {
submit_args.frame_req = req_submit;
submit_args.hw_update_entries = req_submit->hw_update_entries;
@@ -468,8 +468,8 @@
cb_args.cb_type = CAM_LRME_CB_PUT_FRAME;
cb_args.frame_req = req_proc;
if (lrme_core->hw_mgr_cb.cam_lrme_hw_mgr_cb)
- lrme_core->hw_mgr_cb.cam_lrme_hw_mgr_cb(lrme_core->
- hw_mgr_cb.data, &cb_args);
+ lrme_core->hw_mgr_cb.cam_lrme_hw_mgr_cb(
+ lrme_core->hw_mgr_cb.data, &cb_args);
} else if (req_proc) {
submit_args.frame_req = req_proc;
submit_args.hw_update_entries = req_proc->hw_update_entries;
@@ -511,8 +511,8 @@
cb_args.cb_type = CAM_LRME_CB_PUT_FRAME;
cb_args.frame_req = req_submit;
if (lrme_core->hw_mgr_cb.cam_lrme_hw_mgr_cb)
- lrme_core->hw_mgr_cb.cam_lrme_hw_mgr_cb(lrme_core->
- hw_mgr_cb.data, &cb_args);
+ lrme_core->hw_mgr_cb.cam_lrme_hw_mgr_cb(
+ lrme_core->hw_mgr_cb.data, &cb_args);
} else if (req_submit) {
submit_args.frame_req = req_submit;
submit_args.hw_update_entries = req_submit->hw_update_entries;
@@ -530,8 +530,8 @@
cb_args.cb_type = CAM_LRME_CB_PUT_FRAME;
cb_args.frame_req = req_proc;
if (lrme_core->hw_mgr_cb.cam_lrme_hw_mgr_cb)
- lrme_core->hw_mgr_cb.cam_lrme_hw_mgr_cb(lrme_core->
- hw_mgr_cb.data, &cb_args);
+ lrme_core->hw_mgr_cb.cam_lrme_hw_mgr_cb(
+ lrme_core->hw_mgr_cb.data, &cb_args);
} else if (req_proc) {
submit_args.frame_req = req_proc;
submit_args.hw_update_entries = req_proc->hw_update_entries;
@@ -745,8 +745,8 @@
}
if (lrme_core->hw_mgr_cb.cam_lrme_hw_mgr_cb) {
- lrme_core->hw_mgr_cb.cam_lrme_hw_mgr_cb(lrme_core->
- hw_mgr_cb.data, &cb_args);
+ lrme_core->hw_mgr_cb.cam_lrme_hw_mgr_cb(
+ lrme_core->hw_mgr_cb.data, &cb_args);
} else {
CAM_ERR(CAM_LRME, "No hw mgr cb");
rc = -EINVAL;
diff --git a/drivers/media/platform/msm/camera/cam_req_mgr/cam_req_mgr_core.c b/drivers/media/platform/msm/camera/cam_req_mgr/cam_req_mgr_core.c
index e66d21d..aaba481 100644
--- a/drivers/media/platform/msm/camera/cam_req_mgr/cam_req_mgr_core.c
+++ b/drivers/media/platform/msm/camera/cam_req_mgr/cam_req_mgr_core.c
@@ -1684,8 +1684,8 @@
evt_data.u.error = err_info->error;
if (device->ops &&
device->ops->process_evt)
- rc = device->ops->
- process_evt(&evt_data);
+ rc = device->ops->process_evt(
+ &evt_data);
}
}
/* Bring processing pointer to bubbled req id */
diff --git a/drivers/media/platform/msm/camera/cam_sensor_module/cam_actuator/cam_actuator_core.c b/drivers/media/platform/msm/camera/cam_sensor_module/cam_actuator/cam_actuator_core.c
index 079f5bb..9f26635 100644
--- a/drivers/media/platform/msm/camera/cam_sensor_module/cam_actuator/cam_actuator_core.c
+++ b/drivers/media/platform/msm/camera/cam_sensor_module/cam_actuator/cam_actuator_core.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -193,16 +193,12 @@
for (i = 0; i < size; i++) {
rc = camera_io_dev_poll(
io_master_info,
- i2c_list->i2c_settings.
- reg_setting[i].reg_addr,
- i2c_list->i2c_settings.
- reg_setting[i].reg_data,
- i2c_list->i2c_settings.
- reg_setting[i].data_mask,
+ i2c_list->i2c_settings.reg_setting[i].reg_addr,
+ i2c_list->i2c_settings.reg_setting[i].reg_data,
+ i2c_list->i2c_settings.reg_setting[i].data_mask,
i2c_list->i2c_settings.addr_type,
- i2c_list->i2c_settings.data_type,
- i2c_list->i2c_settings.
- reg_setting[i].delay);
+ i2c_list->i2c_settings.data_type,
+ i2c_list->i2c_settings.reg_setting[i].delay);
if (rc < 0) {
CAM_ERR(CAM_ACTUATOR,
"i2c poll apply setting Fail: %d", rc);
diff --git a/drivers/media/platform/msm/camera/cam_sensor_module/cam_cci/cam_cci_core.c b/drivers/media/platform/msm/camera/cam_sensor_module/cam_cci/cam_cci_core.c
index b975418..fe69fcb 100644
--- a/drivers/media/platform/msm/camera/cam_sensor_module/cam_cci/cam_cci_core.c
+++ b/drivers/media/platform/msm/camera/cam_sensor_module/cam_cci/cam_cci_core.c
@@ -94,8 +94,8 @@
CAM_DBG(CAM_CCI, "CCI_I2C_M0_Q0_CUR_WORD_CNT_ADDR %d len %d max %d",
read_val, len,
cci_dev->cci_i2c_queue_info[master][queue].max_queue_size);
- if ((read_val + len + 1) > cci_dev->
- cci_i2c_queue_info[master][queue].max_queue_size) {
+ if ((read_val + len + 1) >
+ cci_dev->cci_i2c_queue_info[master][queue].max_queue_size) {
uint32_t reg_val = 0;
uint32_t report_val = CCI_I2C_REPORT_CMD | (1 << 8);
@@ -113,16 +113,18 @@
CAM_DBG(CAM_CCI, "CCI_QUEUE_START_ADDR");
spin_lock_irqsave(
&cci_dev->cci_master_info[master].lock_q[queue], flags);
- atomic_set(&cci_dev->cci_master_info[master].
- done_pending[queue], 1);
+ atomic_set(
+ &cci_dev->cci_master_info[master].done_pending[queue],
+ 1);
cam_io_w_mb(reg_val, base +
CCI_QUEUE_START_ADDR);
CAM_DBG(CAM_CCI, "wait_for_completion_timeout");
atomic_set(&cci_dev->cci_master_info[master].q_free[queue], 1);
spin_unlock_irqrestore(
&cci_dev->cci_master_info[master].lock_q[queue], flags);
- rc = wait_for_completion_timeout(&cci_dev->
- cci_master_info[master].report_q[queue], CCI_TIMEOUT);
+ rc = wait_for_completion_timeout(
+ &cci_dev->cci_master_info[master].report_q[queue],
+ CCI_TIMEOUT);
if (rc <= 0) {
CAM_ERR(CAM_CCI, "Wait_for_completion_timeout: rc: %d",
rc);
@@ -244,8 +246,8 @@
return -EINVAL;
}
- rc = wait_for_completion_timeout(&cci_dev->
- cci_master_info[master].report_q[queue], CCI_TIMEOUT);
+ rc = wait_for_completion_timeout(
+ &cci_dev->cci_master_info[master].report_q[queue], CCI_TIMEOUT);
CAM_DBG(CAM_CCI, "wait DONE_for_completion_timeout");
if (rc <= 0) {
@@ -338,8 +340,9 @@
return rc;
}
} else {
- atomic_set(&cci_dev->cci_master_info[master].
- done_pending[queue], 1);
+ atomic_set(
+ &cci_dev->cci_master_info[master].done_pending[queue],
+ 1);
spin_unlock_irqrestore(
&cci_dev->cci_master_info[master].lock_q[queue], flags);
rc = cam_cci_wait(cci_dev, master, queue);
@@ -376,9 +379,8 @@
CCI_I2C_M0_Q0_CUR_WORD_CNT_ADDR + reg_offset);
CAM_DBG(CAM_CCI, "CCI_I2C_M0_Q0_CUR_WORD_CNT_ADDR %d max %d", read_val,
cci_dev->cci_i2c_queue_info[master][queue].max_queue_size);
- return (cci_dev->
- cci_i2c_queue_info[master][queue].max_queue_size) -
- read_val;
+ return ((cci_dev->cci_i2c_queue_info[master][queue].max_queue_size) -
+ read_val);
}
static void cam_cci_process_half_q(struct cci_device *cci_dev,
@@ -414,8 +416,9 @@
spin_lock_irqsave(&cci_dev->cci_master_info[master].lock_q[queue],
flags);
if (atomic_read(&cci_dev->cci_master_info[master].q_free[queue]) == 1) {
- atomic_set(&cci_dev->cci_master_info[master].
- done_pending[queue], 1);
+ atomic_set(
+ &cci_dev->cci_master_info[master].done_pending[queue],
+ 1);
spin_unlock_irqrestore(
&cci_dev->cci_master_info[master].lock_q[queue], flags);
rc = cam_cci_wait(cci_dev, master, queue);
@@ -682,8 +685,8 @@
spin_unlock_irqrestore(&cci_dev->cci_master_info[master].lock_q[queue],
flags);
- max_queue_size = cci_dev->cci_i2c_queue_info[master][queue].
- max_queue_size;
+ max_queue_size =
+ cci_dev->cci_i2c_queue_info[master][queue].max_queue_size;
if (c_ctrl->cmd == MSM_CCI_I2C_WRITE_SEQ)
queue_size = max_queue_size;
@@ -993,8 +996,8 @@
cam_io_w_mb(val, base + CCI_QUEUE_START_ADDR);
CAM_DBG(CAM_CCI, "wait_for_completion_timeout");
- rc = wait_for_completion_timeout(&cci_dev->
- cci_master_info[master].reset_complete, CCI_TIMEOUT);
+ rc = wait_for_completion_timeout(
+ &cci_dev->cci_master_info[master].reset_complete, CCI_TIMEOUT);
if (rc <= 0) {
#ifdef DUMP_CCI_REGISTERS
cam_cci_dump_registers(cci_dev, master, queue);
diff --git a/drivers/media/platform/msm/camera/cam_sensor_module/cam_cci/cam_cci_dev.c b/drivers/media/platform/msm/camera/cam_sensor_module/cam_cci/cam_cci_dev.c
index 8fb2468..fb37526 100644
--- a/drivers/media/platform/msm/camera/cam_sensor_module/cam_cci/cam_cci_dev.c
+++ b/drivers/media/platform/msm/camera/cam_sensor_module/cam_cci/cam_cci_dev.c
@@ -74,14 +74,14 @@
if (cci_dev->cci_master_info[MASTER_0].reset_pending == TRUE) {
cci_dev->cci_master_info[MASTER_0].reset_pending =
FALSE;
- complete(&cci_dev->cci_master_info[MASTER_0].
- reset_complete);
+ complete(
+ &cci_dev->cci_master_info[MASTER_0].reset_complete);
}
if (cci_dev->cci_master_info[MASTER_1].reset_pending == TRUE) {
cci_dev->cci_master_info[MASTER_1].reset_pending =
FALSE;
- complete(&cci_dev->cci_master_info[MASTER_1].
- reset_complete);
+ complete(
+ &cci_dev->cci_master_info[MASTER_1].reset_complete);
}
}
if (irq & CCI_IRQ_STATUS_0_I2C_M0_RD_DONE_BMSK) {
diff --git a/drivers/media/platform/msm/camera/cam_sensor_module/cam_cci/cam_cci_soc.c b/drivers/media/platform/msm/camera/cam_sensor_module/cam_cci/cam_cci_soc.c
index 14737f9..295259d 100644
--- a/drivers/media/platform/msm/camera/cam_sensor_module/cam_cci/cam_cci_soc.c
+++ b/drivers/media/platform/msm/camera/cam_sensor_module/cam_cci/cam_cci_soc.c
@@ -53,11 +53,11 @@
mutex_lock(&cci_dev->cci_master_info[master].mutex);
flush_workqueue(cci_dev->write_wq[master]);
/* Re-initialize the completion */
- reinit_completion(&cci_dev->
- cci_master_info[master].reset_complete);
+ reinit_completion(
+ &cci_dev->cci_master_info[master].reset_complete);
for (i = 0; i < NUM_QUEUES; i++)
- reinit_completion(&cci_dev->
- cci_master_info[master].report_q[i]);
+ reinit_completion(
+ &cci_dev->cci_master_info[master].report_q[i]);
/* Set reset pending flag to TRUE */
cci_dev->cci_master_info[master].reset_pending = TRUE;
/* Set proper mask to RESET CMD address */
@@ -69,8 +69,7 @@
base + CCI_RESET_CMD_ADDR);
/* wait for reset done irq */
rc = wait_for_completion_timeout(
- &cci_dev->cci_master_info[master].
- reset_complete,
+ &cci_dev->cci_master_info[master].reset_complete,
CCI_TIMEOUT);
if (rc <= 0)
CAM_ERR(CAM_CCI, "wait failed %d", rc);
@@ -94,8 +93,8 @@
/* Re-initialize the completion */
reinit_completion(&cci_dev->cci_master_info[master].reset_complete);
for (i = 0; i < NUM_QUEUES; i++)
- reinit_completion(&cci_dev->cci_master_info[master].
- report_q[i]);
+ reinit_completion(
+ &cci_dev->cci_master_info[master].report_q[i]);
/* Enable Regulators and IRQ*/
rc = cam_soc_util_enable_platform_resource(soc_info, true,
@@ -116,19 +115,15 @@
for (i = 0; i < NUM_MASTERS; i++) {
for (j = 0; j < NUM_QUEUES; j++) {
if (j == QUEUE_0)
- cci_dev->cci_i2c_queue_info[i][j].
- max_queue_size =
- CCI_I2C_QUEUE_0_SIZE;
+ cci_dev->cci_i2c_queue_info[i][j].max_queue_size
+ = CCI_I2C_QUEUE_0_SIZE;
else
- cci_dev->cci_i2c_queue_info[i][j].
- max_queue_size =
- CCI_I2C_QUEUE_1_SIZE;
+ cci_dev->cci_i2c_queue_info[i][j].max_queue_size
+ = CCI_I2C_QUEUE_1_SIZE;
- CAM_DBG(CAM_CCI, "CCI Master[%d] :: Q0 : %d Q1 : %d", i
- , cci_dev->cci_i2c_queue_info[i][j].
- max_queue_size,
- cci_dev->cci_i2c_queue_info[i][j].
- max_queue_size);
+ CAM_DBG(CAM_CCI, "CCI Master[%d] :: Q0 : %d Q1 : %d", i,
+ cci_dev->cci_i2c_queue_info[i][j].max_queue_size,
+ cci_dev->cci_i2c_queue_info[i][j].max_queue_size);
}
}
@@ -191,13 +186,13 @@
for (i = 0; i < NUM_MASTERS; i++) {
new_cci_dev->cci_master_info[i].status = 0;
mutex_init(&new_cci_dev->cci_master_info[i].mutex);
- init_completion(&new_cci_dev->
- cci_master_info[i].reset_complete);
+ init_completion(
+ &new_cci_dev->cci_master_info[i].reset_complete);
for (j = 0; j < NUM_QUEUES; j++) {
mutex_init(&new_cci_dev->cci_master_info[i].mutex_q[j]);
- init_completion(&new_cci_dev->
- cci_master_info[i].report_q[j]);
+ init_completion(
+ &new_cci_dev->cci_master_info[i].report_q[j]);
spin_lock_init(
&new_cci_dev->cci_master_info[i].lock_q[j]);
}
diff --git a/drivers/media/platform/msm/camera/cam_sensor_module/cam_csiphy/cam_csiphy_core.c b/drivers/media/platform/msm/camera/cam_sensor_module/cam_csiphy/cam_csiphy_core.c
index 4f30f56..e978a40 100644
--- a/drivers/media/platform/msm/camera/cam_sensor_module/cam_csiphy/cam_csiphy_core.c
+++ b/drivers/media/platform/msm/camera/cam_sensor_module/cam_csiphy/cam_csiphy_core.c
@@ -64,16 +64,14 @@
for (i = 0; i < size; i++) {
cam_io_w_mb(
- csiphy_dev->ctrl_reg->
- csiphy_reset_reg[i].reg_data,
+ csiphy_dev->ctrl_reg->csiphy_reset_reg[i].reg_data,
base +
- csiphy_dev->ctrl_reg->
- csiphy_reset_reg[i].reg_addr);
+ csiphy_dev->ctrl_reg->csiphy_reset_reg[i].reg_addr);
usleep_range(csiphy_dev->ctrl_reg->
csiphy_reset_reg[i].delay * 1000,
- csiphy_dev->ctrl_reg->
- csiphy_reset_reg[i].delay * 1000 + 10);
+ csiphy_dev->ctrl_reg->csiphy_reset_reg[i].delay * 1000
+ + 10);
}
}
@@ -150,11 +148,10 @@
csiphy_dev->soc_info.reg_map[0].mem_base;
for (i = 0; i < csiphy_dev->num_irq_registers; i++)
- cam_io_w_mb(csiphy_dev->ctrl_reg->
- csiphy_irq_reg[i].reg_data,
+ cam_io_w_mb(
+ csiphy_dev->ctrl_reg->csiphy_irq_reg[i].reg_data,
csiphybase +
- csiphy_dev->ctrl_reg->
- csiphy_irq_reg[i].reg_addr);
+ csiphy_dev->ctrl_reg->csiphy_irq_reg[i].reg_addr);
}
void cam_csiphy_cphy_irq_disable(struct csiphy_device *csiphy_dev)
@@ -164,10 +161,8 @@
csiphy_dev->soc_info.reg_map[0].mem_base;
for (i = 0; i < csiphy_dev->num_irq_registers; i++)
- cam_io_w_mb(0x0,
- csiphybase +
- csiphy_dev->ctrl_reg->
- csiphy_irq_reg[i].reg_addr);
+ cam_io_w_mb(0x0, csiphybase +
+ csiphy_dev->ctrl_reg->csiphy_irq_reg[i].reg_addr);
}
irqreturn_t cam_csiphy_irq(int irq_num, void *data)
@@ -177,6 +172,7 @@
struct csiphy_device *csiphy_dev =
(struct csiphy_device *)data;
struct cam_hw_soc_info *soc_info = NULL;
+ struct csiphy_reg_parms_t *csiphy_reg = NULL;
void __iomem *base = NULL;
if (!csiphy_dev) {
@@ -186,30 +182,24 @@
soc_info = &csiphy_dev->soc_info;
base = csiphy_dev->soc_info.reg_map[0].mem_base;
+ csiphy_reg = &csiphy_dev->ctrl_reg->csiphy_reg;
for (i = 0; i < csiphy_dev->num_irq_registers; i++) {
- irq = cam_io_r(
- base +
- csiphy_dev->ctrl_reg->csiphy_reg.
- mipi_csiphy_interrupt_status0_addr + 0x4*i);
- cam_io_w_mb(irq,
- base +
- csiphy_dev->ctrl_reg->csiphy_reg.
- mipi_csiphy_interrupt_clear0_addr + 0x4*i);
+ irq = cam_io_r(base +
+ csiphy_reg->mipi_csiphy_interrupt_status0_addr +
+ (0x4 * i));
+ cam_io_w_mb(irq, base +
+ csiphy_reg->mipi_csiphy_interrupt_clear0_addr +
+ (0x4 * i));
CAM_ERR_RATE_LIMIT(CAM_CSIPHY,
"CSIPHY%d_IRQ_STATUS_ADDR%d = 0x%x",
soc_info->index, i, irq);
- cam_io_w_mb(0x0,
- base +
- csiphy_dev->ctrl_reg->csiphy_reg.
- mipi_csiphy_interrupt_clear0_addr + 0x4*i);
+ cam_io_w_mb(0x0, base +
+ csiphy_reg->mipi_csiphy_interrupt_clear0_addr +
+ (0x4 * i));
}
- cam_io_w_mb(0x1, base +
- csiphy_dev->ctrl_reg->
- csiphy_reg.mipi_csiphy_glbl_irq_cmd_addr);
- cam_io_w_mb(0x0, base +
- csiphy_dev->ctrl_reg->
- csiphy_reg.mipi_csiphy_glbl_irq_cmd_addr);
+ cam_io_w_mb(0x1, base + csiphy_reg->mipi_csiphy_glbl_irq_cmd_addr);
+ cam_io_w_mb(0x0, base + csiphy_reg->mipi_csiphy_glbl_irq_cmd_addr);
return IRQ_HANDLED;
}
@@ -222,6 +212,7 @@
uint8_t lane_cnt, lane_pos = 0;
uint16_t settle_cnt = 0;
void __iomem *csiphybase;
+ struct csiphy_reg_t *csiphy_common_reg = NULL;
struct csiphy_reg_t (*reg_array)[MAX_SETTINGS_PER_LANE];
lane_cnt = csiphy_dev->csiphy_info.lane_cnt;
@@ -240,8 +231,8 @@
reg_array =
csiphy_dev->ctrl_reg->csiphy_2ph_reg;
csiphy_dev->num_irq_registers = 11;
- cfg_size = csiphy_dev->ctrl_reg->csiphy_reg.
- csiphy_2ph_config_array_size;
+ cfg_size =
+ csiphy_dev->ctrl_reg->csiphy_reg.csiphy_2ph_config_array_size;
lane_mask = csiphy_dev->csiphy_info.lane_mask & 0x1f;
for (i = 0; i < MAX_DPHY_DATA_LN; i++) {
@@ -262,8 +253,8 @@
reg_array =
csiphy_dev->ctrl_reg->csiphy_3ph_reg;
csiphy_dev->num_irq_registers = 11;
- cfg_size = csiphy_dev->ctrl_reg->csiphy_reg.
- csiphy_3ph_config_array_size;
+ cfg_size =
+ csiphy_dev->ctrl_reg->csiphy_reg.csiphy_3ph_config_array_size;
lane_mask = csiphy_dev->csiphy_info.lane_mask & 0x7;
mask = lane_mask;
@@ -276,32 +267,24 @@
}
size = csiphy_dev->ctrl_reg->csiphy_reg.csiphy_common_array_size;
-
for (i = 0; i < size; i++) {
- switch (csiphy_dev->ctrl_reg->
- csiphy_common_reg[i].csiphy_param_type) {
- case CSIPHY_LANE_ENABLE:
+ csiphy_common_reg = &csiphy_dev->ctrl_reg->csiphy_common_reg[i];
+ switch (csiphy_common_reg->csiphy_param_type) {
+ case CSIPHY_LANE_ENABLE:
cam_io_w_mb(lane_enable,
csiphybase +
- csiphy_dev->ctrl_reg->
- csiphy_common_reg[i].reg_addr);
- usleep_range(csiphy_dev->ctrl_reg->
- csiphy_common_reg[i].delay*1000,
- csiphy_dev->ctrl_reg->
- csiphy_common_reg[i].delay*1000 + 10);
+ csiphy_common_reg->reg_addr);
+ usleep_range(csiphy_common_reg->delay * 1000,
+ csiphy_common_reg->delay * 1000 + 10);
break;
- case CSIPHY_DEFAULT_PARAMS:
- cam_io_w_mb(csiphy_dev->ctrl_reg->
- csiphy_common_reg[i].reg_data,
+ case CSIPHY_DEFAULT_PARAMS:
+ cam_io_w_mb(csiphy_common_reg->reg_data,
csiphybase +
- csiphy_dev->ctrl_reg->
- csiphy_common_reg[i].reg_addr);
- usleep_range(csiphy_dev->ctrl_reg->
- csiphy_common_reg[i].delay*1000,
- csiphy_dev->ctrl_reg->
- csiphy_common_reg[i].delay*1000 + 10);
+ csiphy_common_reg->reg_addr);
+ usleep_range(csiphy_common_reg->delay * 1000,
+ csiphy_common_reg->delay * 1000 + 10);
break;
- default:
+ default:
break;
}
}
@@ -317,8 +300,8 @@
if (csiphy_dev->csiphy_info.combo_mode == 1 &&
(lane_pos >= 3))
settle_cnt =
- (csiphy_dev->csiphy_info.
- settle_time_combo_sensor / 200000000);
+ (csiphy_dev->csiphy_info.settle_time_combo_sensor /
+ 200000000);
for (i = 0; i < cfg_size; i++) {
switch (reg_array[lane_pos][i].csiphy_param_type) {
case CSIPHY_LANE_ENABLE:
@@ -400,6 +383,7 @@
csiphy_dev->ref_count = 0;
csiphy_dev->is_acquired_dev_combo_mode = 0;
csiphy_dev->acquire_count = 0;
+ csiphy_dev->start_dev_count = 0;
csiphy_dev->csiphy_state = CAM_CSIPHY_INIT;
}
@@ -445,6 +429,7 @@
{
struct csiphy_device *csiphy_dev =
(struct csiphy_device *)phy_dev;
+ struct intf_params *bridge_intf = NULL;
struct cam_control *cmd = (struct cam_control *)arg;
int32_t rc = 0;
@@ -523,11 +508,10 @@
csiphy_acq_dev.device_handle =
cam_create_device_hdl(&bridge_params);
- csiphy_dev->bridge_intf.
- device_hdl[csiphy_acq_params.combo_mode] =
- csiphy_acq_dev.device_handle;
- csiphy_dev->bridge_intf.
- session_hdl[csiphy_acq_params.combo_mode] =
+ bridge_intf = &csiphy_dev->bridge_intf;
+ bridge_intf->device_hdl[csiphy_acq_params.combo_mode]
+ = csiphy_acq_dev.device_handle;
+ bridge_intf->session_hdl[csiphy_acq_params.combo_mode] =
csiphy_acq_dev.session_handle;
if (copy_to_user((void __user *)cmd->handle,
diff --git a/drivers/media/platform/msm/camera/cam_sensor_module/cam_flash/cam_flash_core.c b/drivers/media/platform/msm/camera/cam_sensor_module/cam_flash/cam_flash_core.c
index e7110b8..9b74826 100644
--- a/drivers/media/platform/msm/camera/cam_sensor_module/cam_flash/cam_flash_core.c
+++ b/drivers/media/platform/msm/camera/cam_sensor_module/cam_flash/cam_flash_core.c
@@ -284,8 +284,8 @@
for (i = 0; i < flash_data->cmn_attr.count; i++)
flash_data->led_current_ma[i] = 0;
} else {
- fctrl->flash_init_setting.cmn_attr.
- is_settings_valid = false;
+ fctrl->flash_init_setting.cmn_attr.is_settings_valid
+ = false;
}
} else {
for (i = 0; i < MAX_PER_FRAME_ARRAY; i++) {
@@ -513,7 +513,7 @@
uint64_t generic_ptr;
uint32_t *cmd_buf = NULL;
uint32_t *offset = NULL;
- uint32_t frame_offset = 0;
+ uint32_t frm_offset = 0;
size_t len_of_buffer;
struct cam_control *ioctl_ctrl = NULL;
struct cam_packet *csl_packet = NULL;
@@ -525,6 +525,7 @@
struct cam_flash_set_rer *flash_rer_info = NULL;
struct cam_flash_set_on_off *flash_operation_info = NULL;
struct cam_flash_query_curr *flash_query_info = NULL;
+ struct cam_flash_frame_setting *flash_data = NULL;
if (!fctrl || !arg) {
CAM_ERR(CAM_FLASH, "fctrl/arg is NULL");
@@ -616,25 +617,19 @@
case CAM_FLASH_PACKET_OPCODE_SET_OPS: {
offset = (uint32_t *)((uint8_t *)&csl_packet->payload +
csl_packet->cmd_buf_offset);
- frame_offset = csl_packet->header.request_id %
+ frm_offset = csl_packet->header.request_id %
MAX_PER_FRAME_ARRAY;
- if (fctrl->per_frame[frame_offset].cmn_attr.is_settings_valid
- == true) {
- fctrl->per_frame[frame_offset].cmn_attr.request_id = 0;
- fctrl->per_frame[frame_offset].
- cmn_attr.is_settings_valid = false;
- for (i = 0;
- i < fctrl->per_frame[frame_offset].cmn_attr.count;
- i++) {
- fctrl->per_frame[frame_offset].
- led_current_ma[i] = 0;
- }
+ flash_data = &fctrl->per_frame[frm_offset];
+
+ if (flash_data->cmn_attr.is_settings_valid == true) {
+ flash_data->cmn_attr.request_id = 0;
+ flash_data->cmn_attr.is_settings_valid = false;
+ for (i = 0; i < flash_data->cmn_attr.count; i++)
+ flash_data->led_current_ma[i] = 0;
}
- fctrl->per_frame[frame_offset].cmn_attr.request_id =
- csl_packet->header.request_id;
- fctrl->per_frame[frame_offset].cmn_attr.is_settings_valid =
- true;
+ flash_data->cmn_attr.request_id = csl_packet->header.request_id;
+ flash_data->cmn_attr.is_settings_valid = true;
cmd_desc = (struct cam_cmd_buf_desc *)(offset);
rc = cam_mem_get_cpu_buf(cmd_desc->mem_handle,
(uint64_t *)&generic_ptr, &len_of_buffer);
@@ -655,8 +650,7 @@
CAM_FLASH_STATE_ACQUIRE)) {
CAM_WARN(CAM_FLASH,
"Rxed Flash fire ops without linking");
- fctrl->per_frame[frame_offset].
- cmn_attr.is_settings_valid = false;
+ flash_data->cmn_attr.is_settings_valid = false;
return 0;
}
@@ -668,16 +662,12 @@
return -EINVAL;
}
- fctrl->per_frame[frame_offset].opcode =
- flash_operation_info->opcode;
- fctrl->per_frame[frame_offset].cmn_attr.count =
+ flash_data->opcode = flash_operation_info->opcode;
+ flash_data->cmn_attr.count =
flash_operation_info->count;
- for (i = 0;
- i < flash_operation_info->count; i++)
- fctrl->per_frame[frame_offset].
- led_current_ma[i]
- = flash_operation_info->
- led_current_ma[i];
+ for (i = 0; i < flash_operation_info->count; i++)
+ flash_data->led_current_ma[i]
+ = flash_operation_info->led_current_ma[i];
}
break;
default:
@@ -782,8 +772,10 @@
(fctrl->flash_state == CAM_FLASH_STATE_ACQUIRE)) {
CAM_WARN(CAM_FLASH,
"Rxed NOP packets without linking");
- fctrl->per_frame[frame_offset].
- cmn_attr.is_settings_valid = false;
+ frm_offset = csl_packet->header.request_id %
+ MAX_PER_FRAME_ARRAY;
+ fctrl->per_frame[frm_offset].cmn_attr.is_settings_valid
+ = false;
return 0;
}
diff --git a/drivers/media/platform/msm/camera/cam_sensor_module/cam_ois/cam_ois_core.c b/drivers/media/platform/msm/camera/cam_sensor_module/cam_ois/cam_ois_core.c
index 3a0a6d6..fbdaee7 100644
--- a/drivers/media/platform/msm/camera/cam_sensor_module/cam_ois/cam_ois_core.c
+++ b/drivers/media/platform/msm/camera/cam_sensor_module/cam_ois/cam_ois_core.c
@@ -233,17 +233,13 @@
size = i2c_list->i2c_settings.size;
for (i = 0; i < size; i++) {
rc = camera_io_dev_poll(
- &(o_ctrl->io_master_info),
- i2c_list->i2c_settings.
- reg_setting[i].reg_addr,
- i2c_list->i2c_settings.
- reg_setting[i].reg_data,
- i2c_list->i2c_settings.
- reg_setting[i].data_mask,
- i2c_list->i2c_settings.addr_type,
- i2c_list->i2c_settings.data_type,
- i2c_list->i2c_settings.
- reg_setting[i].delay);
+ &(o_ctrl->io_master_info),
+ i2c_list->i2c_settings.reg_setting[i].reg_addr,
+ i2c_list->i2c_settings.reg_setting[i].reg_data,
+ i2c_list->i2c_settings.reg_setting[i].data_mask,
+ i2c_list->i2c_settings.addr_type,
+ i2c_list->i2c_settings.data_type,
+ i2c_list->i2c_settings.reg_setting[i].delay);
if (rc < 0) {
CAM_ERR(CAM_OIS,
"i2c poll apply setting Fail");
@@ -529,8 +525,8 @@
return rc;
}
} else if ((o_ctrl->is_ois_calib != 0) &&
- (o_ctrl->i2c_calib_data.
- is_settings_valid == 0)) {
+ (o_ctrl->i2c_calib_data.is_settings_valid ==
+ 0)) {
CAM_DBG(CAM_OIS,
"Received calib settings");
i2c_reg_settings = &(o_ctrl->i2c_calib_data);
diff --git a/drivers/media/platform/msm/camera/cam_sensor_module/cam_sensor/cam_sensor_core.c b/drivers/media/platform/msm/camera/cam_sensor_module/cam_sensor/cam_sensor_core.c
index 5a1b67c..b3f3a35 100644
--- a/drivers/media/platform/msm/camera/cam_sensor_module/cam_sensor/cam_sensor_core.c
+++ b/drivers/media/platform/msm/camera/cam_sensor_module/cam_sensor/cam_sensor_core.c
@@ -190,9 +190,8 @@
}
i2c_reg_settings =
- &i2c_data->
- per_frame[csl_packet->header.request_id %
- MAX_PER_FRAME_ARRAY];
+ &i2c_data->per_frame[csl_packet->header.request_id %
+ MAX_PER_FRAME_ARRAY];
CAM_DBG(CAM_SENSOR, "Received Packet: %lld req: %lld",
csl_packet->header.request_id % MAX_PER_FRAME_ARRAY,
csl_packet->header.request_id);
@@ -290,16 +289,12 @@
for (i = 0; i < size; i++) {
rc = camera_io_dev_poll(
io_master_info,
- i2c_list->i2c_settings.
- reg_setting[i].reg_addr,
- i2c_list->i2c_settings.
- reg_setting[i].reg_data,
- i2c_list->i2c_settings.
- reg_setting[i].data_mask,
+ i2c_list->i2c_settings.reg_setting[i].reg_addr,
+ i2c_list->i2c_settings.reg_setting[i].reg_data,
+ i2c_list->i2c_settings.reg_setting[i].data_mask,
i2c_list->i2c_settings.addr_type,
- i2c_list->i2c_settings.data_type,
- i2c_list->i2c_settings.
- reg_setting[i].delay);
+ i2c_list->i2c_settings.data_type,
+ i2c_list->i2c_settings.reg_setting[i].delay);
if (rc < 0) {
CAM_ERR(CAM_SENSOR,
"i2c poll apply setting Fail: %d", rc);
@@ -1104,9 +1099,9 @@
for (i = 0; i < MAX_PER_FRAME_ARRAY; i++) {
if ((del_req_id >
- s_ctrl->i2c_data.per_frame[i].request_id) &&
- (s_ctrl->i2c_data.per_frame[i].
- is_settings_valid == 1)) {
+ s_ctrl->i2c_data.per_frame[i].request_id) && (
+ s_ctrl->i2c_data.per_frame[i].is_settings_valid
+ == 1)) {
s_ctrl->i2c_data.per_frame[i].request_id = 0;
rc = delete_request(
&(s_ctrl->i2c_data.per_frame[i]));
diff --git a/drivers/media/platform/msm/camera/cam_sensor_module/cam_sensor_utils/cam_sensor_util.c b/drivers/media/platform/msm/camera/cam_sensor_module/cam_sensor_utils/cam_sensor_util.c
index f9b846b..ac60dc8 100644
--- a/drivers/media/platform/msm/camera/cam_sensor_module/cam_sensor_utils/cam_sensor_util.c
+++ b/drivers/media/platform/msm/camera/cam_sensor_module/cam_sensor_utils/cam_sensor_util.c
@@ -93,12 +93,10 @@
list_entry(list_ptr, struct i2c_settings_list, list);
if (generic_op_code ==
CAMERA_SENSOR_WAIT_OP_HW_UCND)
- i2c_list->i2c_settings.
- reg_setting[offset - 1].delay =
+ i2c_list->i2c_settings.reg_setting[offset - 1].delay =
cmd_uncond_wait->delay;
else
- i2c_list->i2c_settings.delay =
- cmd_uncond_wait->delay;
+ i2c_list->i2c_settings.delay = cmd_uncond_wait->delay;
(*cmd_buf) +=
sizeof(
struct cam_cmd_unconditional_wait) / sizeof(uint32_t);
@@ -182,14 +180,10 @@
for (cnt = 0; cnt < (cam_cmd_i2c_random_wr->header.count);
cnt++) {
i2c_list->i2c_settings.reg_setting[cnt].reg_addr =
- cam_cmd_i2c_random_wr->
- random_wr_payload[cnt].reg_addr;
- i2c_list->i2c_settings.
- reg_setting[cnt].reg_data =
- cam_cmd_i2c_random_wr->
- random_wr_payload[cnt].reg_data;
- i2c_list->i2c_settings.
- reg_setting[cnt].data_mask = 0;
+ cam_cmd_i2c_random_wr->random_wr_payload[cnt].reg_addr;
+ i2c_list->i2c_settings.reg_setting[cnt].reg_data =
+ cam_cmd_i2c_random_wr->random_wr_payload[cnt].reg_data;
+ i2c_list->i2c_settings.reg_setting[cnt].data_mask = 0;
}
*offset = cnt;
*list = &(i2c_list->list);
@@ -237,14 +231,10 @@
for (cnt = 0; cnt < (cam_cmd_i2c_continuous_wr->header.count);
cnt++) {
i2c_list->i2c_settings.reg_setting[cnt].reg_addr =
- cam_cmd_i2c_continuous_wr->
- reg_addr;
- i2c_list->i2c_settings.
- reg_setting[cnt].reg_data =
- cam_cmd_i2c_continuous_wr->
- data_read[cnt].reg_data;
- i2c_list->i2c_settings.
- reg_setting[cnt].data_mask = 0;
+ cam_cmd_i2c_continuous_wr->reg_addr;
+ i2c_list->i2c_settings.reg_setting[cnt].reg_data =
+ cam_cmd_i2c_continuous_wr->data_read[cnt].reg_data;
+ i2c_list->i2c_settings.reg_setting[cnt].data_mask = 0;
}
*offset = cnt;
*list = &(i2c_list->list);
@@ -642,6 +632,7 @@
{
int32_t rc = 0, tot_size = 0, last_cmd_type = 0;
int32_t i = 0, pwr_up = 0, pwr_down = 0;
+ struct cam_sensor_power_setting *pwr_settings;
void *ptr = cmd_buf, *scr;
struct cam_cmd_power *pwr_cmd = (struct cam_cmd_power *)cmd_buf;
struct common_header *cmm_hdr = (struct common_header *)cmd_buf;
@@ -684,14 +675,10 @@
CAM_WARN(CAM_SENSOR, "Un expected Command");
for (i = 0; i < pwr_cmd->count; i++, pwr_up++) {
- power_info->
- power_setting[pwr_up].seq_type =
- pwr_cmd->power_settings[i].
- power_seq_type;
- power_info->
- power_setting[pwr_up].config_val =
- pwr_cmd->power_settings[i].
- config_val_low;
+ power_info->power_setting[pwr_up].seq_type =
+ pwr_cmd->power_settings[i].power_seq_type;
+ power_info->power_setting[pwr_up].config_val =
+ pwr_cmd->power_settings[i].config_val_low;
power_info->power_setting[pwr_up].delay = 0;
if (i) {
scr = scr +
@@ -708,13 +695,9 @@
goto free_power_down_settings;
}
CAM_DBG(CAM_SENSOR,
- "Seq Type[%d]: %d Config_val: %ld",
- pwr_up,
- power_info->
- power_setting[pwr_up].seq_type,
- power_info->
- power_setting[pwr_up].
- config_val);
+ "Seq Type[%d]: %d Config_val: %ld", pwr_up,
+ power_info->power_setting[pwr_up].seq_type,
+ power_info->power_setting[pwr_up].config_val);
}
last_cmd_type = CAMERA_SENSOR_CMD_TYPE_PWR_UP;
ptr = (void *) scr;
@@ -722,32 +705,38 @@
} else if (cmm_hdr->cmd_type == CAMERA_SENSOR_CMD_TYPE_WAIT) {
struct cam_cmd_unconditional_wait *wait_cmd =
(struct cam_cmd_unconditional_wait *)ptr;
- if (wait_cmd->op_code ==
- CAMERA_SENSOR_WAIT_OP_SW_UCND) {
- if (last_cmd_type ==
- CAMERA_SENSOR_CMD_TYPE_PWR_UP) {
- if (pwr_up > 0)
- power_info->
- power_setting
- [pwr_up - 1].delay +=
- wait_cmd->delay;
- else
- CAM_ERR(CAM_SENSOR,
- "Delay is expected only after valid power up setting");
- } else if (last_cmd_type ==
- CAMERA_SENSOR_CMD_TYPE_PWR_DOWN) {
- if (pwr_down > 0)
- power_info->
- power_down_setting
- [pwr_down - 1].delay +=
- wait_cmd->delay;
- else
- CAM_ERR(CAM_SENSOR,
- "Delay is expected only after valid power up setting");
+ if ((wait_cmd->op_code ==
+ CAMERA_SENSOR_WAIT_OP_SW_UCND) &&
+ (last_cmd_type ==
+ CAMERA_SENSOR_CMD_TYPE_PWR_UP)) {
+ if (pwr_up > 0) {
+ pwr_settings =
+ &power_info->power_setting[pwr_up - 1];
+ pwr_settings->delay +=
+ wait_cmd->delay;
+ } else {
+ CAM_ERR(CAM_SENSOR,
+ "Delay is expected only after valid power up setting");
}
- } else
+ } else if ((wait_cmd->op_code ==
+ CAMERA_SENSOR_WAIT_OP_SW_UCND) &&
+ (last_cmd_type ==
+ CAMERA_SENSOR_CMD_TYPE_PWR_DOWN)) {
+ if (pwr_down > 0) {
+ pwr_settings =
+ &power_info->power_down_setting[
+ pwr_down - 1];
+ pwr_settings->delay +=
+ wait_cmd->delay;
+ } else {
+ CAM_ERR(CAM_SENSOR,
+ "Delay is expected only after valid power up setting");
+ }
+ } else {
CAM_DBG(CAM_SENSOR, "Invalid op code: %d",
wait_cmd->op_code);
+ }
+
tot_size = tot_size +
sizeof(struct cam_cmd_unconditional_wait);
if (tot_size > cmd_length) {
@@ -776,18 +765,14 @@
CAM_ERR(CAM_SENSOR, "Invalid Command");
for (i = 0; i < pwr_cmd->count; i++, pwr_down++) {
- power_info->
- power_down_setting[pwr_down].
- seq_type =
- pwr_cmd->power_settings[i].
- power_seq_type;
- power_info->
- power_down_setting[pwr_down].
- config_val =
- pwr_cmd->power_settings[i].
- config_val_low;
- power_info->
- power_down_setting[pwr_down].delay = 0;
+ pwr_settings =
+ &power_info->power_down_setting[pwr_down];
+ pwr_settings->seq_type =
+ pwr_cmd->power_settings[i].power_seq_type;
+ pwr_settings->config_val =
+ pwr_cmd->power_settings[i].config_val_low;
+ power_info->power_down_setting[pwr_down].delay
+ = 0;
if (i) {
scr = scr +
sizeof(
@@ -805,13 +790,8 @@
}
CAM_DBG(CAM_SENSOR,
"Seq Type[%d]: %d Config_val: %ld",
- pwr_down,
- power_info->
- power_down_setting[pwr_down].
- seq_type,
- power_info->
- power_down_setting[pwr_down].
- config_val);
+ pwr_down, pwr_settings->seq_type,
+ pwr_settings->config_val);
}
last_cmd_type = CAMERA_SENSOR_CMD_TYPE_PWR_DOWN;
ptr = (void *) scr;