drm/i915: Always use crtc_ timings when dealing with adjustead_mode
The adjustead_mode crtc_ timings are what we will program into the hardware,
so it's those timings we should be looking practically everywhere.
The normal and crtc_ timings should differ only when stere doubling is
used. In that case the normal timings are the orignal non-doubled
timigns, and crtc_ timings are the doubled timings used by the hardware.
The only case where we continue to look at the normal timings is when we
pass the adjusted_mode to drm_match_{cea,hdmi}_mode() to find the VIC.
drm_edid keeps the modes aronund in the non-double form only, so it
needs the non-double timings to match against.
Done with sed
's/adjusted_mode->\([vhVH]\)/adjusted_mode->crtc_\1/g'
's/adjusted_mode->clock/adjusted_mode->crtc_clock/g'
with a manual s/VDisplay/vdisplay/ within the comment in intel_dvo.c
v2: Update due to intel_dsi.c changes
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index b4d5213..4fb97c0 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -710,10 +710,10 @@
u16 hactive, hfp, hsync, hbp, vfp, vsync, vbp;
- hactive = adjusted_mode->hdisplay;
- hfp = adjusted_mode->hsync_start - adjusted_mode->hdisplay;
- hsync = adjusted_mode->hsync_end - adjusted_mode->hsync_start;
- hbp = adjusted_mode->htotal - adjusted_mode->hsync_end;
+ hactive = adjusted_mode->crtc_hdisplay;
+ hfp = adjusted_mode->crtc_hsync_start - adjusted_mode->crtc_hdisplay;
+ hsync = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
+ hbp = adjusted_mode->crtc_htotal - adjusted_mode->crtc_hsync_end;
if (intel_dsi->dual_link) {
hactive /= 2;
@@ -724,9 +724,9 @@
hbp /= 2;
}
- vfp = adjusted_mode->vsync_start - adjusted_mode->vdisplay;
- vsync = adjusted_mode->vsync_end - adjusted_mode->vsync_start;
- vbp = adjusted_mode->vtotal - adjusted_mode->vsync_end;
+ vfp = adjusted_mode->crtc_vsync_start - adjusted_mode->crtc_vdisplay;
+ vsync = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
+ vbp = adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vsync_end;
/* horizontal values are in terms of high speed byte clock */
hactive = txbyteclkhs(hactive, bpp, lane_count,
@@ -745,11 +745,11 @@
* whereas these values should be based on resolution.
*/
I915_WRITE(BXT_MIPI_TRANS_HACTIVE(port),
- adjusted_mode->hdisplay);
+ adjusted_mode->crtc_hdisplay);
I915_WRITE(BXT_MIPI_TRANS_VACTIVE(port),
- adjusted_mode->vdisplay);
+ adjusted_mode->crtc_vdisplay);
I915_WRITE(BXT_MIPI_TRANS_VTOTAL(port),
- adjusted_mode->vtotal);
+ adjusted_mode->crtc_vtotal);
}
I915_WRITE(MIPI_HACTIVE_AREA_COUNT(port), hactive);
@@ -782,7 +782,7 @@
DRM_DEBUG_KMS("pipe %c\n", pipe_name(intel_crtc->pipe));
- mode_hdisplay = adjusted_mode->hdisplay;
+ mode_hdisplay = adjusted_mode->crtc_hdisplay;
if (intel_dsi->dual_link) {
mode_hdisplay /= 2;
@@ -832,7 +832,7 @@
I915_WRITE(MIPI_DPHY_PARAM(port), intel_dsi->dphy_reg);
I915_WRITE(MIPI_DPI_RESOLUTION(port),
- adjusted_mode->vdisplay << VERTICAL_ADDRESS_SHIFT |
+ adjusted_mode->crtc_vdisplay << VERTICAL_ADDRESS_SHIFT |
mode_hdisplay << HORIZONTAL_ADDRESS_SHIFT);
}
@@ -878,13 +878,13 @@
if (is_vid_mode(intel_dsi) &&
intel_dsi->video_mode_format == VIDEO_MODE_BURST) {
I915_WRITE(MIPI_HS_TX_TIMEOUT(port),
- txbyteclkhs(adjusted_mode->htotal, bpp,
+ txbyteclkhs(adjusted_mode->crtc_htotal, bpp,
intel_dsi->lane_count,
intel_dsi->burst_mode_ratio) + 1);
} else {
I915_WRITE(MIPI_HS_TX_TIMEOUT(port),
- txbyteclkhs(adjusted_mode->vtotal *
- adjusted_mode->htotal,
+ txbyteclkhs(adjusted_mode->crtc_vtotal *
+ adjusted_mode->crtc_htotal,
bpp, intel_dsi->lane_count,
intel_dsi->burst_mode_ratio) + 1);
}