| commit | ab53c267f28f1830c660aad1a8cc063b34fa1cc2 | [log] [tgz] |
|---|---|---|
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | Fri May 23 21:00:19 2014 +0530 |
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | Wed Jun 11 16:57:28 2014 +0200 |
| tree | df935cc907c7113fbdfff86d90b51eb0e5be46b0 | |
| parent | 3f4e349587cd840f01bd24ab6911bbcc790f2b0a [diff] |
drm/i915/chv: Skip gen6_gt_check_fifodbg() on CHV CHV uses the gen8 shadow register mechanism so we shouldn't be checking the GT FIFO status. This effectively removes the posting read, so add an explicit posting read using FORCEWAKE_ACK_VLV (which is what use in vlv_forcewake_reset()). Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>