| commit | abc189eadf6c12e60f95030e9c84083175526eaf | [log] [tgz] |
|---|---|---|
| author | Adam Thomson <Adam.Thomson.Opensource@diasemi.com> | Tue May 10 16:11:08 2016 +0100 |
| committer | Mark Brown <broonie@kernel.org> | Tue May 10 19:24:19 2016 +0100 |
| tree | b20db0e344e6dbcfc06aae58e6ab6fe7014be458 | |
| parent | 1e62c52ddc2d23a02ac2308cc1bb6ff18f0cf3cd [diff] |
ASoC: da7213: Allow PLL disable/bypass when using 32KHz sysclk Current checking for PLL 32KHz mode fails in driver code when bypassing the PLL. This is due to an incorrect check of PLL source type when 32KHz clock is provided. Removal of this check resolves the issue. Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> Signed-off-by: Mark Brown <broonie@kernel.org>