| commit | 9a6655e49fd98f3748bb80da20705448aad9ee57 | [log] [tgz] |
|---|---|---|
| author | Catalin Marinas <catalin.marinas@arm.com> | Tue Aug 31 13:05:22 2010 +0100 |
| committer | Santosh Shilimkar <santosh.shilimkar@ti.com> | Tue Oct 26 11:39:54 2010 +0530 |
| tree | db5aba3a886712f54f4816137c4cea08b954f5c6 | |
| parent | 899611ee7d373e5eeda08e9a8632684e1ebbbf00 [diff] |
ARM: Improve the L2 cache performance when PL310 is used With this L2 cache controller, the cache maintenance by PA and sync operations are atomic and do not require a "wait" loop. This patch conditionally defines the cache_wait() function. Since L2x0 cache controllers do not work with ARMv7 CPUs, the patch automatically enables CACHE_PL310 when only CPU_V7 is defined. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>