| commit | ae7465a0972aee889d79d94dbd1e65d3fab07414 | [log] [tgz] |
|---|---|---|
| author | Ulrich Hecht <ulrich.hecht+renesas@gmail.com> | Mon Oct 05 16:55:54 2015 +0200 |
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | Tue Oct 20 16:03:28 2015 +0200 |
| tree | 06ddbae168509b580eb4789f21db4b4b77f6ec4d | |
| parent | 22768fc60abbf58b04601b27796268f0363ab185 [diff] |
pinctrl: sh-pfc: r8a7778: Add bias (pull-up) pinconf support On this SoC there is no simple mapping of GP pins to pull-up register bits, so we need a table. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>