Documentation: Explain pci=conf1,conf2 more verbosely
People complained that setting the PCI config space access mechanism
through "pci=conf1" or "pci=conf2" on the command line is not really
documented. Yeah, can you blame them? Look at what we have now.
So try to improve the situation a bit by explaining what those "conf1"
and "conf2" things actually mean.
See http://wiki.osdev.org/PCI for more info.
Suggested-by: Eric Morton <Eric.Morton@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
[jc: Added the above URL to the document too]
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 9b2970f..5e80a9b 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -2736,10 +2736,16 @@
hardware access methods are allowed. Use this
if you experience crashes upon bootup and you
suspect they are caused by the BIOS.
- conf1 [X86] Force use of PCI Configuration
- Mechanism 1.
- conf2 [X86] Force use of PCI Configuration
- Mechanism 2.
+ conf1 [X86] Force use of PCI Configuration Access
+ Mechanism 1 (config address in IO port 0xCF8,
+ data in IO port 0xCFC, both 32-bit).
+ conf2 [X86] Force use of PCI Configuration Access
+ Mechanism 2 (IO port 0xCF8 is an 8-bit port for
+ the function, IO port 0xCFA, also 8-bit, sets
+ bus number. The config space is then accessed
+ through ports 0xC000-0xCFFF).
+ See http://wiki.osdev.org/PCI for more info
+ on the configuration access mechanisms.
noaer [PCIE] If the PCIEAER kernel config parameter is
enabled, this kernel boot option can be used to
disable the use of PCIE advanced error reporting.