| commit | afe76c8fd030dd6b75fa69f7af7b7eb1e212f248 | [log] [tgz] |
|---|---|---|
| author | Jim Quinlan <jim2101024@gmail.com> | Fri May 15 15:45:47 2015 -0400 |
| committer | Stephen Boyd <sboyd@codeaurora.org> | Tue Jul 28 11:59:19 2015 -0700 |
| tree | fcf7c6f403d54380eeef1b549a7197cc8dfa756e | |
| parent | 25d4d341d31b349836e1b12d10be34b9b575c12b [diff] |
clk: allow a clk divider with max divisor when zero This commit allows certain Broadcom STB clock dividers to be used with clk-divider.c. It allows for a clock whose field value is the equal to the divisor, execpt when the field value is zero, in which case the divisor is 2^width. For example, consider a divisor clock with a two bit field: value divisor 0 4 1 1 2 2 3 3 Signed-off-by: Jim Quinlan <jim2101024@gmail.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com>