[Blackfin] arch: Allow concurrent use of GPIO and GPIO IRQ
The irq setup code no longer calls gpio request and free.
This patch also changes the default gpio_free behavior on Blackfin.
A freed GPIO keeps it's last state, and is not defaulted back to
an input. This is also what all other architectures do.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c
index a2a1171..5448230 100644
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -326,6 +326,7 @@
static unsigned short gpio_enabled[gpio_bank(MAX_BLACKFIN_GPIOS)];
static unsigned short gpio_edge_triggered[gpio_bank(MAX_BLACKFIN_GPIOS)];
+extern void bfin_gpio_irq_prepare(unsigned gpio);
static void bfin_gpio_ack_irq(unsigned int irq)
{
@@ -364,35 +365,25 @@
static unsigned int bfin_gpio_irq_startup(unsigned int irq)
{
- unsigned int ret;
u16 gpionr = irq - IRQ_PF0;
- char buf[8];
- if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) {
- snprintf(buf, sizeof buf, "IRQ %d", irq);
- ret = gpio_request(gpionr, buf);
- if (ret)
- return ret;
- }
+ if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr)))
+ bfin_gpio_irq_prepare(gpionr);
gpio_enabled[gpio_bank(gpionr)] |= gpio_bit(gpionr);
bfin_gpio_unmask_irq(irq);
- return ret;
+ return 0;
}
static void bfin_gpio_irq_shutdown(unsigned int irq)
{
bfin_gpio_mask_irq(irq);
- gpio_free(irq - IRQ_PF0);
gpio_enabled[gpio_bank(irq - IRQ_PF0)] &= ~gpio_bit(irq - IRQ_PF0);
}
static int bfin_gpio_irq_type(unsigned int irq, unsigned int type)
{
-
- unsigned int ret;
- char buf[8];
u16 gpionr = irq - IRQ_PF0;
if (type == IRQ_TYPE_PROBE) {
@@ -404,12 +395,8 @@
if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING |
IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
- if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) {
- snprintf(buf, sizeof buf, "IRQ %d", irq);
- ret = gpio_request(gpionr, buf);
- if (ret)
- return ret;
- }
+ if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr)))
+ bfin_gpio_irq_prepare(gpionr);
gpio_enabled[gpio_bank(gpionr)] |= gpio_bit(gpionr);
} else {
@@ -595,6 +582,8 @@
(struct pin_int_t *)PINT3_MASK_SET,
};
+extern void bfin_gpio_irq_prepare(unsigned gpio);
+
inline unsigned short get_irq_base(u8 bank, u8 bmap)
{
@@ -697,8 +686,6 @@
static unsigned int bfin_gpio_irq_startup(unsigned int irq)
{
- unsigned int ret;
- char buf[8];
u16 gpionr = irq_to_gpio(irq);
u8 pint_val = irq2pint_lut[irq - SYS_IRQS];
@@ -709,17 +696,13 @@
return -ENODEV;
}
- if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) {
- snprintf(buf, sizeof buf, "IRQ %d", irq);
- ret = gpio_request(gpionr, buf);
- if (ret)
- return ret;
- }
+ if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr)))
+ bfin_gpio_irq_prepare(gpionr);
gpio_enabled[gpio_bank(gpionr)] |= gpio_bit(gpionr);
bfin_gpio_unmask_irq(irq);
- return ret;
+ return 0;
}
static void bfin_gpio_irq_shutdown(unsigned int irq)
@@ -727,15 +710,12 @@
u16 gpionr = irq_to_gpio(irq);
bfin_gpio_mask_irq(irq);
- gpio_free(gpionr);
gpio_enabled[gpio_bank(gpionr)] &= ~gpio_bit(gpionr);
}
static int bfin_gpio_irq_type(unsigned int irq, unsigned int type)
{
- unsigned int ret;
- char buf[8];
u16 gpionr = irq_to_gpio(irq);
u8 pint_val = irq2pint_lut[irq - SYS_IRQS];
u32 pintbit = PINT_BIT(pint_val);
@@ -753,12 +733,8 @@
if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING |
IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
- if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) {
- snprintf(buf, sizeof buf, "IRQ %d", irq);
- ret = gpio_request(gpionr, buf);
- if (ret)
- return ret;
- }
+ if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr)))
+ bfin_gpio_irq_prepare(gpionr);
gpio_enabled[gpio_bank(gpionr)] |= gpio_bit(gpionr);
} else {
@@ -766,8 +742,6 @@
return 0;
}
- gpio_direction_input(gpionr);
-
if ((type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_LEVEL_LOW)))
pint[bank]->invert_set = pintbit; /* low or falling edge denoted by one */
else