| commit | b01f3d75bb16e6466c4e420eae241ad7b805522e | [log] [tgz] |
|---|---|---|
| author | blong <blong@codeaurora.org> | Fri May 25 16:37:37 2018 +0800 |
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | Wed May 30 18:21:49 2018 -0700 |
| tree | bb7a6ebbed87b327cd3cdd24c2dbf3757b711000 | |
| parent | e59297105612902ed6027dd5ed4c2ffc4168c8c3 [diff] |
arm64: Potential rollover condition for timer counter There is potential rollover condition for CNTVCT and CNTPCT counters. So on any architecture timer counter read, if the least significant 32 bits are set, reread counter. CRs-Fixed: 1074621 Change-Id: I136a5f0ee04deeb74c03800d591e44fbd9b4dd39 Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org> Signed-off-by: Biao long <blong@codeaurora.org>