| commit | b0580913797034a1001e867b8b492c75226bf77e | [log] [tgz] |
|---|---|---|
| author | Guennadi Liakhovetski <g.liakhovetski@gmx.de> | Fri Jan 29 14:51:26 2010 +0100 |
| committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | Mon Feb 01 14:35:08 2010 +0000 |
| tree | f20bacd8b37a19d270528fa6a90578a8b006e2e2 | |
| parent | b2c3e923110f6ca60ccb30cf4a6bda5211454c4f [diff] |
ASoC: improve MCLKDIV calculation in wm8978, when OPCLK is not used In case, if OPCLK is not used, and PLL is used for driving the codec, the choice of PLL output frequency could result in a needlessly imprecise system clock frequency. Use an iterative process to select a precise configuration. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>