| commit | b059bdc39321696fe8f344acb7117d57fbd7b475 | [log] [tgz] |
|---|---|---|
| author | Russell King <rmk+kernel@arm.linux.org.uk> | Sat Jun 25 15:44:20 2011 +0100 |
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | Thu Jun 30 11:04:59 2011 +0100 |
| tree | 3a5001287ea0e16339e5cc633f1248470377f967 | |
| parent | fbab1c809467efe001194ab8bb17f0f451a17f97 [diff] |
ARM: entry: rejig register allocation in exception entry handlers
This allows us to avoid moving registers twice to work around the
clobbered registers when we add calls to trace_hardirqs_{on,off}.
Ensure that all SVC handlers return with SPSR in r5 for consistency.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>