WAN: Convert PC300 driver to use normal u8/u16/u32 types
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
diff --git a/drivers/net/wan/pc300_drv.c b/drivers/net/wan/pc300_drv.c
index 65c40cd..d0a8d1e 100644
--- a/drivers/net/wan/pc300_drv.c
+++ b/drivers/net/wan/pc300_drv.c
@@ -283,8 +283,8 @@
static void tx_dma_buf_check(pc300_t *, int);
static void rx_dma_buf_check(pc300_t *, int);
static irqreturn_t cpc_intr(int, void *);
-static int clock_rate_calc(uclong, uclong, int *);
-static uclong detect_ram(pc300_t *);
+static int clock_rate_calc(u32, u32, int *);
+static u32 detect_ram(pc300_t *);
static void plx_init(pc300_t *);
static void cpc_trace(struct net_device *, struct sk_buff *, char);
static int cpc_attach(struct net_device *, unsigned short, unsigned short);
@@ -309,10 +309,10 @@
+ DMA_TX_BD_BASE + ch_factor * sizeof(pcsca_bd_t));
for (i = 0; i < N_DMA_TX_BUF; i++, ptdescr++) {
- cpc_writel(&ptdescr->next, (uclong) (DMA_TX_BD_BASE +
+ cpc_writel(&ptdescr->next, (u32)(DMA_TX_BD_BASE +
(ch_factor + ((i + 1) & (N_DMA_TX_BUF - 1))) * sizeof(pcsca_bd_t)));
- cpc_writel(&ptdescr->ptbuf,
- (uclong) (DMA_TX_BASE + (ch_factor + i) * BD_DEF_LEN));
+ cpc_writel(&ptdescr->ptbuf,
+ (u32)(DMA_TX_BASE + (ch_factor + i) * BD_DEF_LEN));
}
}
@@ -339,10 +339,10 @@
+ DMA_RX_BD_BASE + ch_factor * sizeof(pcsca_bd_t));
for (i = 0; i < N_DMA_RX_BUF; i++, ptdescr++) {
- cpc_writel(&ptdescr->next, (uclong) (DMA_RX_BD_BASE +
- (ch_factor + ((i + 1) & (N_DMA_RX_BUF - 1))) * sizeof(pcsca_bd_t)));
+ cpc_writel(&ptdescr->next, (u32)(DMA_RX_BD_BASE +
+ (ch_factor + ((i + 1) & (N_DMA_RX_BUF - 1))) * sizeof(pcsca_bd_t)));
cpc_writel(&ptdescr->ptbuf,
- (uclong) (DMA_RX_BASE + (ch_factor + i) * BD_DEF_LEN));
+ (u32)(DMA_RX_BASE + (ch_factor + i) * BD_DEF_LEN));
}
}
@@ -365,8 +365,8 @@
{
volatile pcsca_bd_t __iomem *ptdescr;
int i;
- ucshort first_bd = card->chan[ch].tx_first_bd;
- ucshort next_bd = card->chan[ch].tx_next_bd;
+ u16 first_bd = card->chan[ch].tx_first_bd;
+ u16 next_bd = card->chan[ch].tx_next_bd;
printk("#CH%d: f_bd = %d(0x%08zx), n_bd = %d(0x%08zx)\n", ch,
first_bd, TX_BD_ADDR(ch, first_bd),
@@ -390,9 +390,9 @@
{
volatile pcsca_bd_t __iomem *ptdescr;
int i;
- ucshort first_bd = card->chan[ch].tx_first_bd;
- ucshort next_bd = card->chan[ch].tx_next_bd;
- uclong scabase = card->hw.scabase;
+ u16 first_bd = card->chan[ch].tx_first_bd;
+ u16 next_bd = card->chan[ch].tx_next_bd;
+ u32 scabase = card->hw.scabase;
printk ("\nnfree_tx_bd = %d \n", card->chan[ch].nfree_tx_bd);
printk("#CH%d: f_bd = %d(0x%08x), n_bd = %d(0x%08x)\n", ch,
@@ -411,13 +411,13 @@
printk("\n");
}
#endif
-
+
static void rx_dma_buf_check(pc300_t * card, int ch)
{
volatile pcsca_bd_t __iomem *ptdescr;
int i;
- ucshort first_bd = card->chan[ch].rx_first_bd;
- ucshort last_bd = card->chan[ch].rx_last_bd;
+ u16 first_bd = card->chan[ch].rx_first_bd;
+ u16 last_bd = card->chan[ch].rx_last_bd;
int ch_factor;
ch_factor = ch * N_DMA_RX_BUF;
@@ -438,9 +438,9 @@
static int dma_get_rx_frame_size(pc300_t * card, int ch)
{
volatile pcsca_bd_t __iomem *ptdescr;
- ucshort first_bd = card->chan[ch].rx_first_bd;
+ u16 first_bd = card->chan[ch].rx_first_bd;
int rcvd = 0;
- volatile ucchar status;
+ volatile u8 status;
ptdescr = (card->hw.rambase + RX_BD_ADDR(ch, first_bd));
while ((status = cpc_readb(&ptdescr->status)) & DST_OSB) {
@@ -460,12 +460,12 @@
* dma_buf_write: writes a frame to the Tx DMA buffers
* NOTE: this function writes one frame at a time.
*/
-static int dma_buf_write(pc300_t * card, int ch, ucchar * ptdata, int len)
+static int dma_buf_write(pc300_t *card, int ch, u8 *ptdata, int len)
{
int i, nchar;
volatile pcsca_bd_t __iomem *ptdescr;
int tosend = len;
- ucchar nbuf = ((len - 1) / BD_DEF_LEN) + 1;
+ u8 nbuf = ((len - 1) / BD_DEF_LEN) + 1;
if (nbuf >= card->chan[ch].nfree_tx_bd) {
return -ENOMEM;
@@ -507,7 +507,7 @@
pc300ch_t *chan = (pc300ch_t *) & card->chan[ch];
volatile pcsca_bd_t __iomem *ptdescr;
int rcvd = 0;
- volatile ucchar status;
+ volatile u8 status;
ptdescr = (card->hw.rambase +
RX_BD_ADDR(ch, chan->rx_first_bd));
@@ -561,8 +561,8 @@
static void tx_dma_stop(pc300_t * card, int ch)
{
void __iomem *scabase = card->hw.scabase;
- ucchar drr_ena_bit = 1 << (5 + 2 * ch);
- ucchar drr_rst_bit = 1 << (1 + 2 * ch);
+ u8 drr_ena_bit = 1 << (5 + 2 * ch);
+ u8 drr_rst_bit = 1 << (1 + 2 * ch);
/* Disable DMA */
cpc_writeb(scabase + DRR, drr_ena_bit);
@@ -572,8 +572,8 @@
static void rx_dma_stop(pc300_t * card, int ch)
{
void __iomem *scabase = card->hw.scabase;
- ucchar drr_ena_bit = 1 << (4 + 2 * ch);
- ucchar drr_rst_bit = 1 << (2 * ch);
+ u8 drr_ena_bit = 1 << (4 + 2 * ch);
+ u8 drr_rst_bit = 1 << (2 * ch);
/* Disable DMA */
cpc_writeb(scabase + DRR, drr_ena_bit);
@@ -605,7 +605,7 @@
/*************************/
/*** FALC Routines ***/
/*************************/
-static void falc_issue_cmd(pc300_t * card, int ch, ucchar cmd)
+static void falc_issue_cmd(pc300_t *card, int ch, u8 cmd)
{
void __iomem *falcbase = card->hw.falcbase;
unsigned long i = 0;
@@ -673,7 +673,7 @@
static void falc_open_timeslot(pc300_t * card, int ch, int timeslot)
{
void __iomem *falcbase = card->hw.falcbase;
- ucchar tshf = card->chan[ch].falc.offset;
+ u8 tshf = card->chan[ch].falc.offset;
cpc_writeb(falcbase + F_REG((ICB1 + (timeslot - tshf) / 8), ch),
cpc_readb(falcbase + F_REG((ICB1 + (timeslot - tshf) / 8), ch)) &
@@ -689,7 +689,7 @@
static void falc_close_timeslot(pc300_t * card, int ch, int timeslot)
{
void __iomem *falcbase = card->hw.falcbase;
- ucchar tshf = card->chan[ch].falc.offset;
+ u8 tshf = card->chan[ch].falc.offset;
cpc_writeb(falcbase + F_REG((ICB1 + (timeslot - tshf) / 8), ch),
cpc_readb(falcbase + F_REG((ICB1 + (timeslot - tshf) / 8), ch)) |
@@ -810,7 +810,7 @@
pc300chconf_t *conf = (pc300chconf_t *) & chan->conf;
falc_t *pfalc = (falc_t *) & chan->falc;
void __iomem *falcbase = card->hw.falcbase;
- ucchar dja = (ch ? (LIM2_DJA2 | LIM2_DJA1) : 0);
+ u8 dja = (ch ? (LIM2_DJA2 | LIM2_DJA1) : 0);
/* Switch to T1 mode (PCM 24) */
cpc_writeb(falcbase + F_REG(FMR1, ch), FMR1_PMOD);
@@ -979,7 +979,7 @@
pc300chconf_t *conf = (pc300chconf_t *) & chan->conf;
falc_t *pfalc = (falc_t *) & chan->falc;
void __iomem *falcbase = card->hw.falcbase;
- ucchar dja = (ch ? (LIM2_DJA2 | LIM2_DJA1) : 0);
+ u8 dja = (ch ? (LIM2_DJA2 | LIM2_DJA1) : 0);
/* Switch to E1 mode (PCM 30) */
cpc_writeb(falcbase + F_REG(FMR1, ch),
@@ -1185,7 +1185,7 @@
pc300chconf_t *conf = (pc300chconf_t *) & chan->conf;
falc_t *pfalc = (falc_t *) & chan->falc;
void __iomem *falcbase = card->hw.falcbase;
- ucchar dummy;
+ u8 dummy;
unsigned long flags;
memset(pfalc, 0, sizeof(falc_t));
@@ -1401,7 +1401,7 @@
pc300chconf_t *conf = (pc300chconf_t *) & chan->conf;
falc_t *pfalc = (falc_t *) & chan->falc;
void __iomem *falcbase = card->hw.falcbase;
- ucshort counter;
+ u16 counter;
counter = cpc_readb(falcbase + F_REG(FECL, ch));
counter |= cpc_readb(falcbase + F_REG(FECH, ch)) << 8;
@@ -1727,7 +1727,7 @@
* Description: This routine returns the bit error counter value
*----------------------------------------------------------------------------
*/
-static ucshort falc_pattern_test_error(pc300_t * card, int ch)
+static u16 falc_pattern_test_error(pc300_t * card, int ch)
{
pc300ch_t *chan = (pc300ch_t *) & card->chan[ch];
falc_t *pfalc = (falc_t *) & chan->falc;
@@ -1774,7 +1774,7 @@
pc300_t *card = (pc300_t *) chan->card;
int ch = chan->channel;
unsigned long flags;
- ucchar ilar;
+ u8 ilar;
dev->stats.tx_errors++;
dev->stats.tx_aborted_errors++;
@@ -1830,7 +1830,7 @@
}
/* Write buffer to DMA buffers */
- if (dma_buf_write(card, ch, (ucchar *) skb->data, skb->len) != 0) {
+ if (dma_buf_write(card, ch, (u8 *)skb->data, skb->len) != 0) {
// printk("%s: write error. Dropping TX packet.\n", dev->name);
netif_stop_queue(dev);
dev_kfree_skb(skb);
@@ -1995,7 +1995,7 @@
static void sca_intr(pc300_t * card)
{
void __iomem *scabase = card->hw.scabase;
- volatile uclong status;
+ volatile u32 status;
int ch;
int intr_count = 0;
unsigned char dsr_rx;
@@ -2010,7 +2010,7 @@
/**** Reception ****/
if (status & IR0_DRX((IR0_DMIA | IR0_DMIB), ch)) {
- ucchar drx_stat = cpc_readb(scabase + DSR_RX(ch));
+ u8 drx_stat = cpc_readb(scabase + DSR_RX(ch));
/* Clear RX interrupts */
cpc_writeb(scabase + DSR_RX(ch), drx_stat | DSR_DWE);
@@ -2084,7 +2084,7 @@
/**** Transmission ****/
if (status & IR0_DTX((IR0_EFT | IR0_DMIA | IR0_DMIB), ch)) {
- ucchar dtx_stat = cpc_readb(scabase + DSR_TX(ch));
+ u8 dtx_stat = cpc_readb(scabase + DSR_TX(ch));
/* Clear TX interrupts */
cpc_writeb(scabase + DSR_TX(ch), dtx_stat | DSR_DWE);
@@ -2128,7 +2128,7 @@
/**** MSCI ****/
if (status & IR0_M(IR0_RXINTA, ch)) {
- ucchar st1 = cpc_readb(scabase + M_REG(ST1, ch));
+ u8 st1 = cpc_readb(scabase + M_REG(ST1, ch));
/* Clear MSCI interrupts */
cpc_writeb(scabase + M_REG(ST1, ch), st1);
@@ -2170,7 +2170,7 @@
}
}
-static void falc_t1_loop_detection(pc300_t * card, int ch, ucchar frs1)
+static void falc_t1_loop_detection(pc300_t *card, int ch, u8 frs1)
{
pc300ch_t *chan = (pc300ch_t *) & card->chan[ch];
falc_t *pfalc = (falc_t *) & chan->falc;
@@ -2195,7 +2195,7 @@
}
}
-static void falc_e1_loop_detection(pc300_t * card, int ch, ucchar rsp)
+static void falc_e1_loop_detection(pc300_t *card, int ch, u8 rsp)
{
pc300ch_t *chan = (pc300ch_t *) & card->chan[ch];
falc_t *pfalc = (falc_t *) & chan->falc;
@@ -2225,8 +2225,8 @@
pc300ch_t *chan = (pc300ch_t *) & card->chan[ch];
falc_t *pfalc = (falc_t *) & chan->falc;
void __iomem *falcbase = card->hw.falcbase;
- ucchar isr0, isr3, gis;
- ucchar dummy;
+ u8 isr0, isr3, gis;
+ u8 dummy;
while ((gis = cpc_readb(falcbase + F_REG(GIS, ch))) != 0) {
if (gis & GIS_ISR0) {
@@ -2272,8 +2272,8 @@
pc300ch_t *chan = (pc300ch_t *) & card->chan[ch];
falc_t *pfalc = (falc_t *) & chan->falc;
void __iomem *falcbase = card->hw.falcbase;
- ucchar isr1, isr2, isr3, gis, rsp;
- ucchar dummy;
+ u8 isr1, isr2, isr3, gis, rsp;
+ u8 dummy;
while ((gis = cpc_readb(falcbase + F_REG(GIS, ch))) != 0) {
rsp = cpc_readb(falcbase + F_REG(RSP, ch));
@@ -2355,7 +2355,7 @@
static irqreturn_t cpc_intr(int irq, void *dev_id)
{
pc300_t *card = dev_id;
- volatile ucchar plx_status;
+ volatile u8 plx_status;
if (!card) {
#ifdef PC300_DEBUG_INTR
@@ -2394,7 +2394,7 @@
static void cpc_sca_status(pc300_t * card, int ch)
{
- ucchar ilar;
+ u8 ilar;
void __iomem *scabase = card->hw.scabase;
unsigned long flags;
@@ -2812,7 +2812,7 @@
}
}
-static int clock_rate_calc(uclong rate, uclong clock, int *br_io)
+static int clock_rate_calc(u32 rate, u32 clock, int *br_io)
{
int br, tc;
int br_pwr, error;
@@ -2849,12 +2849,12 @@
void __iomem *scabase = card->hw.scabase;
void __iomem *plxbase = card->hw.plxbase;
int ch = chan->channel;
- uclong clkrate = chan->conf.phys_settings.clock_rate;
- uclong clktype = chan->conf.phys_settings.clock_type;
- ucshort encoding = chan->conf.proto_settings.encoding;
- ucshort parity = chan->conf.proto_settings.parity;
- ucchar md0, md2;
-
+ u32 clkrate = chan->conf.phys_settings.clock_rate;
+ u32 clktype = chan->conf.phys_settings.clock_type;
+ u16 encoding = chan->conf.proto_settings.encoding;
+ u16 parity = chan->conf.proto_settings.parity;
+ u8 md0, md2;
+
/* Reset the channel */
cpc_writeb(scabase + M_REG(CMD, ch), CMD_CH_RST);
@@ -3193,16 +3193,16 @@
return 0;
}
-static uclong detect_ram(pc300_t * card)
+static u32 detect_ram(pc300_t * card)
{
- uclong i;
- ucchar data;
+ u32 i;
+ u8 data;
void __iomem *rambase = card->hw.rambase;
card->hw.ramsize = PC300_RAMSIZE;
/* Let's find out how much RAM is present on this board */
for (i = 0; i < card->hw.ramsize; i++) {
- data = (ucchar) (i & 0xff);
+ data = (u8)(i & 0xff);
cpc_writeb(rambase + i, data);
if (cpc_readb(rambase + i) != data) {
break;
@@ -3279,7 +3279,7 @@
cpc_writeb(card->hw.scabase + DMER, 0x80);
if (card->hw.type == PC300_TE) {
- ucchar reg1;
+ u8 reg1;
/* Check CPLD version */
reg1 = cpc_readb(card->hw.falcbase + CPLD_REG1);
@@ -3413,7 +3413,7 @@
{
static int first_time = 1;
int err, eeprom_outdated = 0;
- ucshort device_id;
+ u16 device_id;
pc300_t *card;
if (first_time) {