| commit | b270491eb9a033a1ab6c66e778c9dd3e3a4f7639 | [log] [tgz] |
|---|---|---|
| author | Mark Zhang <markz@nvidia.com> | Tue Dec 09 14:59:59 2014 +0800 |
| committer | Peter De Schrijver <pdeschrijver@nvidia.com> | Mon Feb 02 16:22:34 2015 +0200 |
| tree | 4b0c4d9b987aa11332a5a2f774c0beb7c78f0a6e | |
| parent | 08acae34e8dadaa8c3a0a432760555bba1db8bfb [diff] |
clk: tegra: Define PLLD_DSI and remove dsia(b)_mux PLLD is the only parent for DSIA & DSIB on Tegra124 and Tegra132. Besides, BIT 30 in PLLD_MISC register controls the output of DSI clock. So this patch removes "dsia_mux" & "dsib_mux", and create a new clock "plld_dsi" to represent the DSI clock enable control. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Mark Zhang <markz@nvidia.com>