tree 6c435bdeb944b7587cd9045ea70914831dc00fb6
parent 98618cfe22a5dbb87c0deb341734436aeecd51bf
author Fabio Estevam <fabio.estevam@freescale.com> 1308577033 -0300
committer Sascha Hauer <s.hauer@pengutronix.de> 1310022417 +0200

ARM: mach-imx/mx31_3ds: Fix IOMUX for SPI1 signals

Original code was assuming that the CSPI1 pins on the
MX31PDK were the primary pin function, which is incorrect.

On MX31PDK board these are the pins that provide CSPI1 functionality:

DSR_DCE1 (ALT mode 1) --> CSPI1_CLK
RI_DCE1 (ALT mode 1) --> CSPI1_RDY

DTR_DTE1  -->CSI1_MOSI
DSR_DTE1 --> CSPI1_MISO
DTR_DCE2 ---> CSPI1_SS2

The 3 IOMUX settings above are done via GPR as per Table A-1 of the MX31RM.

This patch fixes the CSPI1 IOMUX and makes the LCD to be functional.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>