tree a49311b0231b3887122ec23771a7b32b54f37bd7
parent 660c63a4a289a835aa9af93a45884c5d0c004b20
author Guennadi Liakhovetski <g.liakhovetski@gmx.de> 1264775466 +0100
committer Mark Brown <broonie@opensource.wolfsonmicro.com> 1264775572 +0000

ASoC: clean up wm8974 and wm8978 clock divider handling

wm8974 and wm8978 codec drivers control DAC and ADC oversampling rates in their
.set_clkdiv() methods, which is wrong, because these are simple boolean
switches and not clock dividers. Move these bits to sound controls. Also remove
manual configuration of the MCLK divider in wm8978, since it is configured
automatically.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>