| config MIPS |
| bool |
| default y |
| select ARCH_SUPPORTS_UPROBES |
| select ARCH_MIGHT_HAVE_PC_PARPORT |
| select ARCH_MIGHT_HAVE_PC_SERIO |
| select ARCH_USE_CMPXCHG_LOCKREF if 64BIT |
| select ARCH_USE_BUILTIN_BSWAP |
| select HAVE_CONTEXT_TRACKING |
| select HAVE_GENERIC_DMA_COHERENT |
| select HAVE_IDE |
| select HAVE_OPROFILE |
| select HAVE_PERF_EVENTS |
| select PERF_USE_VMALLOC |
| select HAVE_ARCH_KGDB |
| select HAVE_ARCH_SECCOMP_FILTER |
| select HAVE_ARCH_TRACEHOOK |
| select HAVE_CBPF_JIT if !CPU_MICROMIPS |
| select HAVE_FUNCTION_TRACER |
| select HAVE_DYNAMIC_FTRACE |
| select HAVE_FTRACE_MCOUNT_RECORD |
| select HAVE_C_RECORDMCOUNT |
| select HAVE_FUNCTION_GRAPH_TRACER |
| select HAVE_KPROBES |
| select HAVE_KRETPROBES |
| select HAVE_SYSCALL_TRACEPOINTS |
| select HAVE_DEBUG_KMEMLEAK |
| select HAVE_SYSCALL_TRACEPOINTS |
| select ARCH_HAS_ELF_RANDOMIZE |
| select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT |
| select RTC_LIB if !MACH_LOONGSON64 |
| select GENERIC_ATOMIC64 if !64BIT |
| select HAVE_DMA_CONTIGUOUS |
| select HAVE_DMA_API_DEBUG |
| select GENERIC_IRQ_PROBE |
| select GENERIC_IRQ_SHOW |
| select GENERIC_PCI_IOMAP |
| select HAVE_ARCH_JUMP_LABEL |
| select ARCH_WANT_IPC_PARSE_VERSION |
| select IRQ_FORCED_THREADING |
| select HAVE_MEMBLOCK |
| select HAVE_MEMBLOCK_NODE_MAP |
| select ARCH_DISCARD_MEMBLOCK |
| select GENERIC_SMP_IDLE_THREAD |
| select BUILDTIME_EXTABLE_SORT |
| select GENERIC_CLOCKEVENTS |
| select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC |
| select GENERIC_CMOS_UPDATE |
| select HAVE_MOD_ARCH_SPECIFIC |
| select HAVE_NMI |
| select VIRT_TO_BUS |
| select MODULES_USE_ELF_REL if MODULES |
| select MODULES_USE_ELF_RELA if MODULES && 64BIT |
| select CLONE_BACKWARDS |
| select HAVE_DEBUG_STACKOVERFLOW |
| select HAVE_CC_STACKPROTECTOR |
| select CPU_PM if CPU_IDLE |
| select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST |
| select ARCH_BINFMT_ELF_STATE |
| select SYSCTL_EXCEPTION_TRACE |
| select HAVE_VIRT_CPU_ACCOUNTING_GEN |
| select HAVE_IRQ_TIME_ACCOUNTING |
| select GENERIC_TIME_VSYSCALL |
| select ARCH_CLOCKSOURCE_DATA |
| select HANDLE_DOMAIN_IRQ |
| select HAVE_EXIT_THREAD |
| select HAVE_REGS_AND_STACK_ACCESS_API |
| select HAVE_ARCH_HARDENED_USERCOPY |
| |
| menu "Machine selection" |
| |
| choice |
| prompt "System type" |
| default SGI_IP22 |
| |
| config MIPS_GENERIC |
| bool "Generic board-agnostic MIPS kernel" |
| select BOOT_RAW |
| select BUILTIN_DTB |
| select CEVT_R4K |
| select CLKSRC_MIPS_GIC |
| select COMMON_CLK |
| select CPU_MIPSR2_IRQ_VI |
| select CPU_MIPSR2_IRQ_EI |
| select CSRC_R4K |
| select DMA_PERDEV_COHERENT |
| select HW_HAS_PCI |
| select IRQ_MIPS_CPU |
| select LIBFDT |
| select MIPS_CPU_SCACHE |
| select MIPS_GIC |
| select MIPS_L1_CACHE_SHIFT_7 |
| select NO_EXCEPT_FILL |
| select PCI_DRIVERS_GENERIC |
| select PINCTRL |
| select SMP_UP if SMP |
| select SYS_HAS_CPU_MIPS32_R1 |
| select SYS_HAS_CPU_MIPS32_R2 |
| select SYS_HAS_CPU_MIPS32_R6 |
| select SYS_HAS_CPU_MIPS64_R1 |
| select SYS_HAS_CPU_MIPS64_R2 |
| select SYS_HAS_CPU_MIPS64_R6 |
| select SYS_SUPPORTS_32BIT_KERNEL |
| select SYS_SUPPORTS_64BIT_KERNEL |
| select SYS_SUPPORTS_BIG_ENDIAN |
| select SYS_SUPPORTS_HIGHMEM |
| select SYS_SUPPORTS_LITTLE_ENDIAN |
| select SYS_SUPPORTS_MICROMIPS |
| select SYS_SUPPORTS_MIPS_CPS |
| select SYS_SUPPORTS_MIPS16 |
| select SYS_SUPPORTS_MULTITHREADING |
| select SYS_SUPPORTS_RELOCATABLE |
| select SYS_SUPPORTS_SMARTMIPS |
| select USB_EHCI_BIG_ENDIAN_DESC if BIG_ENDIAN |
| select USB_EHCI_BIG_ENDIAN_MMIO if BIG_ENDIAN |
| select USB_OHCI_BIG_ENDIAN_DESC if BIG_ENDIAN |
| select USB_OHCI_BIG_ENDIAN_MMIO if BIG_ENDIAN |
| select USB_UHCI_BIG_ENDIAN_DESC if BIG_ENDIAN |
| select USB_UHCI_BIG_ENDIAN_MMIO if BIG_ENDIAN |
| select USE_OF |
| help |
| Select this to build a kernel which aims to support multiple boards, |
| generally using a flattened device tree passed from the bootloader |
| using the boot protocol defined in the UHI (Unified Hosting |
| Interface) specification. |
| |
| config MIPS_ALCHEMY |
| bool "Alchemy processor based machines" |
| select ARCH_PHYS_ADDR_T_64BIT |
| select CEVT_R4K |
| select CSRC_R4K |
| select IRQ_MIPS_CPU |
| select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is |
| select SYS_HAS_CPU_MIPS32_R1 |
| select SYS_SUPPORTS_32BIT_KERNEL |
| select SYS_SUPPORTS_APM_EMULATION |
| select GPIOLIB |
| select SYS_SUPPORTS_ZBOOT |
| select COMMON_CLK |
| |
| config AR7 |
| bool "Texas Instruments AR7" |
| select BOOT_ELF32 |
| select DMA_NONCOHERENT |
| select CEVT_R4K |
| select CSRC_R4K |
| select IRQ_MIPS_CPU |
| select NO_EXCEPT_FILL |
| select SWAP_IO_SPACE |
| select SYS_HAS_CPU_MIPS32_R1 |
| select SYS_HAS_EARLY_PRINTK |
| select SYS_SUPPORTS_32BIT_KERNEL |
| select SYS_SUPPORTS_LITTLE_ENDIAN |
| select SYS_SUPPORTS_MIPS16 |
| select SYS_SUPPORTS_ZBOOT_UART16550 |
| select GPIOLIB |
| select VLYNQ |
| select HAVE_CLK |
| help |
| Support for the Texas Instruments AR7 System-on-a-Chip |
| family: TNETD7100, 7200 and 7300. |
| |
| config ATH25 |
| bool "Atheros AR231x/AR531x SoC support" |
| select CEVT_R4K |
| select CSRC_R4K |
| select DMA_NONCOHERENT |
| select IRQ_MIPS_CPU |
| select IRQ_DOMAIN |
| select SYS_HAS_CPU_MIPS32_R1 |
| select SYS_SUPPORTS_BIG_ENDIAN |
| select SYS_SUPPORTS_32BIT_KERNEL |
| select SYS_HAS_EARLY_PRINTK |
| help |
| Support for Atheros AR231x and Atheros AR531x based boards |
| |
| config ATH79 |
| bool "Atheros AR71XX/AR724X/AR913X based boards" |
| select ARCH_HAS_RESET_CONTROLLER |
| select BOOT_RAW |
| select CEVT_R4K |
| select CSRC_R4K |
| select DMA_NONCOHERENT |
| select GPIOLIB |
| select HAVE_CLK |
| select COMMON_CLK |
| select CLKDEV_LOOKUP |
| select IRQ_MIPS_CPU |
| select MIPS_MACHINE |
| select SYS_HAS_CPU_MIPS32_R2 |
| select SYS_HAS_EARLY_PRINTK |
| select SYS_SUPPORTS_32BIT_KERNEL |
| select SYS_SUPPORTS_BIG_ENDIAN |
| select SYS_SUPPORTS_MIPS16 |
| select SYS_SUPPORTS_ZBOOT_UART_PROM |
| select USE_OF |
| help |
| Support for the Atheros AR71XX/AR724X/AR913X SoCs. |
| |
| config BMIPS_GENERIC |
| bool "Broadcom Generic BMIPS kernel" |
| select BOOT_RAW |
| select NO_EXCEPT_FILL |
| select USE_OF |
| select CEVT_R4K |
| select CSRC_R4K |
| select SYNC_R4K |
| select COMMON_CLK |
| select BCM6345_L1_IRQ |
| select BCM7038_L1_IRQ |
| select BCM7120_L2_IRQ |
| select BRCMSTB_L2_IRQ |
| select IRQ_MIPS_CPU |
| select DMA_NONCOHERENT |
| select SYS_SUPPORTS_32BIT_KERNEL |
| select SYS_SUPPORTS_LITTLE_ENDIAN |
| select SYS_SUPPORTS_BIG_ENDIAN |
| select SYS_SUPPORTS_HIGHMEM |
| select SYS_HAS_CPU_BMIPS32_3300 |
| select SYS_HAS_CPU_BMIPS4350 |
| select SYS_HAS_CPU_BMIPS4380 |
| select SYS_HAS_CPU_BMIPS5000 |
| select SWAP_IO_SPACE |
| select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN |
| select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN |
| select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN |
| select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN |
| help |
| Build a generic DT-based kernel image that boots on select |
| BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top |
| box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN |
| must be set appropriately for your board. |
| |
| config BCM47XX |
| bool "Broadcom BCM47XX based boards" |
| select BOOT_RAW |
| select CEVT_R4K |
| select CSRC_R4K |
| select DMA_NONCOHERENT |
| select HW_HAS_PCI |
| select IRQ_MIPS_CPU |
| select SYS_HAS_CPU_MIPS32_R1 |
| select NO_EXCEPT_FILL |
| select SYS_SUPPORTS_32BIT_KERNEL |
| select SYS_SUPPORTS_LITTLE_ENDIAN |
| select SYS_SUPPORTS_MIPS16 |
| select SYS_HAS_EARLY_PRINTK |
| select USE_GENERIC_EARLY_PRINTK_8250 |
| select GPIOLIB |
| select LEDS_GPIO_REGISTER |
| select BCM47XX_NVRAM |
| select BCM47XX_SPROM |
| help |
| Support for BCM47XX based boards |
| |
| config BCM63XX |
| bool "Broadcom BCM63XX based boards" |
| select BOOT_RAW |
| select CEVT_R4K |
| select CSRC_R4K |
| select SYNC_R4K |
| select DMA_NONCOHERENT |
| select IRQ_MIPS_CPU |
| select SYS_SUPPORTS_32BIT_KERNEL |
| select SYS_SUPPORTS_BIG_ENDIAN |
| select SYS_HAS_EARLY_PRINTK |
| select SWAP_IO_SPACE |
| select GPIOLIB |
| select HAVE_CLK |
| select MIPS_L1_CACHE_SHIFT_4 |
| help |
| Support for BCM63XX based boards |
| |
| config MIPS_COBALT |
| bool "Cobalt Server" |
| select CEVT_R4K |
| select CSRC_R4K |
| select CEVT_GT641XX |
| select DMA_NONCOHERENT |
| select HW_HAS_PCI |
| select I8253 |
| select I8259 |
| select IRQ_MIPS_CPU |
| select IRQ_GT641XX |
| select PCI_GT64XXX_PCI0 |
| select PCI |
| select SYS_HAS_CPU_NEVADA |
| select SYS_HAS_EARLY_PRINTK |
| select SYS_SUPPORTS_32BIT_KERNEL |
| select SYS_SUPPORTS_64BIT_KERNEL |
| select SYS_SUPPORTS_LITTLE_ENDIAN |
| select USE_GENERIC_EARLY_PRINTK_8250 |
| |
| config MACH_DECSTATION |
| bool "DECstations" |
| select BOOT_ELF32 |
| select CEVT_DS1287 |
| select CEVT_R4K if CPU_R4X00 |
| select CSRC_IOASIC |
| select CSRC_R4K if CPU_R4X00 |
| select CPU_DADDI_WORKAROUNDS if 64BIT |
| select CPU_R4000_WORKAROUNDS if 64BIT |
| select CPU_R4400_WORKAROUNDS if 64BIT |
| select DMA_NONCOHERENT |
| select NO_IOPORT_MAP |
| select IRQ_MIPS_CPU |
| select SYS_HAS_CPU_R3000 |
| select SYS_HAS_CPU_R4X00 |
| select SYS_SUPPORTS_32BIT_KERNEL |
| select SYS_SUPPORTS_64BIT_KERNEL |
| select SYS_SUPPORTS_LITTLE_ENDIAN |
| select SYS_SUPPORTS_128HZ |
| select SYS_SUPPORTS_256HZ |
| select SYS_SUPPORTS_1024HZ |
| select MIPS_L1_CACHE_SHIFT_4 |
| help |
| This enables support for DEC's MIPS based workstations. For details |
| see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the |
| DECstation porting pages on <http://decstation.unix-ag.org/>. |
| |
| If you have one of the following DECstation Models you definitely |
| want to choose R4xx0 for the CPU Type: |
| |
| DECstation 5000/50 |
| DECstation 5000/150 |
| DECstation 5000/260 |
| DECsystem 5900/260 |
| |
| otherwise choose R3000. |
| |
| config MACH_JAZZ |
| bool "Jazz family of machines" |
| select FW_ARC |
| select FW_ARC32 |
| select ARCH_MAY_HAVE_PC_FDC |
| select CEVT_R4K |
| select CSRC_R4K |
| select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN |
| select GENERIC_ISA_DMA |
| select HAVE_PCSPKR_PLATFORM |
| select IRQ_MIPS_CPU |
| select I8253 |
| select I8259 |
| select ISA |
| select SYS_HAS_CPU_R4X00 |
| select SYS_SUPPORTS_32BIT_KERNEL |
| select SYS_SUPPORTS_64BIT_KERNEL |
| select SYS_SUPPORTS_100HZ |
| help |
| This a family of machines based on the MIPS R4030 chipset which was |
| used by several vendors to build RISC/os and Windows NT workstations. |
| Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and |
| Olivetti M700-10 workstations. |
| |
| config MACH_INGENIC |
| bool "Ingenic SoC based machines" |
| select SYS_SUPPORTS_32BIT_KERNEL |
| select SYS_SUPPORTS_LITTLE_ENDIAN |
| select SYS_SUPPORTS_ZBOOT_UART16550 |
| select DMA_NONCOHERENT |
| select IRQ_MIPS_CPU |
| select GPIOLIB |
| select COMMON_CLK |
| select GENERIC_IRQ_CHIP |
| select BUILTIN_DTB |
| select USE_OF |
| select LIBFDT |
| |
| config LANTIQ |
| bool "Lantiq based platforms" |
| select DMA_NONCOHERENT |
| select IRQ_MIPS_CPU |
| select CEVT_R4K |
| select CSRC_R4K |
| select SYS_HAS_CPU_MIPS32_R1 |
| select SYS_HAS_CPU_MIPS32_R2 |
| select SYS_SUPPORTS_BIG_ENDIAN |
| select SYS_SUPPORTS_32BIT_KERNEL |
| select SYS_SUPPORTS_MIPS16 |
| select SYS_SUPPORTS_MULTITHREADING |
| select SYS_HAS_EARLY_PRINTK |
| select GPIOLIB |
| select SWAP_IO_SPACE |
| select BOOT_RAW |
| select CLKDEV_LOOKUP |
| select USE_OF |
| select PINCTRL |
| select PINCTRL_LANTIQ |
| select ARCH_HAS_RESET_CONTROLLER |
| select RESET_CONTROLLER |
| |
| config LASAT |
| bool "LASAT Networks platforms" |
| select CEVT_R4K |
| select CRC32 |
| select CSRC_R4K |
| select DMA_NONCOHERENT |
| select SYS_HAS_EARLY_PRINTK |
| select HW_HAS_PCI |
| select IRQ_MIPS_CPU |
| select PCI_GT64XXX_PCI0 |
| select MIPS_NILE4 |
| select R5000_CPU_SCACHE |
| select SYS_HAS_CPU_R5000 |
| select SYS_SUPPORTS_32BIT_KERNEL |
| select SYS_SUPPORTS_64BIT_KERNEL if BROKEN |
| select SYS_SUPPORTS_LITTLE_ENDIAN |
| |
| config MACH_LOONGSON32 |
| bool "Loongson-1 family of machines" |
| select SYS_SUPPORTS_ZBOOT |
| help |
| This enables support for the Loongson-1 family of machines. |
| |
| Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by |
| the Institute of Computing Technology (ICT), Chinese Academy of |
| Sciences (CAS). |
| |
| config MACH_LOONGSON64 |
| bool "Loongson-2/3 family of machines" |
| select SYS_SUPPORTS_ZBOOT |
| help |
| This enables the support of Loongson-2/3 family of machines. |
| |
| Loongson-2 is a family of single-core CPUs and Loongson-3 is a |
| family of multi-core CPUs. They are both 64-bit general-purpose |
| MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute |
| of Computing Technology (ICT), Chinese Academy of Sciences (CAS) |
| in the People's Republic of China. The chief architect is Professor |
| Weiwu Hu. |
| |
| config MACH_PISTACHIO |
| bool "IMG Pistachio SoC based boards" |
| select BOOT_ELF32 |
| select BOOT_RAW |
| select CEVT_R4K |
| select CLKSRC_MIPS_GIC |
| select COMMON_CLK |
| select CSRC_R4K |
| select DMA_NONCOHERENT |
| select GPIOLIB |
| select IRQ_MIPS_CPU |
| select LIBFDT |
| select MFD_SYSCON |
| select MIPS_CPU_SCACHE |
| select MIPS_GIC |
| select PINCTRL |
| select REGULATOR |
| select SYS_HAS_CPU_MIPS32_R2 |
| select SYS_SUPPORTS_32BIT_KERNEL |
| select SYS_SUPPORTS_LITTLE_ENDIAN |
| select SYS_SUPPORTS_MIPS_CPS |
| select SYS_SUPPORTS_MULTITHREADING |
| select SYS_SUPPORTS_RELOCATABLE |
| select SYS_SUPPORTS_ZBOOT |
| select SYS_HAS_EARLY_PRINTK |
| select USE_GENERIC_EARLY_PRINTK_8250 |
| select USE_OF |
| help |
| This enables support for the IMG Pistachio SoC platform. |
| |
| config MACH_XILFPGA |
| bool "MIPSfpga Xilinx based boards" |
| select BOOT_ELF32 |
| select BOOT_RAW |
| select BUILTIN_DTB |
| select CEVT_R4K |
| select COMMON_CLK |
| select CSRC_R4K |
| select GPIOLIB |
| select IRQ_MIPS_CPU |
| select LIBFDT |
| select MIPS_CPU_SCACHE |
| select SYS_HAS_EARLY_PRINTK |
| select SYS_HAS_CPU_MIPS32_R2 |
| select SYS_SUPPORTS_32BIT_KERNEL |
| select SYS_SUPPORTS_LITTLE_ENDIAN |
| select SYS_SUPPORTS_ZBOOT_UART16550 |
| select USE_OF |
| select USE_GENERIC_EARLY_PRINTK_8250 |
| help |
| This enables support for the IMG University Program MIPSfpga platform. |
| |
| config MIPS_MALTA |
| bool "MIPS Malta board" |
| select ARCH_MAY_HAVE_PC_FDC |
| select BOOT_ELF32 |
| select BOOT_RAW |
| select BUILTIN_DTB |
| select CEVT_R4K |
| select CSRC_R4K |
| select CLKSRC_MIPS_GIC |
| select COMMON_CLK |
| select DMA_MAYBE_COHERENT |
| select GENERIC_ISA_DMA |
| select HAVE_PCSPKR_PLATFORM |
| select IRQ_MIPS_CPU |
| select MIPS_GIC |
| select HW_HAS_PCI |
| select I8253 |
| select I8259 |
| select MIPS_BONITO64 |
| select MIPS_CPU_SCACHE |
| select MIPS_L1_CACHE_SHIFT_6 |
| select PCI_GT64XXX_PCI0 |
| select MIPS_MSC |
| select SMP_UP if SMP |
| select SWAP_IO_SPACE |
| select SYS_HAS_CPU_MIPS32_R1 |
| select SYS_HAS_CPU_MIPS32_R2 |
| select SYS_HAS_CPU_MIPS32_R3_5 |
| select SYS_HAS_CPU_MIPS32_R5 |
| select SYS_HAS_CPU_MIPS32_R6 |
| select SYS_HAS_CPU_MIPS64_R1 |
| select SYS_HAS_CPU_MIPS64_R2 |
| select SYS_HAS_CPU_MIPS64_R6 |
| select SYS_HAS_CPU_NEVADA |
| select SYS_HAS_CPU_RM7000 |
| select SYS_SUPPORTS_32BIT_KERNEL |
| select SYS_SUPPORTS_64BIT_KERNEL |
| select SYS_SUPPORTS_BIG_ENDIAN |
| select SYS_SUPPORTS_HIGHMEM |
| select SYS_SUPPORTS_LITTLE_ENDIAN |
| select SYS_SUPPORTS_MICROMIPS |
| select SYS_SUPPORTS_MIPS_CMP |
| select SYS_SUPPORTS_MIPS_CPS |
| select SYS_SUPPORTS_MIPS16 |
| select SYS_SUPPORTS_MULTITHREADING |
| select SYS_SUPPORTS_SMARTMIPS |
| select SYS_SUPPORTS_ZBOOT |
| select SYS_SUPPORTS_RELOCATABLE |
| select USE_OF |
| select LIBFDT |
| select ZONE_DMA32 if 64BIT |
| select BUILTIN_DTB |
| select LIBFDT |
| help |
| This enables support for the MIPS Technologies Malta evaluation |
| board. |
| |
| config MACH_PIC32 |
| bool "Microchip PIC32 Family" |
| help |
| This enables support for the Microchip PIC32 family of platforms. |
| |
| Microchip PIC32 is a family of general-purpose 32 bit MIPS core |
| microcontrollers. |
| |
| config NEC_MARKEINS |
| bool "NEC EMMA2RH Mark-eins board" |
| select SOC_EMMA2RH |
| select HW_HAS_PCI |
| help |
| This enables support for the NEC Electronics Mark-eins boards. |
| |
| config MACH_VR41XX |
| bool "NEC VR4100 series based machines" |
| select CEVT_R4K |
| select CSRC_R4K |
| select SYS_HAS_CPU_VR41XX |
| select SYS_SUPPORTS_MIPS16 |
| select GPIOLIB |
| |
| config NXP_STB220 |
| bool "NXP STB220 board" |
| select SOC_PNX833X |
| help |
| Support for NXP Semiconductors STB220 Development Board. |
| |
| config NXP_STB225 |
| bool "NXP 225 board" |
| select SOC_PNX833X |
| select SOC_PNX8335 |
| help |
| Support for NXP Semiconductors STB225 Development Board. |
| |
| config PMC_MSP |
| bool "PMC-Sierra MSP chipsets" |
| select CEVT_R4K |
| select CSRC_R4K |
| select DMA_NONCOHERENT |
| select SWAP_IO_SPACE |
| select NO_EXCEPT_FILL |
| select BOOT_RAW |
| select SYS_HAS_CPU_MIPS32_R1 |
| select SYS_HAS_CPU_MIPS32_R2 |
| select SYS_SUPPORTS_32BIT_KERNEL |
| select SYS_SUPPORTS_BIG_ENDIAN |
| select SYS_SUPPORTS_MIPS16 |
| select IRQ_MIPS_CPU |
| select SERIAL_8250 |
| select SERIAL_8250_CONSOLE |
| select USB_EHCI_BIG_ENDIAN_MMIO |
| select USB_EHCI_BIG_ENDIAN_DESC |
| help |
| This adds support for the PMC-Sierra family of Multi-Service |
| Processor System-On-A-Chips. These parts include a number |
| of integrated peripherals, interfaces and DSPs in addition to |
| a variety of MIPS cores. |
| |
| config RALINK |
| bool "Ralink based machines" |
| select CEVT_R4K |
| select CSRC_R4K |
| select BOOT_RAW |
| select DMA_NONCOHERENT |
| select IRQ_MIPS_CPU |
| select USE_OF |
| select SYS_HAS_CPU_MIPS32_R1 |
| select SYS_HAS_CPU_MIPS32_R2 |
| select SYS_SUPPORTS_32BIT_KERNEL |
| select SYS_SUPPORTS_LITTLE_ENDIAN |
| select SYS_SUPPORTS_MIPS16 |
| select SYS_HAS_EARLY_PRINTK |
| select CLKDEV_LOOKUP |
| select ARCH_HAS_RESET_CONTROLLER |
| select RESET_CONTROLLER |
| |
| config SGI_IP22 |
| bool "SGI IP22 (Indy/Indigo2)" |
| select FW_ARC |
| select FW_ARC32 |
| select BOOT_ELF32 |
| select CEVT_R4K |
| select CSRC_R4K |
| select DEFAULT_SGI_PARTITION |
| select DMA_NONCOHERENT |
| select HW_HAS_EISA |
| select I8253 |
| select I8259 |
| select IP22_CPU_SCACHE |
| select IRQ_MIPS_CPU |
| select GENERIC_ISA_DMA_SUPPORT_BROKEN |
| select SGI_HAS_I8042 |
| select SGI_HAS_INDYDOG |
| select SGI_HAS_HAL2 |
| select SGI_HAS_SEEQ |
| select SGI_HAS_WD93 |
| select SGI_HAS_ZILOG |
| select SWAP_IO_SPACE |
| select SYS_HAS_CPU_R4X00 |
| select SYS_HAS_CPU_R5000 |
| # |
| # Disable EARLY_PRINTK for now since it leads to overwritten prom |
| # memory during early boot on some machines. |
| # |
| # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com |
| # for a more details discussion |
| # |
| # select SYS_HAS_EARLY_PRINTK |
| select SYS_SUPPORTS_32BIT_KERNEL |
| select SYS_SUPPORTS_64BIT_KERNEL |
| select SYS_SUPPORTS_BIG_ENDIAN |
| select MIPS_L1_CACHE_SHIFT_7 |
| help |
| This are the SGI Indy, Challenge S and Indigo2, as well as certain |
| OEM variants like the Tandem CMN B006S. To compile a Linux kernel |
| that runs on these, say Y here. |
| |
| config SGI_IP27 |
| bool "SGI IP27 (Origin200/2000)" |
| select FW_ARC |
| select FW_ARC64 |
| select BOOT_ELF64 |
| select DEFAULT_SGI_PARTITION |
| select DMA_COHERENT |
| select SYS_HAS_EARLY_PRINTK |
| select HW_HAS_PCI |
| select NR_CPUS_DEFAULT_64 |
| select SYS_HAS_CPU_R10000 |
| select SYS_SUPPORTS_64BIT_KERNEL |
| select SYS_SUPPORTS_BIG_ENDIAN |
| select SYS_SUPPORTS_NUMA |
| select SYS_SUPPORTS_SMP |
| select MIPS_L1_CACHE_SHIFT_7 |
| help |
| This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics |
| workstations. To compile a Linux kernel that runs on these, say Y |
| here. |
| |
| config SGI_IP28 |
| bool "SGI IP28 (Indigo2 R10k)" |
| select FW_ARC |
| select FW_ARC64 |
| select BOOT_ELF64 |
| select CEVT_R4K |
| select CSRC_R4K |
| select DEFAULT_SGI_PARTITION |
| select DMA_NONCOHERENT |
| select GENERIC_ISA_DMA_SUPPORT_BROKEN |
| select IRQ_MIPS_CPU |
| select HW_HAS_EISA |
| select I8253 |
| select I8259 |
| select SGI_HAS_I8042 |
| select SGI_HAS_INDYDOG |
| select SGI_HAS_HAL2 |
| select SGI_HAS_SEEQ |
| select SGI_HAS_WD93 |
| select SGI_HAS_ZILOG |
| select SWAP_IO_SPACE |
| select SYS_HAS_CPU_R10000 |
| # |
| # Disable EARLY_PRINTK for now since it leads to overwritten prom |
| # memory during early boot on some machines. |
| # |
| # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com |
| # for a more details discussion |
| # |
| # select SYS_HAS_EARLY_PRINTK |
| select SYS_SUPPORTS_64BIT_KERNEL |
| select SYS_SUPPORTS_BIG_ENDIAN |
| select MIPS_L1_CACHE_SHIFT_7 |
| help |
| This is the SGI Indigo2 with R10000 processor. To compile a Linux |
| kernel that runs on these, say Y here. |
| |
| config SGI_IP32 |
| bool "SGI IP32 (O2)" |
| select FW_ARC |
| select FW_ARC32 |
| select BOOT_ELF32 |
| select CEVT_R4K |
| select CSRC_R4K |
| select DMA_NONCOHERENT |
| select HW_HAS_PCI |
| select IRQ_MIPS_CPU |
| select R5000_CPU_SCACHE |
| select RM7000_CPU_SCACHE |
| select SYS_HAS_CPU_R5000 |
| select SYS_HAS_CPU_R10000 if BROKEN |
| select SYS_HAS_CPU_RM7000 |
| select SYS_HAS_CPU_NEVADA |
| select SYS_SUPPORTS_64BIT_KERNEL |
| select SYS_SUPPORTS_BIG_ENDIAN |
| help |
| If you want this kernel to run on SGI O2 workstation, say Y here. |
| |
| config SIBYTE_CRHINE |
| bool "Sibyte BCM91120C-CRhine" |
| select BOOT_ELF32 |
| select DMA_COHERENT |
| select SIBYTE_BCM1120 |
| select SWAP_IO_SPACE |
| select SYS_HAS_CPU_SB1 |
| select SYS_SUPPORTS_BIG_ENDIAN |
| select SYS_SUPPORTS_LITTLE_ENDIAN |
| |
| config SIBYTE_CARMEL |
| bool "Sibyte BCM91120x-Carmel" |
| select BOOT_ELF32 |
| select DMA_COHERENT |
| select SIBYTE_BCM1120 |
| select SWAP_IO_SPACE |
| select SYS_HAS_CPU_SB1 |
| select SYS_SUPPORTS_BIG_ENDIAN |
| select SYS_SUPPORTS_LITTLE_ENDIAN |
| |
| config SIBYTE_CRHONE |
| bool "Sibyte BCM91125C-CRhone" |
| select BOOT_ELF32 |
| select DMA_COHERENT |
| select SIBYTE_BCM1125 |
| select SWAP_IO_SPACE |
| select SYS_HAS_CPU_SB1 |
| select SYS_SUPPORTS_BIG_ENDIAN |
| select SYS_SUPPORTS_HIGHMEM |
| select SYS_SUPPORTS_LITTLE_ENDIAN |
| |
| config SIBYTE_RHONE |
| bool "Sibyte BCM91125E-Rhone" |
| select BOOT_ELF32 |
| select DMA_COHERENT |
| select SIBYTE_BCM1125H |
| select SWAP_IO_SPACE |
| select SYS_HAS_CPU_SB1 |
| select SYS_SUPPORTS_BIG_ENDIAN |
| select SYS_SUPPORTS_LITTLE_ENDIAN |
| |
| config SIBYTE_SWARM |
| bool "Sibyte BCM91250A-SWARM" |
| select BOOT_ELF32 |
| select DMA_COHERENT |
| select HAVE_PATA_PLATFORM |
| select SIBYTE_SB1250 |
| select SWAP_IO_SPACE |
| select SYS_HAS_CPU_SB1 |
| select SYS_SUPPORTS_BIG_ENDIAN |
| select SYS_SUPPORTS_HIGHMEM |
| select SYS_SUPPORTS_LITTLE_ENDIAN |
| select ZONE_DMA32 if 64BIT |
| |
| config SIBYTE_LITTLESUR |
| bool "Sibyte BCM91250C2-LittleSur" |
| select BOOT_ELF32 |
| select DMA_COHERENT |
| select HAVE_PATA_PLATFORM |
| select SIBYTE_SB1250 |
| select SWAP_IO_SPACE |
| select SYS_HAS_CPU_SB1 |
| select SYS_SUPPORTS_BIG_ENDIAN |
| select SYS_SUPPORTS_HIGHMEM |
| select SYS_SUPPORTS_LITTLE_ENDIAN |
| |
| config SIBYTE_SENTOSA |
| bool "Sibyte BCM91250E-Sentosa" |
| select BOOT_ELF32 |
| select DMA_COHERENT |
| select SIBYTE_SB1250 |
| select SWAP_IO_SPACE |
| select SYS_HAS_CPU_SB1 |
| select SYS_SUPPORTS_BIG_ENDIAN |
| select SYS_SUPPORTS_LITTLE_ENDIAN |
| |
| config SIBYTE_BIGSUR |
| bool "Sibyte BCM91480B-BigSur" |
| select BOOT_ELF32 |
| select DMA_COHERENT |
| select NR_CPUS_DEFAULT_4 |
| select SIBYTE_BCM1x80 |
| select SWAP_IO_SPACE |
| select SYS_HAS_CPU_SB1 |
| select SYS_SUPPORTS_BIG_ENDIAN |
| select SYS_SUPPORTS_HIGHMEM |
| select SYS_SUPPORTS_LITTLE_ENDIAN |
| select ZONE_DMA32 if 64BIT |
| |
| config SNI_RM |
| bool "SNI RM200/300/400" |
| select FW_ARC if CPU_LITTLE_ENDIAN |
| select FW_ARC32 if CPU_LITTLE_ENDIAN |
| select FW_SNIPROM if CPU_BIG_ENDIAN |
| select ARCH_MAY_HAVE_PC_FDC |
| select BOOT_ELF32 |
| select CEVT_R4K |
| select CSRC_R4K |
| select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN |
| select DMA_NONCOHERENT |
| select GENERIC_ISA_DMA |
| select HAVE_PCSPKR_PLATFORM |
| select HW_HAS_EISA |
| select HW_HAS_PCI |
| select IRQ_MIPS_CPU |
| select I8253 |
| select I8259 |
| select ISA |
| select SWAP_IO_SPACE if CPU_BIG_ENDIAN |
| select SYS_HAS_CPU_R4X00 |
| select SYS_HAS_CPU_R5000 |
| select SYS_HAS_CPU_R10000 |
| select R5000_CPU_SCACHE |
| select SYS_HAS_EARLY_PRINTK |
| select SYS_SUPPORTS_32BIT_KERNEL |
| select SYS_SUPPORTS_64BIT_KERNEL |
| select SYS_SUPPORTS_BIG_ENDIAN |
| select SYS_SUPPORTS_HIGHMEM |
| select SYS_SUPPORTS_LITTLE_ENDIAN |
| help |
| The SNI RM200/300/400 are MIPS-based machines manufactured by |
| Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid |
| Technology and now in turn merged with Fujitsu. Say Y here to |
| support this machine type. |
| |
| config MACH_TX39XX |
| bool "Toshiba TX39 series based machines" |
| |
| config MACH_TX49XX |
| bool "Toshiba TX49 series based machines" |
| |
| config MIKROTIK_RB532 |
| bool "Mikrotik RB532 boards" |
| select CEVT_R4K |
| select CSRC_R4K |
| select DMA_NONCOHERENT |
| select HW_HAS_PCI |
| select IRQ_MIPS_CPU |
| select SYS_HAS_CPU_MIPS32_R1 |
| select SYS_SUPPORTS_32BIT_KERNEL |
| select SYS_SUPPORTS_LITTLE_ENDIAN |
| select SWAP_IO_SPACE |
| select BOOT_RAW |
| select GPIOLIB |
| select MIPS_L1_CACHE_SHIFT_4 |
| help |
| Support the Mikrotik(tm) RouterBoard 532 series, |
| based on the IDT RC32434 SoC. |
| |
| config CAVIUM_OCTEON_SOC |
| bool "Cavium Networks Octeon SoC based boards" |
| select CEVT_R4K |
| select ARCH_PHYS_ADDR_T_64BIT |
| select DMA_COHERENT |
| select SYS_SUPPORTS_64BIT_KERNEL |
| select SYS_SUPPORTS_BIG_ENDIAN |
| select EDAC_SUPPORT |
| select EDAC_ATOMIC_SCRUB |
| select SYS_SUPPORTS_LITTLE_ENDIAN |
| select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN |
| select SYS_HAS_EARLY_PRINTK |
| select SYS_HAS_CPU_CAVIUM_OCTEON |
| select HW_HAS_PCI |
| select ZONE_DMA32 |
| select HOLES_IN_ZONE |
| select GPIOLIB |
| select LIBFDT |
| select USE_OF |
| select ARCH_SPARSEMEM_ENABLE |
| select SYS_SUPPORTS_SMP |
| select NR_CPUS_DEFAULT_16 |
| select BUILTIN_DTB |
| select MTD_COMPLEX_MAPPINGS |
| help |
| This option supports all of the Octeon reference boards from Cavium |
| Networks. It builds a kernel that dynamically determines the Octeon |
| CPU type and supports all known board reference implementations. |
| Some of the supported boards are: |
| EBT3000 |
| EBH3000 |
| EBH3100 |
| Thunder |
| Kodama |
| Hikari |
| Say Y here for most Octeon reference boards. |
| |
| config NLM_XLR_BOARD |
| bool "Netlogic XLR/XLS based systems" |
| select BOOT_ELF32 |
| select NLM_COMMON |
| select SYS_HAS_CPU_XLR |
| select SYS_SUPPORTS_SMP |
| select HW_HAS_PCI |
| select SWAP_IO_SPACE |
| select SYS_SUPPORTS_32BIT_KERNEL |
| select SYS_SUPPORTS_64BIT_KERNEL |
| select ARCH_PHYS_ADDR_T_64BIT |
| select SYS_SUPPORTS_BIG_ENDIAN |
| select SYS_SUPPORTS_HIGHMEM |
| select DMA_COHERENT |
| select NR_CPUS_DEFAULT_32 |
| select CEVT_R4K |
| select CSRC_R4K |
| select IRQ_MIPS_CPU |
| select ZONE_DMA32 if 64BIT |
| select SYNC_R4K |
| select SYS_HAS_EARLY_PRINTK |
| select SYS_SUPPORTS_ZBOOT |
| select SYS_SUPPORTS_ZBOOT_UART16550 |
| help |
| Support for systems based on Netlogic XLR and XLS processors. |
| Say Y here if you have a XLR or XLS based board. |
| |
| config NLM_XLP_BOARD |
| bool "Netlogic XLP based systems" |
| select BOOT_ELF32 |
| select NLM_COMMON |
| select SYS_HAS_CPU_XLP |
| select SYS_SUPPORTS_SMP |
| select HW_HAS_PCI |
| select SYS_SUPPORTS_32BIT_KERNEL |
| select SYS_SUPPORTS_64BIT_KERNEL |
| select ARCH_PHYS_ADDR_T_64BIT |
| select GPIOLIB |
| select SYS_SUPPORTS_BIG_ENDIAN |
| select SYS_SUPPORTS_LITTLE_ENDIAN |
| select SYS_SUPPORTS_HIGHMEM |
| select DMA_COHERENT |
| select NR_CPUS_DEFAULT_32 |
| select CEVT_R4K |
| select CSRC_R4K |
| select IRQ_MIPS_CPU |
| select ZONE_DMA32 if 64BIT |
| select SYNC_R4K |
| select SYS_HAS_EARLY_PRINTK |
| select USE_OF |
| select SYS_SUPPORTS_ZBOOT |
| select SYS_SUPPORTS_ZBOOT_UART16550 |
| help |
| This board is based on Netlogic XLP Processor. |
| Say Y here if you have a XLP based board. |
| |
| config MIPS_PARAVIRT |
| bool "Para-Virtualized guest system" |
| select CEVT_R4K |
| select CSRC_R4K |
| select DMA_COHERENT |
| select SYS_SUPPORTS_64BIT_KERNEL |
| select SYS_SUPPORTS_32BIT_KERNEL |
| select SYS_SUPPORTS_BIG_ENDIAN |
| select SYS_SUPPORTS_SMP |
| select NR_CPUS_DEFAULT_4 |
| select SYS_HAS_EARLY_PRINTK |
| select SYS_HAS_CPU_MIPS32_R2 |
| select SYS_HAS_CPU_MIPS64_R2 |
| select SYS_HAS_CPU_CAVIUM_OCTEON |
| select HW_HAS_PCI |
| select SWAP_IO_SPACE |
| help |
| This option supports guest running under ???? |
| |
| endchoice |
| |
| source "arch/mips/alchemy/Kconfig" |
| source "arch/mips/ath25/Kconfig" |
| source "arch/mips/ath79/Kconfig" |
| source "arch/mips/bcm47xx/Kconfig" |
| source "arch/mips/bcm63xx/Kconfig" |
| source "arch/mips/bmips/Kconfig" |
| source "arch/mips/generic/Kconfig" |
| source "arch/mips/jazz/Kconfig" |
| source "arch/mips/jz4740/Kconfig" |
| source "arch/mips/lantiq/Kconfig" |
| source "arch/mips/lasat/Kconfig" |
| source "arch/mips/pic32/Kconfig" |
| source "arch/mips/pistachio/Kconfig" |
| source "arch/mips/pmcs-msp71xx/Kconfig" |
| source "arch/mips/ralink/Kconfig" |
| source "arch/mips/sgi-ip27/Kconfig" |
| source "arch/mips/sibyte/Kconfig" |
| source "arch/mips/txx9/Kconfig" |
| source "arch/mips/vr41xx/Kconfig" |
| source "arch/mips/cavium-octeon/Kconfig" |
| source "arch/mips/loongson32/Kconfig" |
| source "arch/mips/loongson64/Kconfig" |
| source "arch/mips/netlogic/Kconfig" |
| source "arch/mips/paravirt/Kconfig" |
| source "arch/mips/xilfpga/Kconfig" |
| |
| endmenu |
| |
| config RWSEM_GENERIC_SPINLOCK |
| bool |
| default y |
| |
| config RWSEM_XCHGADD_ALGORITHM |
| bool |
| |
| config ARCH_HAS_ILOG2_U32 |
| bool |
| default n |
| |
| config ARCH_HAS_ILOG2_U64 |
| bool |
| default n |
| |
| config GENERIC_HWEIGHT |
| bool |
| default y |
| |
| config GENERIC_CALIBRATE_DELAY |
| bool |
| default y |
| |
| config SCHED_OMIT_FRAME_POINTER |
| bool |
| default y |
| |
| # |
| # Select some configuration options automatically based on user selections. |
| # |
| config FW_ARC |
| bool |
| |
| config ARCH_MAY_HAVE_PC_FDC |
| bool |
| |
| config BOOT_RAW |
| bool |
| |
| config CEVT_BCM1480 |
| bool |
| |
| config CEVT_DS1287 |
| bool |
| |
| config CEVT_GT641XX |
| bool |
| |
| config CEVT_R4K |
| bool |
| |
| config CEVT_SB1250 |
| bool |
| |
| config CEVT_TXX9 |
| bool |
| |
| config CSRC_BCM1480 |
| bool |
| |
| config CSRC_IOASIC |
| bool |
| |
| config CSRC_R4K |
| bool |
| |
| config CSRC_SB1250 |
| bool |
| |
| config MIPS_CLOCK_VSYSCALL |
| def_bool CSRC_R4K || CLKSRC_MIPS_GIC |
| |
| config GPIO_TXX9 |
| select GPIOLIB |
| bool |
| |
| config FW_CFE |
| bool |
| |
| config ARCH_DMA_ADDR_T_64BIT |
| def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT |
| |
| config ARCH_SUPPORTS_UPROBES |
| bool |
| |
| config DMA_MAYBE_COHERENT |
| select DMA_NONCOHERENT |
| bool |
| |
| config DMA_PERDEV_COHERENT |
| bool |
| select DMA_MAYBE_COHERENT |
| |
| config DMA_COHERENT |
| bool |
| |
| config DMA_NONCOHERENT |
| bool |
| select NEED_DMA_MAP_STATE |
| |
| config NEED_DMA_MAP_STATE |
| bool |
| |
| config SYS_HAS_EARLY_PRINTK |
| bool |
| |
| config SYS_SUPPORTS_HOTPLUG_CPU |
| bool |
| |
| config MIPS_BONITO64 |
| bool |
| |
| config MIPS_MSC |
| bool |
| |
| config MIPS_NILE4 |
| bool |
| |
| config SYNC_R4K |
| bool |
| |
| config MIPS_MACHINE |
| def_bool n |
| |
| config NO_IOPORT_MAP |
| def_bool n |
| |
| config GENERIC_CSUM |
| bool |
| |
| config GENERIC_ISA_DMA |
| bool |
| select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n |
| select ISA_DMA_API |
| |
| config GENERIC_ISA_DMA_SUPPORT_BROKEN |
| bool |
| select GENERIC_ISA_DMA |
| |
| config ISA_DMA_API |
| bool |
| |
| config HOLES_IN_ZONE |
| bool |
| |
| config SYS_SUPPORTS_RELOCATABLE |
| bool |
| help |
| Selected if the platform supports relocating the kernel. |
| The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF |
| to allow access to command line and entropy sources. |
| |
| # |
| # Endianness selection. Sufficiently obscure so many users don't know what to |
| # answer,so we try hard to limit the available choices. Also the use of a |
| # choice statement should be more obvious to the user. |
| # |
| choice |
| prompt "Endianness selection" |
| help |
| Some MIPS machines can be configured for either little or big endian |
| byte order. These modes require different kernels and a different |
| Linux distribution. In general there is one preferred byteorder for a |
| particular system but some systems are just as commonly used in the |
| one or the other endianness. |
| |
| config CPU_BIG_ENDIAN |
| bool "Big endian" |
| depends on SYS_SUPPORTS_BIG_ENDIAN |
| |
| config CPU_LITTLE_ENDIAN |
| bool "Little endian" |
| depends on SYS_SUPPORTS_LITTLE_ENDIAN |
| |
| endchoice |
| |
| config EXPORT_UASM |
| bool |
| |
| config SYS_SUPPORTS_APM_EMULATION |
| bool |
| |
| config SYS_SUPPORTS_BIG_ENDIAN |
| bool |
| |
| config SYS_SUPPORTS_LITTLE_ENDIAN |
| bool |
| |
| config SYS_SUPPORTS_HUGETLBFS |
| bool |
| depends on CPU_SUPPORTS_HUGEPAGES && 64BIT |
| default y |
| |
| config MIPS_HUGE_TLB_SUPPORT |
| def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE |
| |
| config IRQ_CPU_RM7K |
| bool |
| |
| config IRQ_MSP_SLP |
| bool |
| |
| config IRQ_MSP_CIC |
| bool |
| |
| config IRQ_TXX9 |
| bool |
| |
| config IRQ_GT641XX |
| bool |
| |
| config PCI_GT64XXX_PCI0 |
| bool |
| |
| config NO_EXCEPT_FILL |
| bool |
| |
| config SOC_EMMA2RH |
| bool |
| select CEVT_R4K |
| select CSRC_R4K |
| select DMA_NONCOHERENT |
| select IRQ_MIPS_CPU |
| select SWAP_IO_SPACE |
| select SYS_HAS_CPU_R5500 |
| select SYS_SUPPORTS_32BIT_KERNEL |
| select SYS_SUPPORTS_64BIT_KERNEL |
| select SYS_SUPPORTS_BIG_ENDIAN |
| |
| config SOC_PNX833X |
| bool |
| select CEVT_R4K |
| select CSRC_R4K |
| select IRQ_MIPS_CPU |
| select DMA_NONCOHERENT |
| select SYS_HAS_CPU_MIPS32_R2 |
| select SYS_SUPPORTS_32BIT_KERNEL |
| select SYS_SUPPORTS_LITTLE_ENDIAN |
| select SYS_SUPPORTS_BIG_ENDIAN |
| select SYS_SUPPORTS_MIPS16 |
| select CPU_MIPSR2_IRQ_VI |
| |
| config SOC_PNX8335 |
| bool |
| select SOC_PNX833X |
| |
| config MIPS_SPRAM |
| bool |
| |
| config SWAP_IO_SPACE |
| bool |
| |
| config SGI_HAS_INDYDOG |
| bool |
| |
| config SGI_HAS_HAL2 |
| bool |
| |
| config SGI_HAS_SEEQ |
| bool |
| |
| config SGI_HAS_WD93 |
| bool |
| |
| config SGI_HAS_ZILOG |
| bool |
| |
| config SGI_HAS_I8042 |
| bool |
| |
| config DEFAULT_SGI_PARTITION |
| bool |
| |
| config FW_ARC32 |
| bool |
| |
| config FW_SNIPROM |
| bool |
| |
| config BOOT_ELF32 |
| bool |
| |
| config MIPS_L1_CACHE_SHIFT_4 |
| bool |
| |
| config MIPS_L1_CACHE_SHIFT_5 |
| bool |
| |
| config MIPS_L1_CACHE_SHIFT_6 |
| bool |
| |
| config MIPS_L1_CACHE_SHIFT_7 |
| bool |
| |
| config MIPS_L1_CACHE_SHIFT |
| int |
| default "7" if MIPS_L1_CACHE_SHIFT_7 |
| default "6" if MIPS_L1_CACHE_SHIFT_6 |
| default "5" if MIPS_L1_CACHE_SHIFT_5 |
| default "4" if MIPS_L1_CACHE_SHIFT_4 |
| default "5" |
| |
| config HAVE_STD_PC_SERIAL_PORT |
| bool |
| |
| config ARC_CONSOLE |
| bool "ARC console support" |
| depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) |
| |
| config ARC_MEMORY |
| bool |
| depends on MACH_JAZZ || SNI_RM || SGI_IP32 |
| default y |
| |
| config ARC_PROMLIB |
| bool |
| depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32 |
| default y |
| |
| config FW_ARC64 |
| bool |
| |
| config BOOT_ELF64 |
| bool |
| |
| menu "CPU selection" |
| |
| choice |
| prompt "CPU type" |
| default CPU_R4X00 |
| |
| config CPU_LOONGSON3 |
| bool "Loongson 3 CPU" |
| depends on SYS_HAS_CPU_LOONGSON3 |
| select CPU_SUPPORTS_64BIT_KERNEL |
| select CPU_SUPPORTS_HIGHMEM |
| select CPU_SUPPORTS_HUGEPAGES |
| select WEAK_ORDERING |
| select WEAK_REORDERING_BEYOND_LLSC |
| select MIPS_PGD_C0_CONTEXT |
| select GPIOLIB |
| help |
| The Loongson 3 processor implements the MIPS64R2 instruction |
| set with many extensions. |
| |
| config LOONGSON3_ENHANCEMENT |
| bool "New Loongson 3 CPU Enhancements" |
| default n |
| select CPU_MIPSR2 |
| select CPU_HAS_PREFETCH |
| depends on CPU_LOONGSON3 |
| help |
| New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A |
| R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as |
| FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User |
| Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer), |
| Fast TLB refill support, etc. |
| |
| This option enable those enhancements which are not probed at run |
| time. If you want a generic kernel to run on all Loongson 3 machines, |
| please say 'N' here. If you want a high-performance kernel to run on |
| new Loongson 3 machines only, please say 'Y' here. |
| |
| config CPU_LOONGSON2E |
| bool "Loongson 2E" |
| depends on SYS_HAS_CPU_LOONGSON2E |
| select CPU_LOONGSON2 |
| help |
| The Loongson 2E processor implements the MIPS III instruction set |
| with many extensions. |
| |
| It has an internal FPGA northbridge, which is compatible to |
| bonito64. |
| |
| config CPU_LOONGSON2F |
| bool "Loongson 2F" |
| depends on SYS_HAS_CPU_LOONGSON2F |
| select CPU_LOONGSON2 |
| select GPIOLIB |
| help |
| The Loongson 2F processor implements the MIPS III instruction set |
| with many extensions. |
| |
| Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller |
| have a similar programming interface with FPGA northbridge used in |
| Loongson2E. |
| |
| config CPU_LOONGSON1B |
| bool "Loongson 1B" |
| depends on SYS_HAS_CPU_LOONGSON1B |
| select CPU_LOONGSON1 |
| select LEDS_GPIO_REGISTER |
| help |
| The Loongson 1B is a 32-bit SoC, which implements the MIPS32 |
| release 2 instruction set. |
| |
| config CPU_LOONGSON1C |
| bool "Loongson 1C" |
| depends on SYS_HAS_CPU_LOONGSON1C |
| select CPU_LOONGSON1 |
| select ARCH_WANT_OPTIONAL_GPIOLIB |
| select LEDS_GPIO_REGISTER |
| help |
| The Loongson 1C is a 32-bit SoC, which implements the MIPS32 |
| release 2 instruction set. |
| |
| config CPU_MIPS32_R1 |
| bool "MIPS32 Release 1" |
| depends on SYS_HAS_CPU_MIPS32_R1 |
| select CPU_HAS_PREFETCH |
| select CPU_SUPPORTS_32BIT_KERNEL |
| select CPU_SUPPORTS_HIGHMEM |
| help |
| Choose this option to build a kernel for release 1 or later of the |
| MIPS32 architecture. Most modern embedded systems with a 32-bit |
| MIPS processor are based on a MIPS32 processor. If you know the |
| specific type of processor in your system, choose those that one |
| otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. |
| Release 2 of the MIPS32 architecture is available since several |
| years so chances are you even have a MIPS32 Release 2 processor |
| in which case you should choose CPU_MIPS32_R2 instead for better |
| performance. |
| |
| config CPU_MIPS32_R2 |
| bool "MIPS32 Release 2" |
| depends on SYS_HAS_CPU_MIPS32_R2 |
| select CPU_HAS_PREFETCH |
| select CPU_SUPPORTS_32BIT_KERNEL |
| select CPU_SUPPORTS_HIGHMEM |
| select CPU_SUPPORTS_MSA |
| select HAVE_KVM |
| help |
| Choose this option to build a kernel for release 2 or later of the |
| MIPS32 architecture. Most modern embedded systems with a 32-bit |
| MIPS processor are based on a MIPS32 processor. If you know the |
| specific type of processor in your system, choose those that one |
| otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. |
| |
| config CPU_MIPS32_R6 |
| bool "MIPS32 Release 6" |
| depends on SYS_HAS_CPU_MIPS32_R6 |
| select CPU_HAS_PREFETCH |
| select CPU_SUPPORTS_32BIT_KERNEL |
| select CPU_SUPPORTS_HIGHMEM |
| select CPU_SUPPORTS_MSA |
| select GENERIC_CSUM |
| select HAVE_KVM |
| select MIPS_O32_FP64_SUPPORT |
| help |
| Choose this option to build a kernel for release 6 or later of the |
| MIPS32 architecture. New MIPS processors, starting with the Warrior |
| family, are based on a MIPS32r6 processor. If you own an older |
| processor, you probably need to select MIPS32r1 or MIPS32r2 instead. |
| |
| config CPU_MIPS64_R1 |
| bool "MIPS64 Release 1" |
| depends on SYS_HAS_CPU_MIPS64_R1 |
| select CPU_HAS_PREFETCH |
| select CPU_SUPPORTS_32BIT_KERNEL |
| select CPU_SUPPORTS_64BIT_KERNEL |
| select CPU_SUPPORTS_HIGHMEM |
| select CPU_SUPPORTS_HUGEPAGES |
| help |
| Choose this option to build a kernel for release 1 or later of the |
| MIPS64 architecture. Many modern embedded systems with a 64-bit |
| MIPS processor are based on a MIPS64 processor. If you know the |
| specific type of processor in your system, choose those that one |
| otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. |
| Release 2 of the MIPS64 architecture is available since several |
| years so chances are you even have a MIPS64 Release 2 processor |
| in which case you should choose CPU_MIPS64_R2 instead for better |
| performance. |
| |
| config CPU_MIPS64_R2 |
| bool "MIPS64 Release 2" |
| depends on SYS_HAS_CPU_MIPS64_R2 |
| select CPU_HAS_PREFETCH |
| select CPU_SUPPORTS_32BIT_KERNEL |
| select CPU_SUPPORTS_64BIT_KERNEL |
| select CPU_SUPPORTS_HIGHMEM |
| select CPU_SUPPORTS_HUGEPAGES |
| select CPU_SUPPORTS_MSA |
| select HAVE_KVM |
| help |
| Choose this option to build a kernel for release 2 or later of the |
| MIPS64 architecture. Many modern embedded systems with a 64-bit |
| MIPS processor are based on a MIPS64 processor. If you know the |
| specific type of processor in your system, choose those that one |
| otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. |
| |
| config CPU_MIPS64_R6 |
| bool "MIPS64 Release 6" |
| depends on SYS_HAS_CPU_MIPS64_R6 |
| select CPU_HAS_PREFETCH |
| select CPU_SUPPORTS_32BIT_KERNEL |
| select CPU_SUPPORTS_64BIT_KERNEL |
| select CPU_SUPPORTS_HIGHMEM |
| select CPU_SUPPORTS_MSA |
| select GENERIC_CSUM |
| select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32 |
| select HAVE_KVM |
| help |
| Choose this option to build a kernel for release 6 or later of the |
| MIPS64 architecture. New MIPS processors, starting with the Warrior |
| family, are based on a MIPS64r6 processor. If you own an older |
| processor, you probably need to select MIPS64r1 or MIPS64r2 instead. |
| |
| config CPU_R3000 |
| bool "R3000" |
| depends on SYS_HAS_CPU_R3000 |
| select CPU_HAS_WB |
| select CPU_SUPPORTS_32BIT_KERNEL |
| select CPU_SUPPORTS_HIGHMEM |
| help |
| Please make sure to pick the right CPU type. Linux/MIPS is not |
| designed to be generic, i.e. Kernels compiled for R3000 CPUs will |
| *not* work on R4000 machines and vice versa. However, since most |
| of the supported machines have an R4000 (or similar) CPU, R4x00 |
| might be a safe bet. If the resulting kernel does not work, |
| try to recompile with R3000. |
| |
| config CPU_TX39XX |
| bool "R39XX" |
| depends on SYS_HAS_CPU_TX39XX |
| select CPU_SUPPORTS_32BIT_KERNEL |
| |
| config CPU_VR41XX |
| bool "R41xx" |
| depends on SYS_HAS_CPU_VR41XX |
| select CPU_SUPPORTS_32BIT_KERNEL |
| select CPU_SUPPORTS_64BIT_KERNEL |
| help |
| The options selects support for the NEC VR4100 series of processors. |
| Only choose this option if you have one of these processors as a |
| kernel built with this option will not run on any other type of |
| processor or vice versa. |
| |
| config CPU_R4300 |
| bool "R4300" |
| depends on SYS_HAS_CPU_R4300 |
| select CPU_SUPPORTS_32BIT_KERNEL |
| select CPU_SUPPORTS_64BIT_KERNEL |
| help |
| MIPS Technologies R4300-series processors. |
| |
| config CPU_R4X00 |
| bool "R4x00" |
| depends on SYS_HAS_CPU_R4X00 |
| select CPU_SUPPORTS_32BIT_KERNEL |
| select CPU_SUPPORTS_64BIT_KERNEL |
| select CPU_SUPPORTS_HUGEPAGES |
| help |
| MIPS Technologies R4000-series processors other than 4300, including |
| the R4000, R4400, R4600, and 4700. |
| |
| config CPU_TX49XX |
| bool "R49XX" |
| depends on SYS_HAS_CPU_TX49XX |
| select CPU_HAS_PREFETCH |
| select CPU_SUPPORTS_32BIT_KERNEL |
| select CPU_SUPPORTS_64BIT_KERNEL |
| select CPU_SUPPORTS_HUGEPAGES |
| |
| config CPU_R5000 |
| bool "R5000" |
| depends on SYS_HAS_CPU_R5000 |
| select CPU_SUPPORTS_32BIT_KERNEL |
| select CPU_SUPPORTS_64BIT_KERNEL |
| select CPU_SUPPORTS_HUGEPAGES |
| help |
| MIPS Technologies R5000-series processors other than the Nevada. |
| |
| config CPU_R5432 |
| bool "R5432" |
| depends on SYS_HAS_CPU_R5432 |
| select CPU_SUPPORTS_32BIT_KERNEL |
| select CPU_SUPPORTS_64BIT_KERNEL |
| select CPU_SUPPORTS_HUGEPAGES |
| |
| config CPU_R5500 |
| bool "R5500" |
| depends on SYS_HAS_CPU_R5500 |
| select CPU_SUPPORTS_32BIT_KERNEL |
| select CPU_SUPPORTS_64BIT_KERNEL |
| select CPU_SUPPORTS_HUGEPAGES |
| help |
| NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV |
| instruction set. |
| |
| config CPU_R6000 |
| bool "R6000" |
| depends on SYS_HAS_CPU_R6000 |
| select CPU_SUPPORTS_32BIT_KERNEL |
| help |
| MIPS Technologies R6000 and R6000A series processors. Note these |
| processors are extremely rare and the support for them is incomplete. |
| |
| config CPU_NEVADA |
| bool "RM52xx" |
| depends on SYS_HAS_CPU_NEVADA |
| select CPU_SUPPORTS_32BIT_KERNEL |
| select CPU_SUPPORTS_64BIT_KERNEL |
| select CPU_SUPPORTS_HUGEPAGES |
| help |
| QED / PMC-Sierra RM52xx-series ("Nevada") processors. |
| |
| config CPU_R8000 |
| bool "R8000" |
| depends on SYS_HAS_CPU_R8000 |
| select CPU_HAS_PREFETCH |
| select CPU_SUPPORTS_64BIT_KERNEL |
| help |
| MIPS Technologies R8000 processors. Note these processors are |
| uncommon and the support for them is incomplete. |
| |
| config CPU_R10000 |
| bool "R10000" |
| depends on SYS_HAS_CPU_R10000 |
| select CPU_HAS_PREFETCH |
| select CPU_SUPPORTS_32BIT_KERNEL |
| select CPU_SUPPORTS_64BIT_KERNEL |
| select CPU_SUPPORTS_HIGHMEM |
| select CPU_SUPPORTS_HUGEPAGES |
| help |
| MIPS Technologies R10000-series processors. |
| |
| config CPU_RM7000 |
| bool "RM7000" |
| depends on SYS_HAS_CPU_RM7000 |
| select CPU_HAS_PREFETCH |
| select CPU_SUPPORTS_32BIT_KERNEL |
| select CPU_SUPPORTS_64BIT_KERNEL |
| select CPU_SUPPORTS_HIGHMEM |
| select CPU_SUPPORTS_HUGEPAGES |
| |
| config CPU_SB1 |
| bool "SB1" |
| depends on SYS_HAS_CPU_SB1 |
| select CPU_SUPPORTS_32BIT_KERNEL |
| select CPU_SUPPORTS_64BIT_KERNEL |
| select CPU_SUPPORTS_HIGHMEM |
| select CPU_SUPPORTS_HUGEPAGES |
| select WEAK_ORDERING |
| |
| config CPU_CAVIUM_OCTEON |
| bool "Cavium Octeon processor" |
| depends on SYS_HAS_CPU_CAVIUM_OCTEON |
| select CPU_HAS_PREFETCH |
| select CPU_SUPPORTS_64BIT_KERNEL |
| select WEAK_ORDERING |
| select CPU_SUPPORTS_HIGHMEM |
| select CPU_SUPPORTS_HUGEPAGES |
| select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN |
| select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN |
| select MIPS_L1_CACHE_SHIFT_7 |
| help |
| The Cavium Octeon processor is a highly integrated chip containing |
| many ethernet hardware widgets for networking tasks. The processor |
| can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. |
| Full details can be found at http://www.caviumnetworks.com. |
| |
| config CPU_BMIPS |
| bool "Broadcom BMIPS" |
| depends on SYS_HAS_CPU_BMIPS |
| select CPU_MIPS32 |
| select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 |
| select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 |
| select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 |
| select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 |
| select CPU_SUPPORTS_32BIT_KERNEL |
| select DMA_NONCOHERENT |
| select IRQ_MIPS_CPU |
| select SWAP_IO_SPACE |
| select WEAK_ORDERING |
| select CPU_SUPPORTS_HIGHMEM |
| select CPU_HAS_PREFETCH |
| help |
| Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. |
| |
| config CPU_XLR |
| bool "Netlogic XLR SoC" |
| depends on SYS_HAS_CPU_XLR |
| select CPU_SUPPORTS_32BIT_KERNEL |
| select CPU_SUPPORTS_64BIT_KERNEL |
| select CPU_SUPPORTS_HIGHMEM |
| select CPU_SUPPORTS_HUGEPAGES |
| select WEAK_ORDERING |
| select WEAK_REORDERING_BEYOND_LLSC |
| help |
| Netlogic Microsystems XLR/XLS processors. |
| |
| config CPU_XLP |
| bool "Netlogic XLP SoC" |
| depends on SYS_HAS_CPU_XLP |
| select CPU_SUPPORTS_32BIT_KERNEL |
| select CPU_SUPPORTS_64BIT_KERNEL |
| select CPU_SUPPORTS_HIGHMEM |
| select WEAK_ORDERING |
| select WEAK_REORDERING_BEYOND_LLSC |
| select CPU_HAS_PREFETCH |
| select CPU_MIPSR2 |
| select CPU_SUPPORTS_HUGEPAGES |
| select MIPS_ASID_BITS_VARIABLE |
| help |
| Netlogic Microsystems XLP processors. |
| endchoice |
| |
| config CPU_MIPS32_3_5_FEATURES |
| bool "MIPS32 Release 3.5 Features" |
| depends on SYS_HAS_CPU_MIPS32_R3_5 |
| depends on CPU_MIPS32_R2 || CPU_MIPS32_R6 |
| help |
| Choose this option to build a kernel for release 2 or later of the |
| MIPS32 architecture including features from the 3.5 release such as |
| support for Enhanced Virtual Addressing (EVA). |
| |
| config CPU_MIPS32_3_5_EVA |
| bool "Enhanced Virtual Addressing (EVA)" |
| depends on CPU_MIPS32_3_5_FEATURES |
| select EVA |
| default y |
| help |
| Choose this option if you want to enable the Enhanced Virtual |
| Addressing (EVA) on your MIPS32 core (such as proAptiv). |
| One of its primary benefits is an increase in the maximum size |
| of lowmem (up to 3GB). If unsure, say 'N' here. |
| |
| config CPU_MIPS32_R5_FEATURES |
| bool "MIPS32 Release 5 Features" |
| depends on SYS_HAS_CPU_MIPS32_R5 |
| depends on CPU_MIPS32_R2 |
| help |
| Choose this option to build a kernel for release 2 or later of the |
| MIPS32 architecture including features from release 5 such as |
| support for Extended Physical Addressing (XPA). |
| |
| config CPU_MIPS32_R5_XPA |
| bool "Extended Physical Addressing (XPA)" |
| depends on CPU_MIPS32_R5_FEATURES |
| depends on !EVA |
| depends on !PAGE_SIZE_4KB |
| depends on SYS_SUPPORTS_HIGHMEM |
| select XPA |
| select HIGHMEM |
| select ARCH_PHYS_ADDR_T_64BIT |
| default n |
| help |
| Choose this option if you want to enable the Extended Physical |
| Addressing (XPA) on your MIPS32 core (such as P5600 series). The |
| benefit is to increase physical addressing equal to or greater |
| than 40 bits. Note that this has the side effect of turning on |
| 64-bit addressing which in turn makes the PTEs 64-bit in size. |
| If unsure, say 'N' here. |
| |
| if CPU_LOONGSON2F |
| config CPU_NOP_WORKAROUNDS |
| bool |
| |
| config CPU_JUMP_WORKAROUNDS |
| bool |
| |
| config CPU_LOONGSON2F_WORKAROUNDS |
| bool "Loongson 2F Workarounds" |
| default y |
| select CPU_NOP_WORKAROUNDS |
| select CPU_JUMP_WORKAROUNDS |
| help |
| Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which |
| require workarounds. Without workarounds the system may hang |
| unexpectedly. For more information please refer to the gas |
| -mfix-loongson2f-nop and -mfix-loongson2f-jump options. |
| |
| Loongson 2F03 and later have fixed these issues and no workarounds |
| are needed. The workarounds have no significant side effect on them |
| but may decrease the performance of the system so this option should |
| be disabled unless the kernel is intended to be run on 2F01 or 2F02 |
| systems. |
| |
| If unsure, please say Y. |
| endif # CPU_LOONGSON2F |
| |
| config SYS_SUPPORTS_ZBOOT |
| bool |
| select HAVE_KERNEL_GZIP |
| select HAVE_KERNEL_BZIP2 |
| select HAVE_KERNEL_LZ4 |
| select HAVE_KERNEL_LZMA |
| select HAVE_KERNEL_LZO |
| select HAVE_KERNEL_XZ |
| |
| config SYS_SUPPORTS_ZBOOT_UART16550 |
| bool |
| select SYS_SUPPORTS_ZBOOT |
| |
| config SYS_SUPPORTS_ZBOOT_UART_PROM |
| bool |
| select SYS_SUPPORTS_ZBOOT |
| |
| config CPU_LOONGSON2 |
| bool |
| select CPU_SUPPORTS_32BIT_KERNEL |
| select CPU_SUPPORTS_64BIT_KERNEL |
| select CPU_SUPPORTS_HIGHMEM |
| select CPU_SUPPORTS_HUGEPAGES |
| |
| config CPU_LOONGSON1 |
| bool |
| select CPU_MIPS32 |
| select CPU_MIPSR2 |
| select CPU_HAS_PREFETCH |
| select CPU_SUPPORTS_32BIT_KERNEL |
| select CPU_SUPPORTS_HIGHMEM |
| select CPU_SUPPORTS_CPUFREQ |
| |
| config CPU_BMIPS32_3300 |
| select SMP_UP if SMP |
| bool |
| |
| config CPU_BMIPS4350 |
| bool |
| select SYS_SUPPORTS_SMP |
| select SYS_SUPPORTS_HOTPLUG_CPU |
| |
| config CPU_BMIPS4380 |
| bool |
| select MIPS_L1_CACHE_SHIFT_6 |
| select SYS_SUPPORTS_SMP |
| select SYS_SUPPORTS_HOTPLUG_CPU |
| select CPU_HAS_RIXI |
| |
| config CPU_BMIPS5000 |
| bool |
| select MIPS_CPU_SCACHE |
| select MIPS_L1_CACHE_SHIFT_7 |
| select SYS_SUPPORTS_SMP |
| select SYS_SUPPORTS_HOTPLUG_CPU |
| select CPU_HAS_RIXI |
| |
| config SYS_HAS_CPU_LOONGSON3 |
| bool |
| select CPU_SUPPORTS_CPUFREQ |
| select CPU_HAS_RIXI |
| |
| config SYS_HAS_CPU_LOONGSON2E |
| bool |
| |
| config SYS_HAS_CPU_LOONGSON2F |
| bool |
| select CPU_SUPPORTS_CPUFREQ |
| select CPU_SUPPORTS_ADDRWINCFG if 64BIT |
| select CPU_SUPPORTS_UNCACHED_ACCELERATED |
| |
| config SYS_HAS_CPU_LOONGSON1B |
| bool |
| |
| config SYS_HAS_CPU_LOONGSON1C |
| bool |
| |
| config SYS_HAS_CPU_MIPS32_R1 |
| bool |
| |
| config SYS_HAS_CPU_MIPS32_R2 |
| bool |
| |
| config SYS_HAS_CPU_MIPS32_R3_5 |
| bool |
| |
| config SYS_HAS_CPU_MIPS32_R5 |
| bool |
| |
| config SYS_HAS_CPU_MIPS32_R6 |
| bool |
| |
| config SYS_HAS_CPU_MIPS64_R1 |
| bool |
| |
| config SYS_HAS_CPU_MIPS64_R2 |
| bool |
| |
| config SYS_HAS_CPU_MIPS64_R6 |
| bool |
| |
| config SYS_HAS_CPU_R3000 |
| bool |
| |
| config SYS_HAS_CPU_TX39XX |
| bool |
| |
| config SYS_HAS_CPU_VR41XX |
| bool |
| |
| config SYS_HAS_CPU_R4300 |
| bool |
| |
| config SYS_HAS_CPU_R4X00 |
| bool |
| |
| config SYS_HAS_CPU_TX49XX |
| bool |
| |
| config SYS_HAS_CPU_R5000 |
| bool |
| |
| config SYS_HAS_CPU_R5432 |
| bool |
| |
| config SYS_HAS_CPU_R5500 |
| bool |
| |
| config SYS_HAS_CPU_R6000 |
| bool |
| |
| config SYS_HAS_CPU_NEVADA |
| bool |
| |
| config SYS_HAS_CPU_R8000 |
| bool |
| |
| config SYS_HAS_CPU_R10000 |
| bool |
| |
| config SYS_HAS_CPU_RM7000 |
| bool |
| |
| config SYS_HAS_CPU_SB1 |
| bool |
| |
| config SYS_HAS_CPU_CAVIUM_OCTEON |
| bool |
| |
| config SYS_HAS_CPU_BMIPS |
| bool |
| |
| config SYS_HAS_CPU_BMIPS32_3300 |
| bool |
| select SYS_HAS_CPU_BMIPS |
| |
| config SYS_HAS_CPU_BMIPS4350 |
| bool |
| select SYS_HAS_CPU_BMIPS |
| |
| config SYS_HAS_CPU_BMIPS4380 |
| bool |
| select SYS_HAS_CPU_BMIPS |
| |
| config SYS_HAS_CPU_BMIPS5000 |
| bool |
| select SYS_HAS_CPU_BMIPS |
| |
| config SYS_HAS_CPU_XLR |
| bool |
| |
| config SYS_HAS_CPU_XLP |
| bool |
| |
| config MIPS_MALTA_PM |
| depends on MIPS_MALTA |
| depends on PCI |
| bool |
| default y |
| |
| # |
| # CPU may reorder R->R, R->W, W->R, W->W |
| # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC |
| # |
| config WEAK_ORDERING |
| bool |
| |
| # |
| # CPU may reorder reads and writes beyond LL/SC |
| # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC |
| # |
| config WEAK_REORDERING_BEYOND_LLSC |
| bool |
| endmenu |
| |
| # |
| # These two indicate any level of the MIPS32 and MIPS64 architecture |
| # |
| config CPU_MIPS32 |
| bool |
| default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6 |
| |
| config CPU_MIPS64 |
| bool |
| default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6 |
| |
| # |
| # These two indicate the revision of the architecture, either Release 1 or Release 2 |
| # |
| config CPU_MIPSR1 |
| bool |
| default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 |
| |
| config CPU_MIPSR2 |
| bool |
| default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON |
| select CPU_HAS_RIXI |
| select MIPS_SPRAM |
| |
| config CPU_MIPSR6 |
| bool |
| default y if CPU_MIPS32_R6 || CPU_MIPS64_R6 |
| select CPU_HAS_RIXI |
| select HAVE_ARCH_BITREVERSE |
| select MIPS_ASID_BITS_VARIABLE |
| select MIPS_SPRAM |
| |
| config EVA |
| bool |
| |
| config XPA |
| bool |
| |
| config SYS_SUPPORTS_32BIT_KERNEL |
| bool |
| config SYS_SUPPORTS_64BIT_KERNEL |
| bool |
| config CPU_SUPPORTS_32BIT_KERNEL |
| bool |
| config CPU_SUPPORTS_64BIT_KERNEL |
| bool |
| config CPU_SUPPORTS_CPUFREQ |
| bool |
| config CPU_SUPPORTS_ADDRWINCFG |
| bool |
| config CPU_SUPPORTS_HUGEPAGES |
| bool |
| config CPU_SUPPORTS_UNCACHED_ACCELERATED |
| bool |
| config MIPS_PGD_C0_CONTEXT |
| bool |
| default y if 64BIT && CPU_MIPSR2 && !CPU_XLP |
| |
| # |
| # Set to y for ptrace access to watch registers. |
| # |
| config HARDWARE_WATCHPOINTS |
| bool |
| default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6 |
| |
| menu "Kernel type" |
| |
| choice |
| prompt "Kernel code model" |
| help |
| You should only select this option if you have a workload that |
| actually benefits from 64-bit processing or if your machine has |
| large memory. You will only be presented a single option in this |
| menu if your system does not support both 32-bit and 64-bit kernels. |
| |
| config 32BIT |
| bool "32-bit kernel" |
| depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL |
| select TRAD_SIGNALS |
| help |
| Select this option if you want to build a 32-bit kernel. |
| |
| config 64BIT |
| bool "64-bit kernel" |
| depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL |
| help |
| Select this option if you want to build a 64-bit kernel. |
| |
| endchoice |
| |
| config KVM_GUEST |
| bool "KVM Guest Kernel" |
| depends on BROKEN_ON_SMP |
| help |
| Select this option if building a guest kernel for KVM (Trap & Emulate) |
| mode. |
| |
| config KVM_GUEST_TIMER_FREQ |
| int "Count/Compare Timer Frequency (MHz)" |
| depends on KVM_GUEST |
| default 100 |
| help |
| Set this to non-zero if building a guest kernel for KVM to skip RTC |
| emulation when determining guest CPU Frequency. Instead, the guest's |
| timer frequency is specified directly. |
| |
| config MIPS_VA_BITS_48 |
| bool "48 bits virtual memory" |
| depends on 64BIT |
| help |
| Support a maximum at least 48 bits of application virtual memory. |
| Default is 40 bits or less, depending on the CPU. |
| This option result in a small memory overhead for page tables. |
| This option is only supported with 16k and 64k page sizes. |
| If unsure, say N. |
| |
| choice |
| prompt "Kernel page size" |
| default PAGE_SIZE_4KB |
| |
| config PAGE_SIZE_4KB |
| bool "4kB" |
| depends on !CPU_LOONGSON2 && !CPU_LOONGSON3 |
| depends on !MIPS_VA_BITS_48 |
| help |
| This option select the standard 4kB Linux page size. On some |
| R3000-family processors this is the only available page size. Using |
| 4kB page size will minimize memory consumption and is therefore |
| recommended for low memory systems. |
| |
| config PAGE_SIZE_8KB |
| bool "8kB" |
| depends on CPU_R8000 || CPU_CAVIUM_OCTEON |
| depends on !MIPS_VA_BITS_48 |
| help |
| Using 8kB page size will result in higher performance kernel at |
| the price of higher memory consumption. This option is available |
| only on R8000 and cnMIPS processors. Note that you will need a |
| suitable Linux distribution to support this. |
| |
| config PAGE_SIZE_16KB |
| bool "16kB" |
| depends on !CPU_R3000 && !CPU_TX39XX |
| help |
| Using 16kB page size will result in higher performance kernel at |
| the price of higher memory consumption. This option is available on |
| all non-R3000 family processors. Note that you will need a suitable |
| Linux distribution to support this. |
| |
| config PAGE_SIZE_32KB |
| bool "32kB" |
| depends on CPU_CAVIUM_OCTEON |
| depends on !MIPS_VA_BITS_48 |
| help |
| Using 32kB page size will result in higher performance kernel at |
| the price of higher memory consumption. This option is available |
| only on cnMIPS cores. Note that you will need a suitable Linux |
| distribution to support this. |
| |
| config PAGE_SIZE_64KB |
| bool "64kB" |
| depends on !CPU_R3000 && !CPU_TX39XX && !CPU_R6000 |
| help |
| Using 64kB page size will result in higher performance kernel at |
| the price of higher memory consumption. This option is available on |
| all non-R3000 family processor. Not that at the time of this |
| writing this option is still high experimental. |
| |
| endchoice |
| |
| config FORCE_MAX_ZONEORDER |
| int "Maximum zone order" |
| range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB |
| default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB |
| range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB |
| default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB |
| range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB |
| default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB |
| range 11 64 |
| default "11" |
| help |
| The kernel memory allocator divides physically contiguous memory |
| blocks into "zones", where each zone is a power of two number of |
| pages. This option selects the largest power of two that the kernel |
| keeps in the memory allocator. If you need to allocate very large |
| blocks of physically contiguous memory, then you may need to |
| increase this value. |
| |
| This config option is actually maximum order plus one. For example, |
| a value of 11 means that the largest free memory block is 2^10 pages. |
| |
| The page size is not necessarily 4KB. Keep this in mind |
| when choosing a value for this option. |
| |
| config BOARD_SCACHE |
| bool |
| |
| config IP22_CPU_SCACHE |
| bool |
| select BOARD_SCACHE |
| |
| # |
| # Support for a MIPS32 / MIPS64 style S-caches |
| # |
| config MIPS_CPU_SCACHE |
| bool |
| select BOARD_SCACHE |
| |
| config R5000_CPU_SCACHE |
| bool |
| select BOARD_SCACHE |
| |
| config RM7000_CPU_SCACHE |
| bool |
| select BOARD_SCACHE |
| |
| config SIBYTE_DMA_PAGEOPS |
| bool "Use DMA to clear/copy pages" |
| depends on CPU_SB1 |
| help |
| Instead of using the CPU to zero and copy pages, use a Data Mover |
| channel. These DMA channels are otherwise unused by the standard |
| SiByte Linux port. Seems to give a small performance benefit. |
| |
| config CPU_HAS_PREFETCH |
| bool |
| |
| config CPU_GENERIC_DUMP_TLB |
| bool |
| default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX) |
| |
| config CPU_R4K_FPU |
| bool |
| default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON) |
| |
| config CPU_R4K_CACHE_TLB |
| bool |
| default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON) |
| |
| config MIPS_MT_SMP |
| bool "MIPS MT SMP support (1 TC on each available VPE)" |
| depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 |
| select CPU_MIPSR2_IRQ_VI |
| select CPU_MIPSR2_IRQ_EI |
| select SYNC_R4K |
| select MIPS_MT |
| select SMP |
| select SMP_UP |
| select SYS_SUPPORTS_SMP |
| select SYS_SUPPORTS_SCHED_SMT |
| select MIPS_PERF_SHARED_TC_COUNTERS |
| help |
| This is a kernel model which is known as SMVP. This is supported |
| on cores with the MT ASE and uses the available VPEs to implement |
| virtual processors which supports SMP. This is equivalent to the |
| Intel Hyperthreading feature. For further information go to |
| <http://www.imgtec.com/mips/mips-multithreading.asp>. |
| |
| config MIPS_MT |
| bool |
| |
| config SCHED_SMT |
| bool "SMT (multithreading) scheduler support" |
| depends on SYS_SUPPORTS_SCHED_SMT |
| default n |
| help |
| SMT scheduler support improves the CPU scheduler's decision making |
| when dealing with MIPS MT enabled cores at a cost of slightly |
| increased overhead in some places. If unsure say N here. |
| |
| config SYS_SUPPORTS_SCHED_SMT |
| bool |
| |
| config SYS_SUPPORTS_MULTITHREADING |
| bool |
| |
| config MIPS_MT_FPAFF |
| bool "Dynamic FPU affinity for FP-intensive threads" |
| default y |
| depends on MIPS_MT_SMP |
| |
| config MIPSR2_TO_R6_EMULATOR |
| bool "MIPS R2-to-R6 emulator" |
| depends on CPU_MIPSR6 && !SMP |
| default y |
| help |
| Choose this option if you want to run non-R6 MIPS userland code. |
| Even if you say 'Y' here, the emulator will still be disabled by |
| default. You can enable it using the 'mipsr2emu' kernel option. |
| The only reason this is a build-time option is to save ~14K from the |
| final kernel image. |
| comment "MIPS R2-to-R6 emulator is only available for UP kernels" |
| depends on SMP && CPU_MIPSR6 |
| |
| config MIPS_VPE_LOADER |
| bool "VPE loader support." |
| depends on SYS_SUPPORTS_MULTITHREADING && MODULES |
| select CPU_MIPSR2_IRQ_VI |
| select CPU_MIPSR2_IRQ_EI |
| select MIPS_MT |
| help |
| Includes a loader for loading an elf relocatable object |
| onto another VPE and running it. |
| |
| config MIPS_VPE_LOADER_CMP |
| bool |
| default "y" |
| depends on MIPS_VPE_LOADER && MIPS_CMP |
| |
| config MIPS_VPE_LOADER_MT |
| bool |
| default "y" |
| depends on MIPS_VPE_LOADER && !MIPS_CMP |
| |
| config MIPS_VPE_LOADER_TOM |
| bool "Load VPE program into memory hidden from linux" |
| depends on MIPS_VPE_LOADER |
| default y |
| help |
| The loader can use memory that is present but has been hidden from |
| Linux using the kernel command line option "mem=xxMB". It's up to |
| you to ensure the amount you put in the option and the space your |
| program requires is less or equal to the amount physically present. |
| |
| config MIPS_VPE_APSP_API |
| bool "Enable support for AP/SP API (RTLX)" |
| depends on MIPS_VPE_LOADER |
| help |
| |
| config MIPS_VPE_APSP_API_CMP |
| bool |
| default "y" |
| depends on MIPS_VPE_APSP_API && MIPS_CMP |
| |
| config MIPS_VPE_APSP_API_MT |
| bool |
| default "y" |
| depends on MIPS_VPE_APSP_API && !MIPS_CMP |
| |
| config MIPS_CMP |
| bool "MIPS CMP framework support (DEPRECATED)" |
| depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6 |
| select SMP |
| select SYNC_R4K |
| select SYS_SUPPORTS_SMP |
| select WEAK_ORDERING |
| default n |
| help |
| Select this if you are using a bootloader which implements the "CMP |
| framework" protocol (ie. YAMON) and want your kernel to make use of |
| its ability to start secondary CPUs. |
| |
| Unless you have a specific need, you should use CONFIG_MIPS_CPS |
| instead of this. |
| |
| config MIPS_CPS |
| bool "MIPS Coherent Processing System support" |
| depends on SYS_SUPPORTS_MIPS_CPS |
| select MIPS_CM |
| select MIPS_CPC |
| select MIPS_CPS_PM if HOTPLUG_CPU |
| select SMP |
| select SYNC_R4K if (CEVT_R4K || CSRC_R4K) |
| select SYS_SUPPORTS_HOTPLUG_CPU |
| select SYS_SUPPORTS_SMP |
| select WEAK_ORDERING |
| help |
| Select this if you wish to run an SMP kernel across multiple cores |
| within a MIPS Coherent Processing System. When this option is |
| enabled the kernel will probe for other cores and boot them with |
| no external assistance. It is safe to enable this when hardware |
| support is unavailable. |
| |
| config MIPS_CPS_PM |
| depends on MIPS_CPS |
| select MIPS_CPC |
| bool |
| |
| config MIPS_CM |
| bool |
| |
| config MIPS_CPC |
| bool |
| |
| config SB1_PASS_2_WORKAROUNDS |
| bool |
| depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) |
| default y |
| |
| config SB1_PASS_2_1_WORKAROUNDS |
| bool |
| depends on CPU_SB1 && CPU_SB1_PASS_2 |
| default y |
| |
| |
| config ARCH_PHYS_ADDR_T_64BIT |
| bool |
| |
| choice |
| prompt "SmartMIPS or microMIPS ASE support" |
| |
| config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS |
| bool "None" |
| help |
| Select this if you want neither microMIPS nor SmartMIPS support |
| |
| config CPU_HAS_SMARTMIPS |
| depends on SYS_SUPPORTS_SMARTMIPS |
| bool "SmartMIPS" |
| help |
| SmartMIPS is a extension of the MIPS32 architecture aimed at |
| increased security at both hardware and software level for |
| smartcards. Enabling this option will allow proper use of the |
| SmartMIPS instructions by Linux applications. However a kernel with |
| this option will not work on a MIPS core without SmartMIPS core. If |
| you don't know you probably don't have SmartMIPS and should say N |
| here. |
| |
| config CPU_MICROMIPS |
| depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6 |
| bool "microMIPS" |
| help |
| When this option is enabled the kernel will be built using the |
| microMIPS ISA |
| |
| endchoice |
| |
| config CPU_HAS_MSA |
| bool "Support for the MIPS SIMD Architecture" |
| depends on CPU_SUPPORTS_MSA |
| depends on 64BIT || MIPS_O32_FP64_SUPPORT |
| help |
| MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers |
| and a set of SIMD instructions to operate on them. When this option |
| is enabled the kernel will support allocating & switching MSA |
| vector register contexts. If you know that your kernel will only be |
| running on CPUs which do not support MSA or that your userland will |
| not be making use of it then you may wish to say N here to reduce |
| the size & complexity of your kernel. |
| |
| If unsure, say Y. |
| |
| config CPU_HAS_WB |
| bool |
| |
| config XKS01 |
| bool |
| |
| config CPU_HAS_RIXI |
| bool |
| |
| # |
| # Vectored interrupt mode is an R2 feature |
| # |
| config CPU_MIPSR2_IRQ_VI |
| bool |
| |
| # |
| # Extended interrupt mode is an R2 feature |
| # |
| config CPU_MIPSR2_IRQ_EI |
| bool |
| |
| config CPU_HAS_SYNC |
| bool |
| depends on !CPU_R3000 |
| default y |
| |
| # |
| # CPU non-features |
| # |
| config CPU_DADDI_WORKAROUNDS |
| bool |
| |
| config CPU_R4000_WORKAROUNDS |
| bool |
| select CPU_R4400_WORKAROUNDS |
| |
| config CPU_R4400_WORKAROUNDS |
| bool |
| |
| config MIPS_ASID_SHIFT |
| int |
| default 6 if CPU_R3000 || CPU_TX39XX |
| default 4 if CPU_R8000 |
| default 0 |
| |
| config MIPS_ASID_BITS |
| int |
| default 0 if MIPS_ASID_BITS_VARIABLE |
| default 6 if CPU_R3000 || CPU_TX39XX |
| default 8 |
| |
| config MIPS_ASID_BITS_VARIABLE |
| bool |
| |
| # |
| # - Highmem only makes sense for the 32-bit kernel. |
| # - The current highmem code will only work properly on physically indexed |
| # caches such as R3000, SB1, R7000 or those that look like they're virtually |
| # indexed such as R4000/R4400 SC and MC versions or R10000. So for the |
| # moment we protect the user and offer the highmem option only on machines |
| # where it's known to be safe. This will not offer highmem on a few systems |
| # such as MIPS32 and MIPS64 CPUs which may have virtual and physically |
| # indexed CPUs but we're playing safe. |
| # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we |
| # know they might have memory configurations that could make use of highmem |
| # support. |
| # |
| config HIGHMEM |
| bool "High Memory Support" |
| depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA |
| |
| config CPU_SUPPORTS_HIGHMEM |
| bool |
| |
| config SYS_SUPPORTS_HIGHMEM |
| bool |
| |
| config SYS_SUPPORTS_SMARTMIPS |
| bool |
| |
| config SYS_SUPPORTS_MICROMIPS |
| bool |
| |
| config SYS_SUPPORTS_MIPS16 |
| bool |
| help |
| This option must be set if a kernel might be executed on a MIPS16- |
| enabled CPU even if MIPS16 is not actually being used. In other |
| words, it makes the kernel MIPS16-tolerant. |
| |
| config CPU_SUPPORTS_MSA |
| bool |
| |
| config ARCH_FLATMEM_ENABLE |
| def_bool y |
| depends on !NUMA && !CPU_LOONGSON2 |
| |
| config ARCH_DISCONTIGMEM_ENABLE |
| bool |
| default y if SGI_IP27 |
| help |
| Say Y to support efficient handling of discontiguous physical memory, |
| for architectures which are either NUMA (Non-Uniform Memory Access) |
| or have huge holes in the physical address space for other reasons. |
| See <file:Documentation/vm/numa> for more. |
| |
| config ARCH_SPARSEMEM_ENABLE |
| bool |
| select SPARSEMEM_STATIC |
| |
| config NUMA |
| bool "NUMA Support" |
| depends on SYS_SUPPORTS_NUMA |
| help |
| Say Y to compile the kernel to support NUMA (Non-Uniform Memory |
| Access). This option improves performance on systems with more |
| than two nodes; on two node systems it is generally better to |
| leave it disabled; on single node systems disable this option |
| disabled. |
| |
| config SYS_SUPPORTS_NUMA |
| bool |
| |
| config RELOCATABLE |
| bool "Relocatable kernel" |
| depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6) |
| help |
| This builds a kernel image that retains relocation information |
| so it can be loaded someplace besides the default 1MB. |
| The relocations make the kernel binary about 15% larger, |
| but are discarded at runtime |
| |
| config RELOCATION_TABLE_SIZE |
| hex "Relocation table size" |
| depends on RELOCATABLE |
| range 0x0 0x01000000 |
| default "0x00100000" |
| ---help--- |
| A table of relocation data will be appended to the kernel binary |
| and parsed at boot to fix up the relocated kernel. |
| |
| This option allows the amount of space reserved for the table to be |
| adjusted, although the default of 1Mb should be ok in most cases. |
| |
| The build will fail and a valid size suggested if this is too small. |
| |
| If unsure, leave at the default value. |
| |
| config RANDOMIZE_BASE |
| bool "Randomize the address of the kernel image" |
| depends on RELOCATABLE |
| ---help--- |
| Randomizes the physical and virtual address at which the |
| kernel image is loaded, as a security feature that |
| deters exploit attempts relying on knowledge of the location |
| of kernel internals. |
| |
| Entropy is generated using any coprocessor 0 registers available. |
| |
| The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET. |
| |
| If unsure, say N. |
| |
| config RANDOMIZE_BASE_MAX_OFFSET |
| hex "Maximum kASLR offset" if EXPERT |
| depends on RANDOMIZE_BASE |
| range 0x0 0x40000000 if EVA || 64BIT |
| range 0x0 0x08000000 |
| default "0x01000000" |
| ---help--- |
| When kASLR is active, this provides the maximum offset that will |
| be applied to the kernel image. It should be set according to the |
| amount of physical RAM available in the target system minus |
| PHYSICAL_START and must be a power of 2. |
| |
| This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with |
| EVA or 64-bit. The default is 16Mb. |
| |
| config NODES_SHIFT |
| int |
| default "6" |
| depends on NEED_MULTIPLE_NODES |
| |
| config HW_PERF_EVENTS |
| bool "Enable hardware performance counter support for perf events" |
| depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3) |
| default y |
| help |
| Enable hardware performance counter support for perf events. If |
| disabled, perf events will use software events only. |
| |
| source "mm/Kconfig" |
| |
| config SMP |
| bool "Multi-Processing support" |
| depends on SYS_SUPPORTS_SMP |
| help |
| This enables support for systems with more than one CPU. If you have |
| a system with only one CPU, say N. If you have a system with more |
| than one CPU, say Y. |
| |
| If you say N here, the kernel will run on uni- and multiprocessor |
| machines, but will use only one CPU of a multiprocessor machine. If |
| you say Y here, the kernel will run on many, but not all, |
| uniprocessor machines. On a uniprocessor machine, the kernel |
| will run faster if you say N here. |
| |
| People using multiprocessor machines who say Y here should also say |
| Y to "Enhanced Real Time Clock Support", below. |
| |
| See also the SMP-HOWTO available at |
| <http://www.tldp.org/docs.html#howto>. |
| |
| If you don't know what to do here, say N. |
| |
| config HOTPLUG_CPU |
| bool "Support for hot-pluggable CPUs" |
| depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU |
| help |
| Say Y here to allow turning CPUs off and on. CPUs can be |
| controlled through /sys/devices/system/cpu. |
| (Note: power management support will enable this option |
| automatically on SMP systems. ) |
| Say N if you want to disable CPU hotplug. |
| |
| config SMP_UP |
| bool |
| |
| config SYS_SUPPORTS_MIPS_CMP |
| bool |
| |
| config SYS_SUPPORTS_MIPS_CPS |
| bool |
| |
| config SYS_SUPPORTS_SMP |
| bool |
| |
| config NR_CPUS_DEFAULT_4 |
| bool |
| |
| config NR_CPUS_DEFAULT_8 |
| bool |
| |
| config NR_CPUS_DEFAULT_16 |
| bool |
| |
| config NR_CPUS_DEFAULT_32 |
| bool |
| |
| config NR_CPUS_DEFAULT_64 |
| bool |
| |
| config NR_CPUS |
| int "Maximum number of CPUs (2-256)" |
| range 2 256 |
| depends on SMP |
| default "4" if NR_CPUS_DEFAULT_4 |
| default "8" if NR_CPUS_DEFAULT_8 |
| default "16" if NR_CPUS_DEFAULT_16 |
| default "32" if NR_CPUS_DEFAULT_32 |
| default "64" if NR_CPUS_DEFAULT_64 |
| help |
| This allows you to specify the maximum number of CPUs which this |
| kernel will support. The maximum supported value is 32 for 32-bit |
| kernel and 64 for 64-bit kernels; the minimum value which makes |
| sense is 1 for Qemu (useful only for kernel debugging purposes) |
| and 2 for all others. |
| |
| This is purely to save memory - each supported CPU adds |
| approximately eight kilobytes to the kernel image. For best |
| performance should round up your number of processors to the next |
| power of two. |
| |
| config MIPS_PERF_SHARED_TC_COUNTERS |
| bool |
| |
| # |
| # Timer Interrupt Frequency Configuration |
| # |
| |
| choice |
| prompt "Timer frequency" |
| default HZ_250 |
| help |
| Allows the configuration of the timer frequency. |
| |
| config HZ_24 |
| bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ |
| |
| config HZ_48 |
| bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ |
| |
| config HZ_100 |
| bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ |
| |
| config HZ_128 |
| bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ |
| |
| config HZ_250 |
| bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ |
| |
| config HZ_256 |
| bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ |
| |
| config HZ_1000 |
| bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ |
| |
| config HZ_1024 |
| bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ |
| |
| endchoice |
| |
| config SYS_SUPPORTS_24HZ |
| bool |
| |
| config SYS_SUPPORTS_48HZ |
| bool |
| |
| config SYS_SUPPORTS_100HZ |
| bool |
| |
| config SYS_SUPPORTS_128HZ |
| bool |
| |
| config SYS_SUPPORTS_250HZ |
| bool |
| |
| config SYS_SUPPORTS_256HZ |
| bool |
| |
| config SYS_SUPPORTS_1000HZ |
| bool |
| |
| config SYS_SUPPORTS_1024HZ |
| bool |
| |
| config SYS_SUPPORTS_ARBIT_HZ |
| bool |
| default y if !SYS_SUPPORTS_24HZ && \ |
| !SYS_SUPPORTS_48HZ && \ |
| !SYS_SUPPORTS_100HZ && \ |
| !SYS_SUPPORTS_128HZ && \ |
| !SYS_SUPPORTS_250HZ && \ |
| !SYS_SUPPORTS_256HZ && \ |
| !SYS_SUPPORTS_1000HZ && \ |
| !SYS_SUPPORTS_1024HZ |
| |
| config HZ |
| int |
| default 24 if HZ_24 |
| default 48 if HZ_48 |
| default 100 if HZ_100 |
| default 128 if HZ_128 |
| default 250 if HZ_250 |
| default 256 if HZ_256 |
| default 1000 if HZ_1000 |
| default 1024 if HZ_1024 |
| |
| config SCHED_HRTICK |
| def_bool HIGH_RES_TIMERS |
| |
| source "kernel/Kconfig.preempt" |
| |
| config KEXEC |
| bool "Kexec system call" |
| select KEXEC_CORE |
| help |
| kexec is a system call that implements the ability to shutdown your |
| current kernel, and to start another kernel. It is like a reboot |
| but it is independent of the system firmware. And like a reboot |
| you can start any kernel with it, not just Linux. |
| |
| The name comes from the similarity to the exec system call. |
| |
| It is an ongoing process to be certain the hardware in a machine |
| is properly shutdown, so do not be surprised if this code does not |
| initially work for you. As of this writing the exact hardware |
| interface is strongly in flux, so no good recommendation can be |
| made. |
| |
| config CRASH_DUMP |
| bool "Kernel crash dumps" |
| help |
| Generate crash dump after being started by kexec. |
| This should be normally only set in special crash dump kernels |
| which are loaded in the main kernel with kexec-tools into |
| a specially reserved region and then later executed after |
| a crash by kdump/kexec. The crash dump kernel must be compiled |
| to a memory address not used by the main kernel or firmware using |
| PHYSICAL_START. |
| |
| config PHYSICAL_START |
| hex "Physical address where the kernel is loaded" |
| default "0xffffffff84000000" if 64BIT |
| default "0x84000000" if 32BIT |
| depends on CRASH_DUMP |
| help |
| This gives the CKSEG0 or KSEG0 address where the kernel is loaded. |
| If you plan to use kernel for capturing the crash dump change |
| this value to start of the reserved region (the "X" value as |
| specified in the "crashkernel=YM@XM" command line boot parameter |
| passed to the panic-ed kernel). |
| |
| config SECCOMP |
| bool "Enable seccomp to safely compute untrusted bytecode" |
| depends on PROC_FS |
| default y |
| help |
| This kernel feature is useful for number crunching applications |
| that may need to compute untrusted bytecode during their |
| execution. By using pipes or other transports made available to |
| the process as file descriptors supporting the read/write |
| syscalls, it's possible to isolate those applications in |
| their own address space using seccomp. Once seccomp is |
| enabled via /proc/<pid>/seccomp, it cannot be disabled |
| and the task is only allowed to execute a few safe syscalls |
| defined by each seccomp mode. |
| |
| If unsure, say Y. Only embedded should say N here. |
| |
| config MIPS_O32_FP64_SUPPORT |
| bool "Support for O32 binaries using 64-bit FP" |
| depends on 32BIT || MIPS32_O32 |
| help |
| When this is enabled, the kernel will support use of 64-bit floating |
| point registers with binaries using the O32 ABI along with the |
| EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On |
| 32-bit MIPS systems this support is at the cost of increasing the |
| size and complexity of the compiled FPU emulator. Thus if you are |
| running a MIPS32 system and know that none of your userland binaries |
| will require 64-bit floating point, you may wish to reduce the size |
| of your kernel & potentially improve FP emulation performance by |
| saying N here. |
| |
| Although binutils currently supports use of this flag the details |
| concerning its effect upon the O32 ABI in userland are still being |
| worked on. In order to avoid userland becoming dependant upon current |
| behaviour before the details have been finalised, this option should |
| be considered experimental and only enabled by those working upon |
| said details. |
| |
| If unsure, say N. |
| |
| config USE_OF |
| bool |
| select OF |
| select OF_EARLY_FLATTREE |
| select IRQ_DOMAIN |
| |
| config BUILTIN_DTB |
| bool |
| |
| choice |
| prompt "Kernel appended dtb support" if USE_OF |
| default MIPS_NO_APPENDED_DTB |
| |
| config MIPS_NO_APPENDED_DTB |
| bool "None" |
| help |
| Do not enable appended dtb support. |
| |
| config MIPS_ELF_APPENDED_DTB |
| bool "vmlinux" |
| help |
| With this option, the boot code will look for a device tree binary |
| DTB) included in the vmlinux ELF section .appended_dtb. By default |
| it is empty and the DTB can be appended using binutils command |
| objcopy: |
| |
| objcopy --update-section .appended_dtb=<filename>.dtb vmlinux |
| |
| This is meant as a backward compatiblity convenience for those |
| systems with a bootloader that can't be upgraded to accommodate |
| the documented boot protocol using a device tree. |
| |
| config MIPS_RAW_APPENDED_DTB |
| bool "vmlinux.bin or vmlinuz.bin" |
| help |
| With this option, the boot code will look for a device tree binary |
| DTB) appended to raw vmlinux.bin or vmlinuz.bin. |
| (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb). |
| |
| This is meant as a backward compatibility convenience for those |
| systems with a bootloader that can't be upgraded to accommodate |
| the documented boot protocol using a device tree. |
| |
| Beware that there is very little in terms of protection against |
| this option being confused by leftover garbage in memory that might |
| look like a DTB header after a reboot if no actual DTB is appended |
| to vmlinux.bin. Do not leave this option active in a production kernel |
| if you don't intend to always append a DTB. |
| endchoice |
| |
| choice |
| prompt "Kernel command line type" if !CMDLINE_OVERRIDE |
| default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \ |
| !MIPS_MALTA && \ |
| !CAVIUM_OCTEON_SOC |
| default MIPS_CMDLINE_FROM_BOOTLOADER |
| |
| config MIPS_CMDLINE_FROM_DTB |
| depends on USE_OF |
| bool "Dtb kernel arguments if available" |
| |
| config MIPS_CMDLINE_DTB_EXTEND |
| depends on USE_OF |
| bool "Extend dtb kernel arguments with bootloader arguments" |
| |
| config MIPS_CMDLINE_FROM_BOOTLOADER |
| bool "Bootloader kernel arguments if available" |
| |
| config MIPS_CMDLINE_BUILTIN_EXTEND |
| depends on CMDLINE_BOOL |
| bool "Extend builtin kernel arguments with bootloader arguments" |
| endchoice |
| |
| endmenu |
| |
| config LOCKDEP_SUPPORT |
| bool |
| default y |
| |
| config STACKTRACE_SUPPORT |
| bool |
| default y |
| |
| config HAVE_LATENCYTOP_SUPPORT |
| bool |
| default y |
| |
| config PGTABLE_LEVELS |
| int |
| default 3 if 64BIT && !PAGE_SIZE_64KB |
| default 2 |
| |
| source "init/Kconfig" |
| |
| source "kernel/Kconfig.freezer" |
| |
| menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" |
| |
| config HW_HAS_EISA |
| bool |
| config HW_HAS_PCI |
| bool |
| |
| config PCI |
| bool "Support for PCI controller" |
| depends on HW_HAS_PCI |
| select PCI_DOMAINS |
| help |
| Find out whether you have a PCI motherboard. PCI is the name of a |
| bus system, i.e. the way the CPU talks to the other stuff inside |
| your box. Other bus systems are ISA, EISA, or VESA. If you have PCI, |
| say Y, otherwise N. |
| |
| config HT_PCI |
| bool "Support for HT-linked PCI" |
| default y |
| depends on CPU_LOONGSON3 |
| select PCI |
| select PCI_DOMAINS |
| help |
| Loongson family machines use Hyper-Transport bus for inter-core |
| connection and device connection. The PCI bus is a subordinate |
| linked at HT. Choose Y for Loongson-3 based machines. |
| |
| config PCI_DOMAINS |
| bool |
| |
| config PCI_DOMAINS_GENERIC |
| bool |
| |
| config PCI_DRIVERS_GENERIC |
| select PCI_DOMAINS_GENERIC if PCI_DOMAINS |
| bool |
| |
| config PCI_DRIVERS_LEGACY |
| def_bool !PCI_DRIVERS_GENERIC |
| select NO_GENERIC_PCI_IOPORT_MAP |
| |
| source "drivers/pci/Kconfig" |
| |
| # |
| # ISA support is now enabled via select. Too many systems still have the one |
| # or other ISA chip on the board that users don't know about so don't expect |
| # users to choose the right thing ... |
| # |
| config ISA |
| bool |
| |
| config EISA |
| bool "EISA support" |
| depends on HW_HAS_EISA |
| select ISA |
| select GENERIC_ISA_DMA |
| ---help--- |
| The Extended Industry Standard Architecture (EISA) bus was |
| developed as an open alternative to the IBM MicroChannel bus. |
| |
| The EISA bus provided some of the features of the IBM MicroChannel |
| bus while maintaining backward compatibility with cards made for |
| the older ISA bus. The EISA bus saw limited use between 1988 and |
| 1995 when it was made obsolete by the PCI bus. |
| |
| Say Y here if you are building a kernel for an EISA-based machine. |
| |
| Otherwise, say N. |
| |
| source "drivers/eisa/Kconfig" |
| |
| config TC |
| bool "TURBOchannel support" |
| depends on MACH_DECSTATION |
| help |
| TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS |
| processors. TURBOchannel programming specifications are available |
| at: |
| <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> |
| and: |
| <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> |
| Linux driver support status is documented at: |
| <http://www.linux-mips.org/wiki/DECstation> |
| |
| config MMU |
| bool |
| default y |
| |
| config I8253 |
| bool |
| select CLKSRC_I8253 |
| select CLKEVT_I8253 |
| select MIPS_EXTERNAL_TIMER |
| |
| config ZONE_DMA |
| bool |
| |
| config ZONE_DMA32 |
| bool |
| |
| source "drivers/pcmcia/Kconfig" |
| |
| config RAPIDIO |
| tristate "RapidIO support" |
| depends on PCI |
| default n |
| help |
| If you say Y here, the kernel will include drivers and |
| infrastructure code to support RapidIO interconnect devices. |
| |
| source "drivers/rapidio/Kconfig" |
| |
| endmenu |
| |
| menu "Executable file formats" |
| |
| source "fs/Kconfig.binfmt" |
| |
| config TRAD_SIGNALS |
| bool |
| |
| config MIPS32_COMPAT |
| bool |
| |
| config COMPAT |
| bool |
| |
| config SYSVIPC_COMPAT |
| bool |
| |
| config MIPS32_O32 |
| bool "Kernel support for o32 binaries" |
| depends on 64BIT |
| select ARCH_WANT_OLD_COMPAT_IPC |
| select COMPAT |
| select MIPS32_COMPAT |
| select SYSVIPC_COMPAT if SYSVIPC |
| help |
| Select this option if you want to run o32 binaries. These are pure |
| 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of |
| existing binaries are in this format. |
| |
| If unsure, say Y. |
| |
| config MIPS32_N32 |
| bool "Kernel support for n32 binaries" |
| depends on 64BIT |
| select COMPAT |
| select MIPS32_COMPAT |
| select SYSVIPC_COMPAT if SYSVIPC |
| help |
| Select this option if you want to run n32 binaries. These are |
| 64-bit binaries using 32-bit quantities for addressing and certain |
| data that would normally be 64-bit. They are used in special |
| cases. |
| |
| If unsure, say N. |
| |
| config BINFMT_ELF32 |
| bool |
| default y if MIPS32_O32 || MIPS32_N32 |
| select ELFCORE |
| |
| endmenu |
| |
| menu "Power management options" |
| |
| config ARCH_HIBERNATION_POSSIBLE |
| def_bool y |
| depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP |
| |
| config ARCH_SUSPEND_POSSIBLE |
| def_bool y |
| depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP |
| |
| source "kernel/power/Kconfig" |
| |
| endmenu |
| |
| config MIPS_EXTERNAL_TIMER |
| bool |
| |
| menu "CPU Power Management" |
| |
| if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER |
| source "drivers/cpufreq/Kconfig" |
| endif |
| |
| source "drivers/cpuidle/Kconfig" |
| |
| endmenu |
| |
| source "net/Kconfig" |
| |
| source "drivers/Kconfig" |
| |
| source "drivers/firmware/Kconfig" |
| |
| source "fs/Kconfig" |
| |
| source "arch/mips/Kconfig.debug" |
| |
| source "security/Kconfig" |
| |
| source "crypto/Kconfig" |
| |
| source "lib/Kconfig" |
| |
| source "arch/mips/kvm/Kconfig" |