| commit | b5b7adfedfc0679be06b65be200c5073f1157bb1 | [log] [tgz] |
|---|---|---|
| author | Laxminath Kasam <lkasam@codeaurora.org> | Fri May 26 20:09:52 2017 +0530 |
| committer | Laxminath Kasam <lkasam@codeaurora.org> | Tue Jul 04 20:10:05 2017 +0530 |
| tree | 93b7c2c6daea598f58221e7c90a8c42a8be092b5 | |
| parent | fb7d0fd07d0cfcb9aac3745a41eb5af04532272d [diff] |
ASoC: msm_sdw: Move the delay logic inside bulk write loop On consecutive writes in bulk write API, ensure delay is provided for atleast 100us between each soundwire master write for WR_DONE status update and reflect current register value. Also ensure delay in soundwire master read is present after register address update and before register value read. CRs-Fixed: 2035787 Change-Id: I8399c5ca32328abdd4e90b46d6f8d6a6c0225905 Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>