| Atmel AT91 device tree bindings. |
| ================================ |
| |
| Boards with a SoC of the Atmel AT91 or SMART family shall have the following |
| properties: |
| |
| Required root node properties: |
| compatible: must be one of: |
| * "atmel,at91rm9200" |
| |
| * "atmel,at91sam9" for SoCs using an ARM926EJ-S core, shall be extended with |
| the specific SoC family or compatible: |
| o "atmel,at91sam9260" |
| o "atmel,at91sam9261" |
| o "atmel,at91sam9263" |
| o "atmel,at91sam9x5" for the 5 series, shall be extended with the specific |
| SoC compatible: |
| - "atmel,at91sam9g15" |
| - "atmel,at91sam9g25" |
| - "atmel,at91sam9g35" |
| - "atmel,at91sam9x25" |
| - "atmel,at91sam9x35" |
| o "atmel,at91sam9g20" |
| o "atmel,at91sam9g45" |
| o "atmel,at91sam9n12" |
| o "atmel,at91sam9rl" |
| o "atmel,at91sam9xe" |
| * "atmel,sama5" for SoCs using a Cortex-A5, shall be extended with the specific |
| SoC family: |
| o "atmel,sama5d2" shall be extended with the specific SoC compatible: |
| - "atmel,sama5d27" |
| o "atmel,sama5d3" shall be extended with the specific SoC compatible: |
| - "atmel,sama5d31" |
| - "atmel,sama5d33" |
| - "atmel,sama5d34" |
| - "atmel,sama5d35" |
| - "atmel,sama5d36" |
| o "atmel,sama5d4" shall be extended with the specific SoC compatible: |
| - "atmel,sama5d41" |
| - "atmel,sama5d42" |
| - "atmel,sama5d43" |
| - "atmel,sama5d44" |
| |
| Chipid required properties: |
| - compatible: Should be "atmel,sama5d2-chipid" |
| - reg : Should contain registers location and length |
| |
| PIT Timer required properties: |
| - compatible: Should be "atmel,at91sam9260-pit" |
| - reg: Should contain registers location and length |
| - interrupts: Should contain interrupt for the PIT which is the IRQ line |
| shared across all System Controller members. |
| |
| System Timer (ST) required properties: |
| - compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd" |
| - reg: Should contain registers location and length |
| - interrupts: Should contain interrupt for the ST which is the IRQ line |
| shared across all System Controller members. |
| - clocks: phandle to input clock. |
| Its subnodes can be: |
| - watchdog: compatible should be "atmel,at91rm9200-wdt" |
| |
| TC/TCLIB Timer required properties: |
| - compatible: Should be "atmel,<chip>-tcb". |
| <chip> can be "at91rm9200" or "at91sam9x5" |
| - reg: Should contain registers location and length |
| - interrupts: Should contain all interrupts for the TC block |
| Note that you can specify several interrupt cells if the TC |
| block has one interrupt per channel. |
| - clock-names: tuple listing input clock names. |
| Required elements: "t0_clk", "slow_clk" |
| Optional elements: "t1_clk", "t2_clk" |
| - clocks: phandles to input clocks. |
| |
| Examples: |
| |
| One interrupt per TC block: |
| tcb0: timer@fff7c000 { |
| compatible = "atmel,at91rm9200-tcb"; |
| reg = <0xfff7c000 0x100>; |
| interrupts = <18 4>; |
| clocks = <&tcb0_clk>; |
| clock-names = "t0_clk"; |
| }; |
| |
| One interrupt per TC channel in a TC block: |
| tcb1: timer@fffdc000 { |
| compatible = "atmel,at91rm9200-tcb"; |
| reg = <0xfffdc000 0x100>; |
| interrupts = <26 4 27 4 28 4>; |
| clocks = <&tcb1_clk>; |
| clock-names = "t0_clk"; |
| }; |
| |
| RSTC Reset Controller required properties: |
| - compatible: Should be "atmel,<chip>-rstc". |
| <chip> can be "at91sam9260" or "at91sam9g45" or "sama5d3" |
| - reg: Should contain registers location and length |
| - clocks: phandle to input clock. |
| |
| Example: |
| |
| rstc@fffffd00 { |
| compatible = "atmel,at91sam9260-rstc"; |
| reg = <0xfffffd00 0x10>; |
| clocks = <&clk32k>; |
| }; |
| |
| RAMC SDRAM/DDR Controller required properties: |
| - compatible: Should be "atmel,at91rm9200-sdramc", "syscon" |
| "atmel,at91sam9260-sdramc", |
| "atmel,at91sam9g45-ddramc", |
| "atmel,sama5d3-ddramc", |
| - reg: Should contain registers location and length |
| |
| Examples: |
| |
| ramc0: ramc@ffffe800 { |
| compatible = "atmel,at91sam9g45-ddramc"; |
| reg = <0xffffe800 0x200>; |
| }; |
| |
| SHDWC Shutdown Controller |
| |
| required properties: |
| - compatible: Should be "atmel,<chip>-shdwc". |
| <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5". |
| - reg: Should contain registers location and length |
| - clocks: phandle to input clock. |
| |
| optional properties: |
| - atmel,wakeup-mode: String, operation mode of the wakeup mode. |
| Supported values are: "none", "high", "low", "any". |
| - atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf). |
| |
| optional at91sam9260 properties: |
| - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up. |
| |
| optional at91sam9rl properties: |
| - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up. |
| - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up. |
| |
| optional at91sam9x5 properties: |
| - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up. |
| |
| Example: |
| |
| shdwc@fffffd10 { |
| compatible = "atmel,at91sam9260-shdwc"; |
| reg = <0xfffffd10 0x10>; |
| clocks = <&clk32k>; |
| }; |
| |
| Special Function Registers (SFR) |
| |
| Special Function Registers (SFR) manage specific aspects of the integrated |
| memory, bridge implementations, processor and other functionality not controlled |
| elsewhere. |
| |
| required properties: |
| - compatible: Should be "atmel,<chip>-sfr", "syscon". |
| <chip> can be "sama5d3" or "sama5d4". |
| - reg: Should contain registers location and length |
| |
| sfr@f0038000 { |
| compatible = "atmel,sama5d3-sfr", "syscon"; |
| reg = <0xf0038000 0x60>; |
| }; |