| commit | b8853aa3d912f47f649ad8de784ac3afd932437d | [log] [tgz] |
|---|---|---|
| author | Wu Zhangjin <wuzhangjin@gmail.com> | Tue Apr 13 13:16:34 2010 +0800 |
| committer | Ralf Baechle <ralf@linux-mips.org> | Fri May 21 21:31:14 2010 +0100 |
| tree | 02939e404694eb0067b149d54c6191fea04de68f | |
| parent | ed1bbdefc39477a1301fb466139ffb0c00f0d006 [diff] |
MIPS: Loongson: update cpu-feature-overrides.h Loongson doesn't support MIPSR2, therefore, MIPSR2 vectored interrupts (cpu_has_vint) and MIPSR2 external interrupt controller mode (cpu_has_veic) are 0. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/1112/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>