[ARM] 3711/1: AT91 timer update
Patch from Andrew Victor
The AIC interrupt controller is the same on the Atmel AT91RM9200,
AT91SAM9261 and AT91SAM9260 processors.
This patch removes any RM9200-specific naming from the IRQ driver, and
moves the AT91RM9200's default IRQ priority table into at91rm9200.c.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
diff --git a/arch/arm/mach-at91rm9200/irq.c b/arch/arm/mach-at91rm9200/irq.c
index dcd560d..9b09113 100644
--- a/arch/arm/mach-at91rm9200/irq.c
+++ b/arch/arm/mach-at91rm9200/irq.c
@@ -36,58 +36,20 @@
#include "generic.h"
-/*
- * The default interrupt priority levels (0 = lowest, 7 = highest).
- */
-static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
- 7, /* Advanced Interrupt Controller */
- 7, /* System Peripheral */
- 0, /* Parallel IO Controller A */
- 0, /* Parallel IO Controller B */
- 0, /* Parallel IO Controller C */
- 0, /* Parallel IO Controller D */
- 6, /* USART 0 */
- 6, /* USART 1 */
- 6, /* USART 2 */
- 6, /* USART 3 */
- 0, /* Multimedia Card Interface */
- 4, /* USB Device Port */
- 0, /* Two-Wire Interface */
- 6, /* Serial Peripheral Interface */
- 5, /* Serial Synchronous Controller */
- 5, /* Serial Synchronous Controller */
- 5, /* Serial Synchronous Controller */
- 0, /* Timer Counter 0 */
- 0, /* Timer Counter 1 */
- 0, /* Timer Counter 2 */
- 0, /* Timer Counter 3 */
- 0, /* Timer Counter 4 */
- 0, /* Timer Counter 5 */
- 3, /* USB Host port */
- 3, /* Ethernet MAC */
- 0, /* Advanced Interrupt Controller */
- 0, /* Advanced Interrupt Controller */
- 0, /* Advanced Interrupt Controller */
- 0, /* Advanced Interrupt Controller */
- 0, /* Advanced Interrupt Controller */
- 0, /* Advanced Interrupt Controller */
- 0 /* Advanced Interrupt Controller */
-};
-
-static void at91rm9200_mask_irq(unsigned int irq)
+static void at91_aic_mask_irq(unsigned int irq)
{
/* Disable interrupt on AIC */
at91_sys_write(AT91_AIC_IDCR, 1 << irq);
}
-static void at91rm9200_unmask_irq(unsigned int irq)
+static void at91_aic_unmask_irq(unsigned int irq)
{
/* Enable interrupt on AIC */
at91_sys_write(AT91_AIC_IECR, 1 << irq);
}
-static int at91rm9200_irq_type(unsigned irq, unsigned type)
+static int at91_aic_set_type(unsigned irq, unsigned type)
{
unsigned int smr, srctype;
@@ -122,7 +84,7 @@
static u32 wakeups;
static u32 backups;
-static int at91rm9200_irq_set_wake(unsigned irq, unsigned value)
+static int at91_aic_set_wake(unsigned irq, unsigned value)
{
if (unlikely(irq >= 32))
return -EINVAL;
@@ -149,28 +111,24 @@
}
#else
-#define at91rm9200_irq_set_wake NULL
+#define at91_aic_set_wake NULL
#endif
-static struct irqchip at91rm9200_irq_chip = {
- .ack = at91rm9200_mask_irq,
- .mask = at91rm9200_mask_irq,
- .unmask = at91rm9200_unmask_irq,
- .set_type = at91rm9200_irq_type,
- .set_wake = at91rm9200_irq_set_wake,
+static struct irqchip at91_aic_chip = {
+ .ack = at91_aic_mask_irq,
+ .mask = at91_aic_mask_irq,
+ .unmask = at91_aic_unmask_irq,
+ .set_type = at91_aic_set_type,
+ .set_wake = at91_aic_set_wake,
};
/*
* Initialize the AIC interrupt controller.
*/
-void __init at91rm9200_init_irq(unsigned int priority[NR_AIC_IRQS])
+void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS])
{
unsigned int i;
- /* No priority list specified for this board -> use defaults */
- if (priority == NULL)
- priority = at91rm9200_default_irq_priority;
-
/*
* The IVR is used by macro get_irqnr_and_base to read and verify.
* The irq number is NR_AIC_IRQS when a spurious interrupt has occurred.
@@ -178,10 +136,10 @@
for (i = 0; i < NR_AIC_IRQS; i++) {
/* Put irq number in Source Vector Register: */
at91_sys_write(AT91_AIC_SVR(i), i);
- /* Store the Source Mode Register as defined in table above */
+ /* Active Low interrupt, with the specified priority */
at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]);
- set_irq_chip(i, &at91rm9200_irq_chip);
+ set_irq_chip(i, &at91_aic_chip);
set_irq_handler(i, do_level_IRQ);
set_irq_flags(i, IRQF_VALID | IRQF_PROBE);