| 1. Need to figure out why PCI writes to the IOC3 hang, and if it is okay |
| not to write to the IOC3 ever. |
| 2. Need to figure out RRB allocation in bridge_startup(). |
| 3. Need to figure out why address swaizzling is needed in inw/outw for |
| Qlogic scsi controllers. |
| 4. Need to integrate ip27-klconfig.c:find_lboard and |
| ip27-init.c:find_lbaord_real. DONE |
| 5. Is it okay to set calias space on all nodes as 0, instead of 8k as |
| in irix? |
| 6. Investigate why things do not work without the setup_test() call |
| being invoked on all nodes in ip27-memory.c. |
| 7. Too many CLIs in the locore handlers : |
| For the low level handlers set up by set_except_vector(), |
| __tlb_refill_debug_tramp, __xtlb_refill_debug_tramp and cacheerror, |
| investigate whether the code should do CLI, STI or KMODE. |
| 8. Too many do_page_faults invoked - investigate. |
| 9. start_thread must turn off UX64 ... and define tlb_refill_debug. |
| 10. Need a bad pmd table, bad pte table. __bad_pmd_table/__bad_pagetable |
| does not agree with pgd_bad/pmd_bad. |
| 11. All intrs (ip27_do_irq handlers) are targetted at cpu A on the node. |
| This might need to change later. Only the timer intr is set up to be |
| received on both Cpu A and B. (ip27_do_irq()/bridge_startup()) |
| 13. Cache flushing (specially the SMP version) has to be investigated. |