| commit | bb034cb5eb7fa6596c40d405e31cef02de21ad30 | [log] [tgz] |
|---|---|---|
| author | Thierry Reding <thierry.reding@gmail.com> | Fri Aug 09 16:49:28 2013 +0200 |
| committer | Stephen Warren <swarren@nvidia.com> | Mon Aug 12 14:20:22 2013 -0600 |
| tree | 54ba1bdd2556fd57ba703068bfc0265a36b39608 | |
| parent | 89e7ada41674197387fa67ea0a853f3651b4e375 [diff] |
ARM: tegra: Enable PCIe controller on Beaver PCIe lane 0 is connected to an onboard Gigabit Ethernet (RTL8168evl) and lane 4 is routed to the board's miniPCIe slot. Signed-off-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>