| commit | bb0d977ed42c79ed709c79dbab4ff2159941eb2a | [log] [tgz] |
|---|---|---|
| author | Stephane Eranian <eranian@hpl.hp.com> | Thu Dec 07 02:14:02 2006 +0100 |
| committer | Andi Kleen <andi@basil.nowhere.org> | Thu Dec 07 02:14:02 2006 +0100 |
| tree | ef0af6c23743b49c263db36f389433c9a7155367 | |
| parent | 86efef50cfff9905c4e4ec64f3d3d3b299226674 [diff] |
[PATCH] i386: add Intel Core related PMU MSRs - add Intel Precise-Event Based sampling (PEBS) related MSR - add Intel Data Save (DS) Area related MSR - add Intel Core microarchitecure performance counter MSRs Signed-off-by: stephane eranian <eranian@hpl.hp.com> Signed-off-by: Andi Kleen <ak@suse.de>